Commit Graph

258377 Commits

Author SHA1 Message Date
Craig Topper a795be60c1 [AVX-512] Add test case that was supposed to go with r298957.
llvm-svn: 298959
2017-03-28 23:29:35 +00:00
Jim Ingham 9f44d460d9 Print the error if dsymForUUID sometimes produces bad plists.
Not much we can do about it but at least we can print the bad
plist and the error.

llvm-svn: 298958
2017-03-28 23:25:34 +00:00
Craig Topper 331297c62e [AVX-512] Punt on fast-isel of truncates to i1 when AVX512 is enabled.
We should be masking the value and emitting a register copy like we do in non-fast isel. Instead we were just updating the value map and emitting nothing.

After r298928 we started seeing cases where we would create a copy from GR8 to GR32 because the source register in a VK1 to GR32 copy was replaced by the GR8 going into a truncate.

This fixes PR32451.

llvm-svn: 298957
2017-03-28 23:20:37 +00:00
Eric Christopher fc6ffede65 Default enable the rtm feature only on skylake and later for now because Intel disabled the feature on some haswell and broadwell processors:
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/core-m-processor-family-spec-update.pdf

the -mrtm option will still work normally.

llvm-svn: 298956
2017-03-28 23:03:19 +00:00
Guozhi Wei f8d40181c9 [PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64
In PPCBoolRetToInt bool value is changed to i32 type. On ppc64 it may introduce an extra zero extension for the return value. This patch changes the integer type to i64 to avoid the zero extension on ppc64.

This patch fixed PR32442.

Differential Revision: https://reviews.llvm.org/D31407

llvm-svn: 298955
2017-03-28 22:55:01 +00:00
Sanjay Patel a41a5c29f0 [DAGCombiner] reduce code duplication with local variables; NFCI
llvm-svn: 298954
2017-03-28 22:45:53 +00:00
Kamil Rytarowski f07a9995e8 Add support for tracing hello-world application on NetBSD
Summary:
This patch is a stripped down from features a NetBSD process
code (patch is kept under 2k LOC). This code has assumption that
there is only one thread within a debugged process. The only
debugger trap supported is software breakpoint (TRAP_BRKPT).
The generic platform code requires to add dummy function for
watchpoints etc. These functions are currently empty.
This code is not the final platform support as is and it's treated as
a base to extend, refactor and address issues afterwards.

Supported features:
 - handle software breakpoints,
 - correctly attach to a tracee,
 - support NetBSD specific ptrace(2),
 - monitor process termination,
 - monitor SIGTRAP events,
 - monitor SIGSTOP events,
 - monitor other signals events,
 - resume the whole process,
 - get memory region info perms,
 - read memory from tracee,
 - write memory to tracee,
 - read ELF AUXV,
 - x86_64 GPR read and write code

For the generic framework include:
 - halt,
 - detach,
 - signal,
 - kill,
 - allocatememory,
 - deallocatememory,
 - update threads,
 - getarchitecture,
 - getfileloadaddress,
 - and others.

This code has preliminary AddThread code.

Out of interest in this patch:
 - exec() traps,
 - hardware debug register traps,
 - single step trap,
 - thread creation/termination trap,
 - process fork(2), vfork(2) and vfork(2) done traps,
 - syscall entry and exit trap,
 - threads,
 - FPR registers,
 - retrieving tracee's thread name,
 - non x86_64 support.

This code can be used to start a hello world application and trace it.

This code can be used by other BSD systems as a starting point to get similar
capabilities.

Sponsored by <The NetBSD Foundation>

Reviewers: emaste, joerg, kettenis, labath

Subscribers: mgorny, #lldb

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D31374

llvm-svn: 298953
2017-03-28 22:43:17 +00:00
Eric Christopher 69b191c628 Add a similar test for tailcall optimization as in r270287 for aarch64.
llvm-svn: 298952
2017-03-28 22:37:43 +00:00
Peter Collingbourne 0d56b959ad LTO: Replace InputFile::Symbol::getFlags() with predicate accessors. NFC.
This makes the predicates independent of the flag representation
and makes the code a little easier to read.

llvm-svn: 298951
2017-03-28 22:31:35 +00:00
Sanjay Patel 9747d8070b [DAG] fix formatting; NFC
llvm-svn: 298950
2017-03-28 22:25:25 +00:00
Sanjay Patel d832eddde5 [DAGCombiner] remove redundant conditions and duplicated code; NFCI
llvm-svn: 298949
2017-03-28 22:22:50 +00:00
Stanislav Mekhanoshin baf31ac7c8 [AMDGPU] Boost unroll threshold for loops reading local memory
This is less important than increase threshold for private memory,
but still brings performance improvements in a wide range of tests.
Unrolling more for local memory serves three purposes: it allows
to combine ds operations if offset becomes static, saves registers
used for offsets in case of static offsets, and allows better lds
latency hiding.

Differential Revision: https://reviews.llvm.org/D31412

llvm-svn: 298948
2017-03-28 22:13:51 +00:00
Francis Ricci 99a84b163f Postpone lsan tls allocation until required
Summary:
This prevents InternalAlloc from being called before the sanitizers
are fully initialized.

Reviewers: kubamracek, kcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31306

llvm-svn: 298947
2017-03-28 21:56:45 +00:00
Francis Ricci ab85292261 Enable i386 builds for darwin lsan
Summary:
Now that __thread is no longer used for lsan on darwin, i386 builds
can be enabled.

Reviewers: kcc, kubamracek

Subscribers: danalbert, srhines, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D29995

llvm-svn: 298946
2017-03-28 21:56:44 +00:00
Stanislav Mekhanoshin b933c3f554 [AMDGPU] Fix recorded region boundaries in max-occupancy scheduler
This is incorrect to record region boundaries before scheduling,
it may change after scheduling. As a result second pass may see less
instructions to schedule than it should.

Differential Revision: https://reviews.llvm.org/D31434

llvm-svn: 298945
2017-03-28 21:48:54 +00:00
Sanjay Patel d2a26db991 [DAGCombiner] rename variables in foldAndOfSetCCs for easier reading; NFCI
llvm-svn: 298944
2017-03-28 21:40:41 +00:00
Simon Pilgrim c7c5aa47cf [X86][MMX] Match MMX fp_to_sint conversions from XMM registers
We currently perform the various fp_to_sint XMM conversion and then transfer to the MMX register (on 32-bit via the stack).

This patch improves support for MOVDQ2Q XMM to MMX transfers and adds the XMM->MMX fp_to_sint direct conversion patterns. The SSE2 specifications are the same as for XMM->XMM and XMM->MMX rounding/exceptions/etc.

Differential Revision: https://reviews.llvm.org/D30868

llvm-svn: 298943
2017-03-28 21:32:11 +00:00
Bob Haarman 2d2b5b09e0 COFF: include archive name in LTO object name
Summary: In the ELF linker, we create the buffer identifier for bitcode files by appending the object name to the archive name. This change makes the COFF linker do the same. Without the change, ThinLTO builds can fail with an error message about multiple ThinLTO modules per object file, caused by object files contained in different archives having the same name.

Reviewers: pcc, ruiu

Reviewed By: pcc

Subscribers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D31402

llvm-svn: 298942
2017-03-28 21:20:06 +00:00
Matt Arsenault 323b021b5e Fix crashing on TargetCustom PseudoSourceValues
Default to something more reasonable if printCustom isn't implemented.

llvm-svn: 298941
2017-03-28 20:33:12 +00:00
Sanjay Patel 3230e4be11 [DAGCombiner] clean up foldAndOfSetCCs; NFCI
1. Fix bogus comment.
2. Early exit to reduce indent.
3. Change node pointer param to what it really is: an SDLoc.

llvm-svn: 298940
2017-03-28 20:28:16 +00:00
Adam Nemet cd847a8f30 [IR] Add AllowContract to FastMathFlags
-ffp-contract=fast does not currently work with LTO because it's passed as a
TargetOption to the backend rather than in the IR. This adds it to
FastMathFlags.

This is toward fixing PR25721

Differential Revision: https://reviews.llvm.org/D31164

llvm-svn: 298939
2017-03-28 20:11:52 +00:00
Sanjay Patel 16af53a395 [DAGCombiner] add helper function for and-of-setcc folds; NFC
This is just a cut and paste followed by clang-format. Clean up to follow.

llvm-svn: 298938
2017-03-28 19:58:46 +00:00
Shoaib Meenai c7cd73e8b8 [libc++] Add a key function for bad_function_call
Summary:
bad_function_call is currently an empty class, so any object files using
that class will end up with their own copy of its typeinfo, typeinfo
name and vtable, leading to unnecessary duplication that has to be
resolved by the dynamic linker. Instead, give bad_function_call a key
function and put a definition for that key function in libc++ itself, to
centralize the typeinfo and vtable.

This is consistent with the behavior for other exception classes. The
key functions are defined in libc++ rather than libc++abi since the
class is defined in the libc++ versioning namespace, so ABI
compatibility with libstdc++ is not a concern.

Guard this change behind an ABI macro, since it isn't backwards
compatible (i.e., clients built against the new libc++ headers wouldn't
be able to run against an older libc++ library).

Reviewers: mclow.lists, EricWF

Subscribers: mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D27387

llvm-svn: 298937
2017-03-28 19:33:31 +00:00
Mehdi Amini b5a46c1f45 Add support for -fno-builtin to LTO and ThinLTO to libLTO
Reviewers: tejohnson, pcc

Subscribers: Prazek, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D30791

llvm-svn: 298936
2017-03-28 18:55:44 +00:00
Stanislav Mekhanoshin 9053f22eeb [AMDGPU] Split -amdgpu-early-inline-all option
Previously it was covered by the internalization. It turns out we cannot
run internalizer in FE, it break separate compilation tests. Thus early
inliner gets its own option.

Differential Revision: https://reviews.llvm.org/D31429

llvm-svn: 298935
2017-03-28 18:23:24 +00:00
Rui Ueyama 486369fc1a Do not set entsize for .gnu.hash.
.gnu.hash happen to contain only 32-bit integers for 32-bit arch,
but the section contents are not uniform array members, so setting
entsize doesn't make much sense. This behavior seems to have been
blindly copied from GNU linkers.

llvm-svn: 298934
2017-03-28 18:11:52 +00:00
Sanjay Patel f01a1dad7f [x86] use VPMOVMSK to replace memcmp libcalls for 32-byte equality
Follow-up to:
https://reviews.llvm.org/rL298775

llvm-svn: 298933
2017-03-28 17:23:49 +00:00
Weiming Zhao da4d12a8e5 Revert "Dont emit Mapping symbols for sections that contain only data."
It breaks some lld tests.

This reverts commit 3a50eea6d9732ab40e9a7aebe6be777b53a8b35c.

llvm-svn: 298932
2017-03-28 17:15:11 +00:00
Nirav Dave 472b5efc8b [SDAG] Deal with deleted node in PromoteIntShiftOp
Deal with case that initial node is deleted during dag-combine leading
to an assertional failure in promoteIntShiftOp.

Fixes PR32420.

Reviewers: spatel, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31403

llvm-svn: 298931
2017-03-28 17:09:49 +00:00
Zvi Rackover a4c354951b Add reproducer test for pr32449. NFC.
llvm-svn: 298930
2017-03-28 16:45:23 +00:00
Simon Pilgrim 3e2aa7f40e [X86][AVX2] Add support for combining v16i16 shuffles to VPBLENDW
llvm-svn: 298929
2017-03-28 16:40:38 +00:00
Craig Topper 058f2f6d72 [AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
We've had several bugs(PR32256, PR32241) recently that resulted from usages of AH/BH/CH/DH either before or after a copy to/from a mask register.

This ultimately occurs because we create COPY_TO_REGCLASS with VK1 and GR8. Then in CopyToFromAsymmetricReg in X86InstrInfo we find a 32-bit super register for the GR8 to emit the KMOV with. But as these tests are demonstrating, its possible for the GR8 register to be a high register and we end up doing an accidental extra or insert from bits 15:8.

I think the best way forward is to stop making copies directly between mask registers and GR8/GR16. Instead I think we should restrict to only copies between mask registers and GR32/GR64 and use EXTRACT_SUBREG/INSERT_SUBREG to handle the conversion from GR32 to GR16/8 or vice versa.

Unfortunately, this complicates fastisel a bit more now to create the subreg extracts where we used to create GR8 copies. We can probably make a helper function to bring down the repitition.

This does result in KMOVD being used for copies when BWI is available because we don't know the original mask register size. This caused a lot of deltas on tests because we have to split the checks for KMOVD vs KMOVW based on BWI.

Differential Revision: https://reviews.llvm.org/D30968

llvm-svn: 298928
2017-03-28 16:35:29 +00:00
Artem Dergachev 7333a9ea11 [analyzer] Fix symbolication for unknown unary increment/decrement results.
If the value is known, but we cannot increment it, conjure a symbol to
represent the result of the operation based on the operator expression,
not on the sub-expression.

In particular, no longer crash on comparing a result of a LocAsInteger increment
to a constant integer.

rdar://problem/31067356

Differential Revision: https://reviews.llvm.org/D31289

llvm-svn: 298927
2017-03-28 15:57:12 +00:00
Sanjay Patel 5d39a98612 [x86] add separate check prefix for SSE; NFC
We want to check each test on each target, so we need another prefix
when SSE and AVX diverge (as they will if we handle 32-byte and higher). 

llvm-svn: 298926
2017-03-28 15:55:50 +00:00
Simon Pilgrim 6b30172372 [X86][SSE] Refactored shuffle BLEND combining to make future 16i16 support easier. NFCI.
Call the matchVectorShuffleAsBlend test as early as possible.

llvm-svn: 298925
2017-03-28 15:50:23 +00:00
Artem Dergachev 647804a84a [analyzer] When creating a temporary object, properly copy the value into it.
Adjustments should be considered properly; we should copy the unadjusted object
over the whole temporary base region. If the unadjusted object is no longer
available in the Environment, invalidate the temporary base region, and then
copy the adjusted object into the adjusted sub-region of the temporary region.

This fixes a regression introduced by r288263, that caused various
false positives, due to copying only adjusted object into the adjusted region;
the rest of the base region therefore remained undefined.
Before r288263, the adjusted value was copied over the unadjusted region,
which is incorrect, but accidentally worked better due to how region store
disregards compound value bindings to non-base regions.

An additional test machinery is introduced to make sure that despite making
two binds, we only notify checkers once for both of them, without exposing
the partially copied objects.

This fix is a hack over a hack. The proper fix would be to model C++ temporaries
in the CFG, and after that dealing with adjustments would no longer be
necessary, and the values we need would no longer disappear from the
Environment.

rdar://problem/30658168

Differential Revision: https://reviews.llvm.org/D30534

llvm-svn: 298924
2017-03-28 15:43:26 +00:00
Nirav Dave 5b414ebe63 [SDAG] Avoid deleted SDNodes PromoteIntBinOp
Reorder work in PromoteIntBinOp to prevent stale (deleted) nodes from
being used.

Fixes PR32340 and PR32345.

Reviewers: hfinkel, dbabokin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31148

llvm-svn: 298923
2017-03-28 15:41:12 +00:00
Jonathan Roelofs af9d03aafa [libunwind] Add sphinx docs
https://reviews.llvm.org/D31375

llvm-svn: 298922
2017-03-28 15:21:43 +00:00
NAKAMURA Takumi 1fe3054d04 clangToolingRefactor: Add libdeps upon clangFormat in r298913.
llvm-svn: 298921
2017-03-28 14:18:10 +00:00
Nirav Dave 9b5563c52c [SDAG] Fix Stale SDNode usage in visitAND
Reorder CombineTo Calls to prevent potential use of deleted node.
Fixes PR32372.

Reviewers: jnspaulsson, RKSimon, uweigand, jonpa

Reviewed By: jonpa

Subscribers: jonpa, llvm-commits

Differential Revision: https://reviews.llvm.org/D31346

llvm-svn: 298920
2017-03-28 14:11:20 +00:00
Eric Liu be8d7a32c2 Try to unbreak buildbots after r298913.
llvm-svn: 298919
2017-03-28 13:56:19 +00:00
Sanjay Patel e4f11334fa [x86] add AVX2 run to show 256-bit opportunity; NFC
llvm-svn: 298918
2017-03-28 13:46:50 +00:00
Simon Pilgrim aa675ca77d Fix signed/unsigned comparison warning
llvm-svn: 298917
2017-03-28 13:40:09 +00:00
Nirav Dave 423b24ae76 [SDAG] Minor cleanup of variable usage. NFC.
llvm-svn: 298916
2017-03-28 13:39:50 +00:00
Andrey Churbanov cece72aa04 Fix for bug https://llvm.org/bugs/show_bug.cgi?id=30889
Condition adjusted for Debug assertion.

Differential Revision: https://reviews.llvm.org/D29638

llvm-svn: 298915
2017-03-28 13:35:42 +00:00
Simon Pilgrim d48f47e25c [X86][SSE] Begin merging vector shuffle to BLEND for lowering and combining.
Split off matchVectorShuffleAsBlend from lowerVectorShuffleAsBlend for reuse in combining.

llvm-svn: 298914
2017-03-28 13:05:48 +00:00
Eric Liu ea5c4a7ca3 Added `applyAtomicChanges` function.
Summary: ... which applies a set of `AtomicChange`s on code.

Reviewers: klimek, djasper

Reviewed By: djasper

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D30777

llvm-svn: 298913
2017-03-28 13:05:32 +00:00
Eric Liu 285f804282 [ASTMatchers] add typeAliasTemplateDecl matcher.
Reviewers: hokein, aaron.ballman

Reviewed By: aaron.ballman

Subscribers: aaron.ballman, cfe-commits, klimek

Differential Revision: https://reviews.llvm.org/D28671

llvm-svn: 298912
2017-03-28 12:56:47 +00:00
Simon Pilgrim 61437ebaf4 Wdocumentation fix
llvm-svn: 298911
2017-03-28 12:29:09 +00:00
Simon Pilgrim 6afe0e2833 [X86][SSE] Set second operand to undef instead of first operand in unary shuffle combines.
Copy isn't necessary after the matchVectorShuffleWithUNPCK refactor and undef value will make some future undef/zero handling easier.

llvm-svn: 298910
2017-03-28 12:16:42 +00:00