Commit Graph

1998 Commits

Author SHA1 Message Date
Martin Storsjo 818bd56809 [llvm-rc] Add support for all missing dialog controls
Differential Revision: https://reviews.llvm.org/D46507

llvm-svn: 331808
2018-05-08 20:55:58 +00:00
Max Moroz 0c5b602015 [Coverage] Take filenames into account when loading function records.
Summary:
Don't skip functions with the same name but from different files.

That change makes it possible to generate code coverage reports from
different binaries compiled from different sources even if there are functions
with non-unique names. Without that change, code coverage for such functions is
missing except of the first function processed.

Reviewers: vsk, morehouse

Reviewed By: vsk

Subscribers: llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D46478

llvm-svn: 331801
2018-05-08 19:26:51 +00:00
Alexander Shaposhnikov b07c22b081 [llvm-objcopy] Fix exit code
Set the exit code to 1 if no arguments are specified.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D46547

llvm-svn: 331776
2018-05-08 17:12:54 +00:00
Simon Pilgrim 2864b46469 [X86] Split off WriteIMul64 from WriteIMul schedule class (PR36931)
This fixes a couple of BtVer2 missing instructions that weren't been handled in the override.

NOTE: There are still a lot of overrides that still need cleaning up!
llvm-svn: 331770
2018-05-08 14:55:16 +00:00
Simon Pilgrim 739d1a68aa [llvm][x86] SandyBridge/IvyBridge don't support BMI1/BMI2
llvm-svn: 331769
2018-05-08 14:20:25 +00:00
Simon Pilgrim 2580554333 [X86] Split WriteIDiv into div/idiv 8/16/32/64 implementations (PR36930)
I've created the necessary classes but there are still a lot of overrides that need cleaning up.

NOTE: The Znver1 model was missing some div/idiv variants in the instregex patterns and wasn't setting the resource cycles at all in the overrides.
llvm-svn: 331767
2018-05-08 13:51:45 +00:00
Simon Pilgrim 4283924e08 [llvm-mca][x86] Add div/idiv, mul/imul and inc/dec/neg/nop instruction tests
llvm-svn: 331765
2018-05-08 13:30:58 +00:00
Martin Storsjo 4021cee996 [llvm-rc] Don't strictly require quotes around external file names
Regardless of what docs may say, existing resource files in the
wild can use this syntax.

Rename a file used in an existing test, to make it usable for unquoted
paths.

Differential Revision: https://reviews.llvm.org/D46511

llvm-svn: 331747
2018-05-08 08:47:37 +00:00
Simon Pilgrim 061096d2c2 [llvm-mca][x86] Remove addsubpd from SSE2 tests
llvm-svn: 331678
2018-05-07 21:10:48 +00:00
Simon Pilgrim 1233e1234a [X86] Split WriteFAdd/WriteFCmp/WriteFMul schedule classes
Split to support single/double for scalar, XMM and YMM/ZMM instructions - removing InstrRW overrides for these instructions.

Fixes Atom ADDSUBPD instruction and reclassifies VFPCLASS as WriteFCmp which is closer in behaviour.

llvm-svn: 331672
2018-05-07 20:52:53 +00:00
Martin Storsjo 577b981748 [llvm-rc] Implement the BITMAP resource type
Differential Revision: https://reviews.llvm.org/D46509

llvm-svn: 331670
2018-05-07 20:27:37 +00:00
Martin Storsjo 9410276cf7 [llvm-rc] Allow optional commas between the string table index and value
This form is even used in one of the examples at
https://msdn.microsoft.com/en-us/library/windows/desktop/aa381050(v=vs.85).aspx.

Differential Revision: https://reviews.llvm.org/D46508

llvm-svn: 331669
2018-05-07 20:27:28 +00:00
Martin Storsjo 28ae894a1d [llvm-rc] Exclude padding from sizes in versioninfo resources
Normally when writing something that requires padding, we first
measure the length of the written payload data, then write
padding if necessary.

For a recursive structure like versioninfo, this means that the
padding is excluded from the size of the inner element, but
included in the size of the enclosing block.

Rc.exe excludes the final padding (but not the padding of earlier
children) from all levels of the hierarchy.

To achieve this, don't pad after each block or value, but only
before starting the next one. We still pad after completing the
toplevel versioninfo resource, so this won't affect other resource
types.

Differential Revision: https://reviews.llvm.org/D46510

llvm-svn: 331668
2018-05-07 20:27:23 +00:00
Alexander Shaposhnikov cca6998504 [tools] Introduce llvm-strip
llvm-strip is supposed to be a drop-in replacement for binutils strip.
To start the ball rolling this diff adds the initial bits for llvm-strip,
more features will be added incrementally over time.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D46407

llvm-svn: 331663
2018-05-07 19:32:09 +00:00
Simon Pilgrim e480ed0b9f [X86][AVX2] Tag VPMOVSX/VPMOVZX ymm instructions as WriteShuffle256
These are more like cross-lane shuffles than regular shuffles - we already do this for AVX512 equivalents.

Differential Revision: https://reviews.llvm.org/D46229

llvm-svn: 331659
2018-05-07 18:25:19 +00:00
Simon Pilgrim 763bf12085 [X86][Znver1] Remove WriteFMul/WriteFRcp InstRW overrides/aliases.
Fixes x87 schedules to more closely match Agner - AMD doesn't tend to "special case" x87 instructions as much as Intel.

llvm-svn: 331645
2018-05-07 16:34:26 +00:00
Simon Pilgrim ac5d0a31ef [X86] Split WriteFDiv schedule classes to support single/double scalar, XMM and YMM/ZMM instructions.
This removes all InstrRW overrides for these instructions - some x87 overrides remain but most use default (and realistic) values.

llvm-svn: 331643
2018-05-07 16:15:46 +00:00
Simon Pilgrim f3ae50fca2 [X86] Split WriteFRcp/WriteFRsqrt/WriteFSqrt schedule classes
WriteFRcp/WriteFRsqrt are split to support scalar, XMM and YMM/ZMM instructions.

WriteFSqrt is split into single/double/long-double sizes and scalar, XMM, YMM and ZMM instructions.

This removes all InstrRW overrides for these instructions.

NOTE: There were a couple of typos in the Znver1 model - notably a 1cy throughput for SQRT that is highly unlikely and doesn't tally with Agner.

NOTE: I had to add Agner's numbers for several targets for WriteFSqrt80.
llvm-svn: 331629
2018-05-07 11:50:44 +00:00
Simon Pilgrim 0e51a125ea [X86] Add WriteEMMS scheduler class
Filled in the missing values from Btver2 SoG or Agner

llvm-svn: 331546
2018-05-04 18:16:13 +00:00
Simon Pilgrim be51b20127 [X86] Add SchedWriteFRnd fp rounding scheduler classes
Split off from SchedWriteFAdd for fp rounding/bit-manipulation instructions.

Fixes an issue on btver2 which only had the ymm version using the JSTC pipe instead of JFPA.

llvm-svn: 331515
2018-05-04 12:59:24 +00:00
Simon Pilgrim 0aed731516 [X86][Znver1] Use SchedAlias to tag microcoded scheduler classes
Avoids extra entries in the class tables.

Found a typo that missed the MMX_PHSUBSW instruction.

llvm-svn: 331488
2018-05-03 22:12:23 +00:00
Martin Storsjo e3b437935f [llvm-rc] Default to writing the output next to the input, if no output is specified
This matches what rc.exe does if no output is specified.

Differential Revision: https://reviews.llvm.org/D46239

llvm-svn: 331403
2018-05-02 21:15:24 +00:00
Martin Storsjo ca16978967 [llvm-cvtres] Allow parameters preceded by '-' in addition to '/'
The real cvtres.exe also allows parameters in either form.

Differential Revision: https://reviews.llvm.org/D46358

llvm-svn: 331402
2018-05-02 21:15:13 +00:00
Paul Semel 41695f8e73 [llvm-objcopy] Add --discard-all (-x) option
llvm-svn: 331400
2018-05-02 20:19:22 +00:00
Paul Semel 2c0510f040 [llvm-objcopy] Add --weaken option
llvm-svn: 331397
2018-05-02 20:14:49 +00:00
Martin Storsjo d1d046aa32 [llvm-rc] Add rudimentary support for codepages
Only support UTF-8 (since LLVM contains UTF-8 parsing support
already, and the code even does that already) and Windows-1252
(where most code points has the same value in unicode). Keep the
existing default as only allowing ASCII input.

Using the option type JoinedOrSeparate, since the real rc.exe
handles options in this form, even if llvm-rc uses Separate for
other similar existing options.

Rename the struct SearchParams to WriterParams since it's now used
for more than just include paths.

Add a missing getResourceTypeName method to the BundleResource class,
to fix error printing from within STRINGTABLE resources (used in
tests).

Differential Revision: https://reviews.llvm.org/D46238

llvm-svn: 331391
2018-05-02 19:43:44 +00:00
Simon Pilgrim 350c22c587 [X86][SNB] Fix scheduling of MMX integer multiply instructions.
The entries were being bound to the wrong class.

llvm-svn: 331388
2018-05-02 19:26:14 +00:00
Clement Courbet a1a3095d88 [X86] Fix scheduling info for (V?)SQRTPDm on silvermont.
https://reviews.llvm.org/D46356

llvm-svn: 331356
2018-05-02 13:46:14 +00:00
Sam Clegg 7381216710 [WebAssembly] llvm-readobj: display symbols names in relocations
Differential Revision: https://reviews.llvm.org/D46296

llvm-svn: 331279
2018-05-01 16:35:16 +00:00
Jonas Devlieghere 4bbcb5ab04 [DebugInfo] Prevent infinite recursion for malformed DWARF
This prevents infinite recursion in DWARFDie::findRecursively for
malformed DWARF where a DIE references itself.

This fixes PR36257.

Differential revision: https://reviews.llvm.org/D43092

llvm-svn: 331200
2018-04-30 17:02:41 +00:00
Andrea Di Biagio e047d3529b [llvm-mca] Correctly handle zero-latency stores that consume pipeline resources.
This fixes PR37293.

We can have scheduling classes with no write latency entries, that still consume
processor resources. We don't want to treat those instructions as zero-latency
instructions; they still have to be issued to the underlying pipelines, so they
still consume resource cycles.

This is likely to be a regression which I have accidentally introduced at
revision 330807. Now, if an instruction has a non-empty set of write processor
resources, we conservatively treat it as a normal (i.e. non zero-latency)
instruction.

llvm-svn: 331193
2018-04-30 15:55:04 +00:00
Andrea Di Biagio 77bd1c748a [llvm-mca] Regenerate test Atom/resources-sse3.s. NFC
Before this change, it wrongly specified -mcpu=slm instead of -mcpu=atom.

llvm-svn: 331170
2018-04-30 12:13:04 +00:00
Andrea Di Biagio e9384eb13b [llvm-mca] Support for in-order CPU for -instruction-tables testing.
Added Intel Atom tests to verify that the tool correctly generates instruction
tables even if the CPU is in-order.

Fixes PR37282.

llvm-svn: 331169
2018-04-30 12:05:34 +00:00
Simon Pilgrim 8962c344f9 [llvm-mca][X86] Add BT resource tests to all models
llvm-svn: 331144
2018-04-29 15:45:31 +00:00
Simon Pilgrim 2d569361fc [llvm-mca][X86] Add add/adc + sub/sbb resource tests to all models
llvm-svn: 331140
2018-04-29 11:03:25 +00:00
Simon Pilgrim 318e9d39ab [llvm-mca][X86] Add double shift resource tests to all relevant models
llvm-svn: 331109
2018-04-28 15:18:49 +00:00
Simon Pilgrim 4d0187c893 [llvm-mca][X86] Add shift/rotate resource tests to all relevant models
I intend to add further instruction tests to the resources-x86_64.s test file as required, but this initial commit is to help remove a load of unnecessary InstRW overrides in a future patch

llvm-svn: 331108
2018-04-28 14:56:18 +00:00
Paul Semel 3a8a56b8b7 [llvm-objcopy] Add --weaken-symbol (-W) option
llvm-svn: 331070
2018-04-27 19:16:27 +00:00
Paul Semel ee5be798da [llvm-objcopy] Add --globalize-symbol option
llvm-svn: 331068
2018-04-27 19:09:44 +00:00
Sam Clegg e0658119ba typo
llvm-svn: 331006
2018-04-27 00:17:24 +00:00
Sam Clegg d5504a0a62 [WebAssembly] Section symbols must have local binding
Summary: Also test for symbols information in test/MC/WebAssembly/debug-info.ll.

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D46160

llvm-svn: 331005
2018-04-27 00:17:21 +00:00
Alexander Shaposhnikov 40e9bdf9af [llvm-objcopy] Implement --redefine-sym option
This diff implements --redefine-sym option 
for changing the name of a symbol.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D46029

llvm-svn: 330973
2018-04-26 18:28:17 +00:00
Sam Clegg 6bb5a41f99 [WebAssembly] Add version to object file metadata
Summary: See https://github.com/WebAssembly/tool-conventions/issues/54

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46069

llvm-svn: 330969
2018-04-26 18:15:32 +00:00
Paul Semel b492494c0f [llvm-objcopy] Add --localize-symbol option
llvm-svn: 330963
2018-04-26 17:44:43 +00:00
Sam Clegg 8c4b0ce2b1 [WebAssembly] objdump: Don't assume all relocations have symbols
Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46134

llvm-svn: 330959
2018-04-26 17:05:04 +00:00
Sam Clegg f676cdd515 [WebAssembly] Implement getRelocationValueString()
And use it in llvm-objdump.

Differential Revision: https://reviews.llvm.org/D46092

llvm-svn: 330957
2018-04-26 16:41:51 +00:00
Simon Pilgrim 7574ffd7bc [llvm-mca][X86] Updated fma3 tests after rL330820
llvm-svn: 330822
2018-04-25 13:19:04 +00:00
Andrea Di Biagio 93c49d5e58 [llvm-mca] Default to the native host cpu if flag -mcpu is not specified.
llvm-svn: 330809
2018-04-25 10:18:25 +00:00
Simon Pilgrim 27bc83e228 [X86] Split off PHMINPOSUW to their own schedule class
This also fixes Jaguar's schedule which was treating it as the WriteVecIMul default. 

llvm-svn: 330756
2018-04-24 18:49:25 +00:00
Sam Clegg 6f08c84ae5 [WebAssembly] Use section index in relocation section header
Rather than referring to sections my their code, use the
absolute index of the target section within the module.

See https://github.com/WebAssembly/tool-conventions/issues/52

Differential Revision: https://reviews.llvm.org/D45980

llvm-svn: 330749
2018-04-24 18:11:36 +00:00