llvm-project

Commit Graph

Author	SHA1	Message	Date
Simon Pilgrim	8a83f16ccd	[X86][SandyBridge] SBWriteResPair +5cy Memory Folds As mentioned on D44647, this patch increases the default memory latency to +5cy , which more closely matches what most custom cases are doing for reg-mem instructions. I've bumped LoadLatency, ReadAfterLd and WriteLoad values to 5cy to be consistent. As Sandy Bridge is currently our default generic model, this affects a lot of scheduling tests... Differential Revision: https://reviews.llvm.org/D44654 llvm-svn: 329388	2018-04-06 11:00:51 +00:00
Simon Pilgrim	49dbfe7de9	[X86] Add CLWB schedule test llvm-svn: 320644	2017-12-13 22:09:09 +00:00

Author

SHA1

Message

Date

Simon Pilgrim

8a83f16ccd

[X86][SandyBridge] SBWriteResPair +5cy Memory Folds

As mentioned on D44647, this patch increases the default memory latency to +5cy , which more closely matches what most custom cases are doing for reg-mem instructions.

I've bumped LoadLatency, ReadAfterLd and WriteLoad values to 5cy to be consistent.

As Sandy Bridge is currently our default generic model, this affects a lot of scheduling tests...

Differential Revision: https://reviews.llvm.org/D44654

llvm-svn: 329388

2018-04-06 11:00:51 +00:00

Simon Pilgrim

49dbfe7de9

[X86] Add CLWB schedule test

llvm-svn: 320644

2017-12-13 22:09:09 +00:00

2 Commits