62 Commits

Author	SHA1	Message	Date
Evan Cheng	1d764eca98	Hooks for predication support. ... llvm-svn: 37308	2007-05-23 07:22:05 +00:00
Evan Cheng	e20dd92792	RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. ... llvm-svn: 37193	2007-05-18 00:18:17 +00:00
Evan Cheng	dcff2eb0e8	PredicateInstruction returns true if the operation was successful. ... llvm-svn: 37124	2007-05-16 21:53:07 +00:00
Evan Cheng	e2762c3d68	Removed isPredicable(). ... llvm-svn: 37119	2007-05-16 20:50:23 +00:00
Evan Cheng	ad3aac71ce	Hooks for predication support. ... llvm-svn: 37093	2007-05-16 02:01:49 +00:00
Evan Cheng	760c68b8af	Factor GetInstSize() out of constpool island pass. ... llvm-svn: 33644	2007-01-29 23:45:17 +00:00
Jim Laskey	f9e5445ed4	Make LABEL a builtin opcode. ... llvm-svn: 33537	2007-01-26 14:34:52 +00:00
Evan Cheng	10043e215b	ARM backend contribution from Apple. ... llvm-svn: 33353	2007-01-19 07:51:42 +00:00
Chris Lattner	aaeede0aa2	implement uncond branch insertion, mark branches with isBranch. ... llvm-svn: 31160	2006-10-24 16:47:57 +00:00
Rafael Espindola	8c41f99e6f	change the addressing mode of the str instruction to reg+imm ... llvm-svn: 29571	2006-08-08 20:35:03 +00:00
Rafael Espindola	e40a7e2aa2	create the raddr addressing mode that matches any register and the frame index ... use raddr for the ldr instruction. This removes a dummy mov from the assembly output remove SelectFrameIndex remove isLoadFromStackSlot remove isStoreToStackSlot llvm-svn: 29079	2006-07-10 01:41:35 +00:00
Rafael Espindola	ffdc24b847	added a skeleton of the ARM backend ... llvm-svn: 28301	2006-05-14 22:18:28 +00:00