Commit Graph

23 Commits

Author SHA1 Message Date
Dan Gohman 174b2d83ee [WebAssembly] Set several MCInstrDesc flags.
llvm-svn: 254271
2015-11-29 22:59:19 +00:00
Dan Gohman fb3e0594e4 [WebAssembly] Use a physical register to describe ARGUMENT liveness.
Instead of trying to move ARGUMENT instructions back up to the top after
they've been scheduled or sunk down, use a fake physical register to
create a liveness constraint that prevents ARGUMENT instructions from
moving down in the first place. This is still not entirely ideal, however
it is more robust than letting them move and moving them back.

llvm-svn: 254084
2015-11-25 19:36:19 +00:00
Dan Gohman 2c8fe6a428 [WebAssembly] Codegen support for ISD::ExternalSymbol
llvm-svn: 254075
2015-11-25 16:44:29 +00:00
Dan Gohman aa0a4bd05b [WebAssembly] Don't use set_local instructions explicitly.
The current approach to using get_local and set_local is to use them
implicitly, as register uses and defs. Introduce new copy instructions
which are themselves no-ops except for the get_local and set_local
that they imply, so that we use get_local and set_local consistently.

llvm-svn: 253905
2015-11-23 19:30:43 +00:00
Dan Gohman 53828fd777 [WebAssembly] Emit .param, .result, and .local through MC.
This eliminates one of the main remaining uses of EmitRawText.

llvm-svn: 253878
2015-11-23 16:50:18 +00:00
Dan Gohman bb7ce8e408 [WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.
llvm-svn: 253642
2015-11-20 03:02:49 +00:00
Dan Gohman 4ba4816b97 [WebAssembly] Enable register coloring and register stackifying.
This also takes the push/pop syntax another step forward, introducing stack
slot numbers to make it easier to see how expressions are connected. For
example, the value pushed in $push7 is popped in $pop7.

And, this begins an experiment with making get_local and set_local implicit
when an operation directly uses or defines a register. This greatly reduces
clutter. If this experiment succeeds, it may make sense to do this for
const instructions as well.

And, this introduces more special code for ARGUMENTS; hopefully this code
will soon be obviated by proper support for live-in virtual registers.

llvm-svn: 253465
2015-11-18 16:12:01 +00:00
Derek Schuff 71e8169ea8 [WebAssembly] Fix printing of global operands
This was regressed in r252656 which wasn't quite NFC. Instead of using a
custom instruction as before, use a pattern to select CONST_I32 for the
global addrs.

Differential Revision: http://reviews.llvm.org/D14587

llvm-svn: 253276
2015-11-17 00:20:44 +00:00
Dan Gohman 1031d4a8c3 [WebAssembly] Use tabs instead of spaces in assembly output.
This seems to be the most popular convention among the other backends.

llvm-svn: 253172
2015-11-15 15:34:19 +00:00
Dan Gohman dd0071f440 [WebAssembly] Rename the Const instructions to be upper-case too.
llvm-svn: 253072
2015-11-13 20:27:45 +00:00
Dan Gohman da7f428a4a [WebAssembly] Rename Immediate instructions to Const.
This more closely reflects the naming convention in the spec.

llvm-svn: 252204
2015-11-05 20:44:29 +00:00
Dan Gohman af29bd4fd4 [WebAssembly] Add AsmString strings for most instructions.
Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC instruction
printer wants to use AsmString strings for printing. This patch takes the
first step, starting the process of adding AsmStrings for instructions.

llvm-svn: 252203
2015-11-05 20:42:30 +00:00
Dan Gohman d0bf981296 [WebAssembly] Rename several functions and types according to the new spec.
llvm-svn: 248644
2015-09-26 01:09:44 +00:00
Dan Gohman 950a13cfa3 [WebAssembly] Check in an initial CFG Stackifier pass
This pass implements a simple algorithm for conversion from CFG to
wasm's structured control flow. It doesn't yet handle multiple-entry
loops; that will be added in a future patch.

It also adds initial support for switch statements.

Differential Revision: http://reviews.llvm.org/D12735

llvm-svn: 247818
2015-09-16 16:51:30 +00:00
Dan Gohman f71abef701 [WebAssembly] Implement calls with void return types.
llvm-svn: 247158
2015-09-09 16:13:47 +00:00
JF Bastien af111db8af WebAssembly: Implement call
Summary: Support function calls.

Reviewers: sunfish, sunfishcode

Subscribers: sunfishcode, jfb, llvm-commits

Differential revision: http://reviews.llvm.org/D12219

llvm-svn: 245887
2015-08-24 22:16:48 +00:00
JF Bastien 4a6422562d WebAssembly: print immediates
Summary:
For now output using C99's hexadecimal floating-point representation.

This patch also cleans up how machine operands are printed: instead of special-casing per type of machine instruction, the code now handles operands generically.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11914

llvm-svn: 244520
2015-08-10 22:36:48 +00:00
JF Bastien 8f9aea08d4 WebAssembly: handle more than int32 argument/return
Summary: Also test 64-bit integers, except shifts for now which are broken because isel dislikes the 32-bit truncate that precedes them.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11699

llvm-svn: 243822
2015-08-01 04:48:44 +00:00
JF Bastien 4a2d56044f WebAssembly: handle `ret void`.
Summary:
Use -1 as numoperands for the return SDTypeProfile, denoting that return is variadic. Note that the patterns in InstrControl.td still need to match the inputs, so this ins't an "anything goes" variadic on ret!

The next step will be to handle other local types (not just int32).

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11692

llvm-svn: 243783
2015-07-31 21:04:18 +00:00
JF Bastien 600aee9805 WebAssembly: print basic integer assembly.
Summary:
This prints assembly for int32 integer operations defined in WebAssemblyInstrInteger.td only, with major caveats:

  - The operation names are currently incorrect.
  - Other integer and floating-point types will be added later.
  - The printer isn't factored out to handle recursive AST code yet, since it can't even handle control flow anyways.
  - The assembly format isn't full s-expressions yet either, this will be added later.
  - This currently disables PrologEpilogCodeInserter as well as MachineCopyPropagation becasue they don't like virtual registers, which WebAssembly likes quite a bit. This will be fixed by factoring out NVPTX's change (currently a fork of PrologEpilogCodeInserter).

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11671

llvm-svn: 243763
2015-07-31 17:53:38 +00:00
JF Bastien 5ca0baca4a WebAssembly: basic instructions todo, and basic register info.
Summary:
This code is based on AArch64 for modern backend good practice, and NVPTX for
virtual ISA concerns.

Reviewers: sunfish

Subscribers: aemerson, llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11070

llvm-svn: 241923
2015-07-10 18:23:10 +00:00
JF Bastien 03855df197 WebAssembly: start instructions
Summary:
* Add 64-bit address space feature.
* Rename SIMD feature to SIMD128.
* Handle single-thread model with an IR pass (same way ARM does).
* Rename generic processor to MVP, to follow design's lead.
* Add bleeding-edge processors, with all features included.
* Fix a few DEBUG_TYPE to match other backends.

Test Plan: ninja check

Reviewers: sunfish

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D10880

llvm-svn: 241211
2015-07-01 23:41:25 +00:00
Dan Gohman 10e730a263 [WebAssembly] Initial WebAssembly backend
This WebAssembly backend is just a skeleton at this time and is not yet
functional.

llvm-svn: 241022
2015-06-29 23:51:55 +00:00