Commit Graph

62 Commits

Author SHA1 Message Date
Eli Bendersky f33086052d Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu
* Removed test/lib/llvm.exp - it is no longer needed 
* Deleted the dg.exp reading code from test/lit.cfg. There are no dg.exp files
  left in the test suite so this code is no longer required. test/lit.cfg is
  now much shorter and clearer 
* Removed a lot of duplicate code in lit.local.cfg files that need access to
  the root configuration, by adding a "root" attribute to the TestingConfig
  object. This attribute is dynamically computed to provide the same
  information as was previously provided by the custom getRoot functions. 
* Documented the config.root attribute in docs/CommandGuide/lit.pod

llvm-svn: 153408
2012-03-25 09:02:19 +00:00
Eli Bendersky 924f9a671d Replace all instances of dg.exp file with lit.local.cfg, since all tests are run with LIT now and now Dejagnu. dg.exp is no longer needed.
Patch reviewed by Daniel Dunbar. It will be followed by additional cleanup patches.

llvm-svn: 150664
2012-02-16 06:28:33 +00:00
Justin Holewinski 04424665c3 PTX: Continue to fix up the register mess.
llvm-svn: 145947
2011-12-06 17:39:48 +00:00
Dan Bailey 089cc53232 allow non-device function calls in PTX when natively handling device-side printf
llvm-svn: 144388
2011-11-11 14:45:12 +00:00
Dan Bailey b68515c232 fixed global array handling for ptx to use the correct bit widths
llvm-svn: 143640
2011-11-03 19:24:46 +00:00
Dan Gohman c32af340fc Change the default scheduler from Latency to ILP, since Latency
is going away.

llvm-svn: 142810
2011-10-24 17:45:02 +00:00
Justin Holewinski 1fb5bb126e PTX: Fix disabling of MAD instruction selection
llvm-svn: 142352
2011-10-18 13:39:20 +00:00
Justin Holewinski fd47d8af8b PTX: Add new patterns for bitconvert and any_extend
llvm-svn: 140753
2011-09-29 01:13:12 +00:00
Justin Holewinski 5e18b14ee2 PTX: MC-ize the PTX back-end (patch 1 of N)
Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

llvm-svn: 140697
2011-09-28 14:32:04 +00:00
Justin Holewinski 9f01f89386 PTX: Add support for sitofp in backend
llvm-svn: 140593
2011-09-27 01:04:47 +00:00
Justin Holewinski 1395cf8423 PTX: Fix detection of stack load/store vs. global load/store, as well as fix the
printing of local offsets

llvm-svn: 140547
2011-09-26 18:57:22 +00:00
Justin Holewinski 55f340eb62 PTX: Add .align tests to stack object test file
llvm-svn: 140537
2011-09-26 16:20:38 +00:00
Justin Holewinski 14defde057 PTX: Fix some lingering issues with stack allocation
llvm-svn: 140535
2011-09-26 16:20:34 +00:00
Justin Holewinski d40f5ababf PTX: Unify handling of loads/stores
llvm-svn: 140533
2011-09-26 16:20:28 +00:00
Justin Holewinski 37f35f0083 PTX: Handle function call return values
llvm-svn: 140386
2011-09-23 16:48:41 +00:00
Justin Holewinski 6c23d2ee55 PTX: Start fixing function calls
llvm-svn: 140378
2011-09-23 14:31:12 +00:00
Justin Holewinski 5862332f59 PTX: fixup test cases for register changes
llvm-svn: 140311
2011-09-22 16:45:51 +00:00
Justin Holewinski db05c2b963 PTX: Add initial support for device function calls
- Calls are supported on SM 2.0+ for function with no return values

llvm-svn: 137125
2011-08-09 17:36:31 +00:00
Dan Bailey b49b736519 PTX: corrected tests that were failing
llvm-svn: 133875
2011-06-25 19:41:17 +00:00
Dan Bailey b7ee561399 PTX: Reverting implementation of i8.
The .b8 operations in PTX are far more limiting than I first thought. The mov operation isn't even supported, so there's no way of converting a .pred value into a .b8 without going via .b16, which is
not sensible. An improved implementation needs to use the fact that loads and stores automatically extend and truncate to implement support for EXTLOAD and TRUNCSTORE in order to correctly support
boolean values.

llvm-svn: 133873
2011-06-25 18:16:28 +00:00
Dan Bailey dd01c4ac7a PTX: Add support for i8 type and introduce associated .b8 registers
The i8 type is required for boolean values, but can only use ld, st and mov instructions. The i1 type continues to be used for predicates.

llvm-svn: 133814
2011-06-24 19:27:10 +00:00
Justin Holewinski 6cdd72a9ca PTX: Always use registers for return values, but use .param space for device
parameters if SM >= 2.0

- Update test cases to be more robust against register allocation changes
- Bump up the number of registers to 128 per type
- Include Python script to re-generate register file with any number of
  registers

llvm-svn: 133736
2011-06-23 18:10:13 +00:00
Justin Holewinski a4aecf3dc4 PTX: Fixup test cases for device param changes
llvm-svn: 133735
2011-06-23 18:10:08 +00:00
Justin Holewinski 6fafebfb6a PTX: Add signed integer comparisons
llvm-svn: 133599
2011-06-22 02:09:50 +00:00
Justin Holewinski 54e3c0f5d9 PTX: Add .address_size directive if PTX version >= 2.3
Patch by Wei-Ren Chen

llvm-svn: 133589
2011-06-22 00:43:56 +00:00
Justin Holewinski cd4484d25d PTX: Fix conversion between predicates and value types
llvm-svn: 133454
2011-06-20 18:42:48 +00:00
Justin Holewinski 3604d9a421 PTX: Adjust rounding modes
* rounding modes for fp add, mul, sub now use .rn
* float -> int rounding correctly uses .rzi not .rni
* 32bit fdiv for sm13 uses div.rn (instead of div.approx)
* 32bit fdiv for sm10 now uses div (instead of div.approx)

Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit.

All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend.

Patch by Dan Bailey

llvm-svn: 133253
2011-06-17 12:12:42 +00:00
Justin Holewinski 7f191b2a3b PTX: Finish new calling convention implementation
llvm-svn: 133172
2011-06-16 17:50:00 +00:00
Justin Holewinski bbdcd17d44 PTX: add flag to disable mad/fma selection
Patch by Dan Bailey

llvm-svn: 131537
2011-05-18 15:42:23 +00:00
Justin Holewinski 3c0447259c PTX: add test cases for cvt, fneg, and selp
Patch by Dan Bailey

llvm-svn: 131128
2011-05-10 14:53:13 +00:00
Justin Holewinski 11d70b6b32 PTX: add PTX 2.3 language target
Patch by Wei-Ren Chen

llvm-svn: 130980
2011-05-06 11:40:36 +00:00
Justin Holewinski 18e6ac83ea PTX: support for bitwise operations on predicates
- selection of bitwise preds (AND, OR, XOR)
- new bitwise.ll test

Patch by Dan Bailey

llvm-svn: 130353
2011-04-28 00:19:51 +00:00
Benjamin Kramer ba446cc12a Make tests more useful.
lit needs a linter ...

llvm-svn: 130126
2011-04-25 10:12:01 +00:00
Che-Liang Chiou 14c48e5d66 ptx: fix parameter ordering
This patch depends on the prior fix r129908 that changes to use std::find,
rather than std::binary_search, on unordered array.

Patch by Dan Bailey

llvm-svn: 129909
2011-04-21 10:56:58 +00:00
Justin Holewinski 7d8895e767 PTX: Add intrinsics to list of built-in intrinsics, which allows them to be
used by Clang.  To help Clang integration, the PTX target has been split
     into two targets: ptx32 and ptx64, depending on the desired pointer size.

- Add GCCBuiltin class to all intrinsics
- Split PTX target into ptx32 and ptx64

llvm-svn: 129851
2011-04-20 15:37:17 +00:00
Che-Liang Chiou e34b271718 ptx: support setp's 4-operand format
llvm-svn: 128767
2011-04-02 08:51:39 +00:00
Che-Liang Chiou 7413080cea ptx: add analyze/insert/remove branch
llvm-svn: 128084
2011-03-22 14:12:00 +00:00
Justin Holewinski 0984dcc077 PTX: Fix various codegen issues
- Emit mad instead of mad.rn for shader model 1.0
- Emit explicit mov.u32 instructions for reading global variables
- (most PTX instructions cannot take global variable immediates)

llvm-svn: 127895
2011-03-18 19:24:28 +00:00
Che-Liang Chiou b1df0fe1cc ptx: fix parameter order that is reversed
llvm-svn: 127874
2011-03-18 11:23:56 +00:00
Che-Liang Chiou ff9d938e33 ptx: add unconditional and conditional branch
llvm-svn: 127873
2011-03-18 11:08:52 +00:00
Justin Holewinski 94751fbf32 PTX: Set PTX 2.0 as the minimum supported version
- Remove PTX 1.4 code generation
- Change type of intrinsics to .v4.i32 instead of .v4.i16
- Add and/or/xor integer instructions

llvm-svn: 127677
2011-03-15 13:24:15 +00:00
Justin Holewinski fbc8d301bf PTX: Emit global arrays with proper sizes
- Emit all arrays as type .b8 and proper sizes in bytes to conform
  to the output of nvcc

llvm-svn: 127584
2011-03-14 15:40:11 +00:00
Justin Holewinski 8509380f83 PTX: Add support for sqrt/sin/cos intrinsics
llvm-svn: 127578
2011-03-14 14:09:33 +00:00
Che-Liang Chiou a19f075974 ptx: add set.p instruction and related changes to predicate execution
llvm-svn: 127577
2011-03-14 11:26:01 +00:00
Justin Holewinski 72ff7e4fa9 PTX: Add preliminary support for floating-point divide and multiply-and-add
llvm-svn: 127410
2011-03-10 16:57:18 +00:00
Che-Liang Chiou 6e9fb0d056 ptx: add the rest of special registers of ISA version 2.0
llvm-svn: 127397
2011-03-10 04:05:57 +00:00
Justin Holewinski 42e9aaa4b1 PTX: Add intrinsic support for ntid, ctaid, and nctaid registers
llvm-svn: 127246
2011-03-08 14:10:18 +00:00
Che-Liang Chiou 369ea3fdb4 ptx: add basic intrinsic support
llvm-svn: 127084
2011-03-05 14:17:37 +00:00
Che-Liang Chiou 65b1476031 Extend initial support for primitive types in PTX backend
- Allow i16, i32, i64, float, and double types, using the native .u16,
  .u32, .u64, .f32, and .f64 PTX types.
- Allow loading/storing of all primitive types.
- Allow primitive types to be passed as parameters.
- Allow selection of PTX Version and Shader Model as sub-target attributes.
- Merge integer/floating-point test cases for load/store.
- Use .u32 instead of .s32 to conform to output from NVidia nvcc compiler.

Patch by Justin Holewinski

llvm-svn: 126824
2011-03-02 03:20:28 +00:00
Che-Liang Chiou 75a800d3bf Add preliminary support for .f32 in the PTX backend.
- Add appropriate TableGen patterns for fadd, fsub, fmul.
- Add .f32 as the PTX type for the LLVM float type.
- Allow parameters, return values, and global variable declarations
  to accept the float type.
- Add appropriate test cases.

Patch by Justin Holewinski

llvm-svn: 126636
2011-02-28 06:34:09 +00:00