3 Commits

Author	SHA1	Message	Date
Evan Cheng	cf67ffa500	Rever 96389 and 96990. They are causing some miscompilation that I do not fully understand. ... llvm-svn: 97782	2010-03-05 03:08:23 +00:00
Evan Cheng	82b04130cb	Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)). ... If there exists a use of a build_vector that's the bitwise complement of the mask, then transform the node to (and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)). Since this transformation is only useful when 1) the given build_vector will become a load from constpool, and 2) (and (xor x -1), y) matches to a single instruction, I decided this is appropriate as a x86 specific transformation. rdar://7323335 llvm-svn: 96389	2010-02-16 21:09:44 +00:00
Dan Gohman	521efe68ab	Split the main for-each-use loop again, this time for GenerateTruncates, ... as it also peeks at which registers are being used by other uses. This makes LSR less sensitive to use-list order. llvm-svn: 96308	2010-02-16 01:42:53 +00:00