Evan Cheng
297e1cb10a
Remove CalleeSavedRegisters from class Target.
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llvm-svn: 28377
2006-05-18 00:09:53 +00:00
Evan Cheng
dcec882286
Remove PointerType from class Target
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llvm-svn: 28368
2006-05-17 21:20:27 +00:00
Vladimir Prus
788db2c812
Replace "../whatever.td" with "whatever.td", so that out-of-tree backends
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can just add lib/Target to TableGen includes.
llvm-svn: 28318
2006-05-16 06:39:36 +00:00
Chris Lattner
fce45ffcd6
Improve comment, patch provided by Vladimir Prus!
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llvm-svn: 28307
2006-05-15 18:35:02 +00:00
Chris Lattner
215280d8b9
Update comment.
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llvm-svn: 28283
2006-05-14 02:05:19 +00:00
Chris Lattner
85e9909755
Put PHI/INLINEASM into the correct namespace.
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llvm-svn: 28037
2006-05-01 17:00:49 +00:00
Evan Cheng
52df74000a
Renamed AddedCost to AddedComplexity.
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llvm-svn: 27843
2006-04-19 20:38:28 +00:00
Evan Cheng
aa3325e925
Allow "let AddedCost = n in" to increase pattern complexity.
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llvm-svn: 27834
2006-04-19 18:07:24 +00:00
Jim Laskey
3b338d5566
Add support for dwarf register numbering.
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llvm-svn: 27080
2006-03-24 21:13:21 +00:00
Chris Lattner
c6b13e21cc
Shuffle some includes around
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llvm-svn: 27073
2006-03-24 18:52:35 +00:00
Chris Lattner
b203355298
Split the valuetypes out of Target.td into ValueTypes.td
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llvm-svn: 26490
2006-03-03 01:55:26 +00:00
Evan Cheng
91c574b642
New type v2f32.
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llvm-svn: 26435
2006-03-01 01:06:22 +00:00
Evan Cheng
43070b7541
Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
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packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).
llvm-svn: 26294
2006-02-20 22:34:53 +00:00
Evan Cheng
d98701c639
Subtarget feature can now set any variable to any value
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llvm-svn: 25678
2006-01-27 08:09:42 +00:00
Chris Lattner
1240574609
PHI and INLINEASM are now built-in instructions provided by Target.td
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llvm-svn: 25674
2006-01-27 01:46:15 +00:00
Evan Cheng
7785e5b3a4
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
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hasInFlag, hasOutFlag.
llvm-svn: 25155
2006-01-09 18:28:21 +00:00
Evan Cheng
14c53b45f5
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Evan Cheng
9ae486047e
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
llvm-svn: 24997
2005-12-23 22:14:32 +00:00
Evan Cheng
d296a43f96
Added support to specify predicates.
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llvm-svn: 24715
2005-12-14 22:02:59 +00:00
Evan Cheng
e8531381e2
* Added instruction property hasCtrlDep for those which r/w control-flow
...
chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.
llvm-svn: 24586
2005-12-04 08:13:17 +00:00
Nate Begeman
006bb04f3a
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
llvm-svn: 24563
2005-12-01 04:51:06 +00:00
Nate Begeman
89b049af90
Add the majority of the vector machien value types we expect to support,
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and make a few changes to the legalization machinery to support more than
16 types.
llvm-svn: 24511
2005-11-29 05:45:29 +00:00
Chris Lattner
c418b5d938
refix typo
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llvm-svn: 24505
2005-11-29 00:42:30 +00:00
Chris Lattner
d3bc8cb26d
revert my change for the time being, which broke the build
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llvm-svn: 24503
2005-11-29 00:24:08 +00:00
Chris Lattner
50986909dc
fix a typo :)
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llvm-svn: 24501
2005-11-28 22:42:15 +00:00
Chris Lattner
252d88c68e
Capture more operand info, patch by Evan Cheng
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llvm-svn: 24422
2005-11-19 07:00:10 +00:00
Nate Begeman
227f1bdd2f
Also add the new vector value type here, for completeness.
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llvm-svn: 24405
2005-11-18 00:53:32 +00:00
Jim Laskey
53ad110490
Add attribute name and type to SubtargetFeatures.
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llvm-svn: 24012
2005-10-26 17:28:23 +00:00
Jim Laskey
9ed9032e22
Plugin new subtarget backend into the build.
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llvm-svn: 23870
2005-10-21 19:05:19 +00:00
Jim Laskey
74ab9960f2
Added InstrSchedClass to each of the PowerPC Instructions.
...
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.
llvm-svn: 23830
2005-10-19 19:51:16 +00:00
Jim Laskey
9761100055
Push processor descriptions to the top of target and add command line info.
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llvm-svn: 23820
2005-10-19 13:34:52 +00:00
Chris Lattner
d83571bbf2
Pull DAG ISel generation nodes out of the PowerPC backend to where they
...
can be used by other targets. For those targets that want to use it,
have at. :)
llvm-svn: 23680
2005-10-10 06:00:30 +00:00
Chris Lattner
d1a5bc8dbd
Add a forward def
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llvm-svn: 23621
2005-10-04 05:09:20 +00:00
Chris Lattner
33ce5f8a73
Now that self referential classes are supported, get rid of a work-around.
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llvm-svn: 23544
2005-09-30 04:13:23 +00:00
Chris Lattner
c6a0338c04
spell this right
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llvm-svn: 23099
2005-08-26 20:55:40 +00:00
Chris Lattner
0081dfa91e
Add a flag
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llvm-svn: 23092
2005-08-26 20:29:01 +00:00
Chris Lattner
d24ad52efa
add an enum value
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llvm-svn: 23048
2005-08-25 17:07:09 +00:00
Chris Lattner
bd26a82051
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
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llvm-svn: 22929
2005-08-19 19:13:20 +00:00
Chris Lattner
3fb85f2702
Require that targets specify a namespace for their register classes.
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llvm-svn: 22921
2005-08-19 18:48:48 +00:00
Chris Lattner
5cfa377947
Add a new flag
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llvm-svn: 22881
2005-08-18 23:17:07 +00:00
Chris Lattner
182db0cac0
Add some bits that can be set for instructions.
...
llvm-svn: 19241
2005-01-02 02:27:48 +00:00
Misha Brukman
dba1f62eb8
Add isLittleEndianEncoding to InstrInfo class, defaults to `off'
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llvm-svn: 16976
2004-10-14 05:53:40 +00:00
Chris Lattner
42c43b2cb3
Add initial support for variants
...
llvm-svn: 16635
2004-10-03 19:34:18 +00:00
Nate Begeman
c762ab723b
Add support for the isLoad and isStore flags, needed by the instruction scheduler
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llvm-svn: 16555
2004-09-28 21:29:00 +00:00
Chris Lattner
6652223bd6
Capture delay slot info
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llvm-svn: 16551
2004-09-28 18:34:14 +00:00
Chris Lattner
e8e81a2941
Revamp the Register class, and allow the use of the RegisterGroup class to
...
specify aliases directly in register definitions.
Patch contributed by Jason Eckhardt!
llvm-svn: 16330
2004-09-14 04:17:02 +00:00
Chris Lattner
6a92fdef72
Add two values
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llvm-svn: 15959
2004-08-21 02:17:39 +00:00
Chris Lattner
291de48b59
isdummyclass goes away
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llvm-svn: 15790
2004-08-15 23:04:35 +00:00
Chris Lattner
aa6a8abc02
disable all of the pattern isel stuff
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llvm-svn: 15788
2004-08-15 23:02:34 +00:00
Chris Lattner
ae0c2c7583
Add i1imm
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llvm-svn: 15753
2004-08-15 05:37:00 +00:00
Chris Lattner
6ffa501d9f
Make the AsmWriter a first-class tblgen object. Allow targets to specify
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name of the generated asmwriter class, and the name of the format string.
llvm-svn: 15747
2004-08-14 22:50:53 +00:00
Chris Lattner
6bd2d26b56
Fill out immediate operand classes, add a new Operand class
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llvm-svn: 15642
2004-08-11 01:53:34 +00:00
Misha Brukman
8f951e579b
Remove ClassPrefix variable as it's no longer used.
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llvm-svn: 15586
2004-08-09 19:13:29 +00:00
Misha Brukman
8f7272c249
Classes need to have a prefix name, so that they can be tacked on to the pieces
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that TableGen creates for them, e.g. CodeEmitter, AsmPrinter, etc.
llvm-svn: 15579
2004-08-09 17:46:06 +00:00
Chris Lattner
1cabced74b
Add some immediate forms, make name optional
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llvm-svn: 15401
2004-08-01 09:36:44 +00:00
Chris Lattner
fd6893837c
Add the 'ops' marker, add an AsmString initializer
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llvm-svn: 15383
2004-08-01 04:40:43 +00:00
Chris Lattner
fc24e838a6
Move the 'Expander' node to later in the file, with the other experimental
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stuff. The pattern becomes a list, add some stuff, add some comments.
llvm-svn: 15378
2004-08-01 03:23:34 +00:00
Chris Lattner
2ab1142138
New flag
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llvm-svn: 15354
2004-07-31 02:07:07 +00:00
Chris Lattner
391e943817
Expose the "Other" value type to tablegen targets
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llvm-svn: 11304
2004-02-11 03:08:45 +00:00
John Criswell
29265fe981
Added LLVM copyright header.
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llvm-svn: 9321
2003-10-21 15:17:13 +00:00
Chris Lattner
572c69ea1e
Add a bunch of new node types, including a new Void dummy register class
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llvm-svn: 7870
2003-08-15 04:35:14 +00:00
Chris Lattner
58dc2187ac
Rename DNVT_bool to DNVT_i1 to be consistent with type system
...
llvm-svn: 7768
2003-08-12 04:28:21 +00:00
Chris Lattner
a8ae6c570f
Add support for basicblocks, setCC instructions, and branches
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llvm-svn: 7767
2003-08-12 04:17:29 +00:00
Chris Lattner
6088a0b4cb
add frameidx support
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Make load work
Make type inference infer from Arg1 to arg0 as well as from arg0 to arg1
llvm-svn: 7754
2003-08-11 21:29:40 +00:00
Chris Lattner
5acb68de53
Remove dead code
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llvm-svn: 7726
2003-08-11 15:24:02 +00:00
Chris Lattner
c914a4847b
add support for more nodes
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llvm-svn: 7724
2003-08-11 15:23:05 +00:00
Chris Lattner
3e2e0fb7ee
Make imm be a leaf instead of a nonterminal
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llvm-svn: 7708
2003-08-10 19:51:16 +00:00
Chris Lattner
eaa5b964bb
Update tablegen interfaces
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llvm-svn: 7672
2003-08-07 13:52:22 +00:00
Chris Lattner
0c4dd1ea09
Start adding usefulness to the DAG node definitions, add a new Expander
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class
llvm-svn: 7634
2003-08-06 15:31:02 +00:00
Chris Lattner
0d74debd07
Allow instructions to have a DAG pattern associated with them.
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Define a few preliminary node types.
llvm-svn: 7579
2003-08-04 21:07:37 +00:00
Chris Lattner
78fac3b8b6
There is nothing special about noops now
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llvm-svn: 7567
2003-08-04 05:11:19 +00:00
Chris Lattner
cb7489c102
Transition to using let instead of set
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llvm-svn: 7563
2003-08-04 04:58:12 +00:00
Chris Lattner
9c66ed8503
Allow specifying custom names for registers
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llvm-svn: 7546
2003-08-03 22:12:37 +00:00
Chris Lattner
6c8a40895b
Rearrange fields yet again: Don't instantiate these lists ONCE PER INSTRUCTION.
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llvm-svn: 7535
2003-08-03 21:52:28 +00:00
Chris Lattner
6a7439fb42
Remove the RegisterInfo class in favor of a general Target class. Add instrinfo stuff
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llvm-svn: 7521
2003-08-03 18:18:31 +00:00
Chris Lattner
d20486a0d9
Rename fields
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llvm-svn: 7498
2003-08-01 22:21:49 +00:00
Chris Lattner
75c817a482
encode size information into each ValueType
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Add new RegisterInfo class
llvm-svn: 7469
2003-08-01 05:18:03 +00:00
Chris Lattner
2b3ac6be6a
Add comments
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Make the register classes optionally take code fragments for allocation_order_*
llvm-svn: 7441
2003-07-30 22:16:41 +00:00
Chris Lattner
e45b699cf6
Add all of the necessary classes to describe the contents of the MRegister.h implementation
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for a target.
llvm-svn: 7415
2003-07-30 05:50:12 +00:00
Chris Lattner
8418e36143
No this file is not actually Sparc.td :)
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llvm-svn: 7405
2003-07-29 23:07:13 +00:00
Chris Lattner
6a561beb35
Add namespace specifier, add flags used by the X86 BE
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llvm-svn: 7403
2003-07-29 23:02:49 +00:00
Chris Lattner
845ed843f1
Instead of specifying the SIZE of the register, go so far as to specify
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what value type it is.
llvm-svn: 7356
2003-07-28 04:24:59 +00:00
Misha Brukman
bb053cefe8
Added the target-independent part of TableGen data.
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llvm-svn: 6403
2003-05-29 18:48:17 +00:00