Commit Graph

13 Commits

Author SHA1 Message Date
Chad Rosier 797ee3e3c6 Add a newline.
llvm-svn: 185385
2013-07-01 21:31:10 +00:00
Tom Stellard c46e56721e R600/SI: Add processor types for each CIK variant
Patch By: Alex Deucher

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
llvm-svn: 185209
2013-06-28 20:23:29 +00:00
Tom Stellard a6c6e1bfc2 R600: Rework subtarget info and remove AMDILDevice classes
This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
llvm-svn: 183566
2013-06-07 20:37:48 +00:00
Tom Stellard 3498e4ff1d R600: Fix the fetch limits for R600 generation GPUs
Reviewed-by: Vincent Lejeune <vljn@ovi.com>

https://bugs.freedesktop.org/show_bug.cgi?id=64257

llvm-svn: 183560
2013-06-07 20:28:55 +00:00
Tom Stellard 1e21b53020 R600/SI: Add processor type for Hainan asic
Patch by: Alex Deucher

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

NOTE: This is a candidate for the 3.3 branch.
llvm-svn: 181792
2013-05-14 14:42:56 +00:00
Tom Stellard c2516c6e40 R600: Clean up comments in Processors.td
llvm-svn: 181032
2013-05-03 17:21:14 +00:00
Vincent Lejeune 076c0b28e3 R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips
llvm-svn: 180759
2013-04-30 00:14:17 +00:00
Vincent Lejeune c299164284 R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions
v2[Vincent Lejeune]: Split FetchInst into usesTextureCache/usesVertexCache

llvm-svn: 180755
2013-04-30 00:13:39 +00:00
Vincent Lejeune 7d820c0bef R600: Add some new processor variants
llvm-svn: 180753
2013-04-30 00:13:27 +00:00
Tom Stellard 60174bb9ca R600: Add RV670 processor
This is an R600 GPU with double support.

Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 178929
2013-04-05 23:31:40 +00:00
Tom Stellard 2f21c7e551 R600/SI: Add processor types for each SI variant
Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 178928
2013-04-05 23:31:35 +00:00
Tom Stellard 4ded0c1c42 R600: Add an explicit default processor
This is for the case when no processor is passed to the backend.  This
prevents the

'' is not a recognized processor for this target (ignoring processor)

warning from being generated by clang.

llvm-svn: 174651
2013-02-07 19:39:34 +00:00
Tom Stellard 75aadc2813 Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
2012-12-11 21:25:42 +00:00