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409 Commits

Author SHA1 Message Date
Vincent Lejeune 8b8a7b5514 R600: Don't emit empty then clause and use alu_pop_after 
llvm-svn: 186725
 2013-07-19 21:45:15 +00:00
Vincent Lejeune 960a622ca6 R600: Simplify AMDILCFGStructurize by removing templates and assuming single exit 
llvm-svn: 186724
 2013-07-19 21:45:06 +00:00
Vincent Lejeune a8c38fedd6 R600: Replace legacy debug code in AMDILCFGStructurizer.cpp 
llvm-svn: 186723
 2013-07-19 21:44:56 +00:00
Tom Stellard 8374720aad R600/SI: Fix crash with VSELECT 
https://bugs.freedesktop.org/show_bug.cgi?id=66175

llvm-svn: 186616
 2013-07-18 21:43:53 +00:00
Tom Stellard adf732cfbc R600/SI: Add support for v2f32 loads 
llvm-svn: 186615
 2013-07-18 21:43:48 +00:00
Tom Stellard ed2f6149f3 R600/SI: Add support for v2f32 stores 
llvm-svn: 186614
 2013-07-18 21:43:42 +00:00
Tom Stellard 67ae4762ef R600: Expand VSELECT for all types 
llvm-svn: 186613
 2013-07-18 21:43:35 +00:00
Craig Topper 8fc4096fab Move string pointer from being a static class member to just a static global in the one file its needed in. 
llvm-svn: 186476
 2013-07-17 00:31:35 +00:00
Craig Topper d3a34f81f8 Add 'const' qualifiers to static const char* variables. 
llvm-svn: 186371
 2013-07-16 01:17:10 +00:00
Tom Stellard 31209cc8eb R600/SI: Add support for 64-bit loads 
https://bugs.freedesktop.org/show_bug.cgi?id=65873

llvm-svn: 186339
 2013-07-15 19:00:09 +00:00
Craig Topper 0afd0ab749 Make some arrays 'static const' 
llvm-svn: 186307
 2013-07-15 06:39:13 +00:00
Craig Topper 5871321e49 Use llvm::array_lengthof to replace sizeof(array)/sizeof(array[0]). 
llvm-svn: 186301
 2013-07-15 04:27:47 +00:00
Craig Topper b94011fd28 Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size. 
llvm-svn: 186274
 2013-07-14 04:42:23 +00:00
Benjamin Kramer c22c790f89 R600: Remove unsafe type punning. No intended functionality change. 
llvm-svn: 186196
 2013-07-12 20:18:05 +00:00
Tom Stellard ccae60acc3 R600/SI: Add support for f64 kernel arguments 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186182
 2013-07-12 18:15:26 +00:00
Tom Stellard 4e1100ab75 R600/SI: Implement select and compares for SI 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186181
 2013-07-12 18:15:19 +00:00
Tom Stellard 8ed7b45da3 R600/SI: Add fsqrt pattern for SI 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186180
 2013-07-12 18:15:13 +00:00
Tom Stellard 2a6a610516 R600/SI: Add double precision fsub pattern for SI 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186179
 2013-07-12 18:15:08 +00:00
Tom Stellard ab8a8c84d4 R600/SI: SI support for 64bit ConstantFP 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186178
 2013-07-12 18:15:02 +00:00
Tom Stellard 7512c0803c R600/SI: Add initial double precision support for SI 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186177
 2013-07-12 18:14:56 +00:00
Aaron Ballman f04bbd8b7f Replacing an empty switch with its moral equivalent. No functional changes intended. 
llvm-svn: 186017
 2013-07-10 17:19:22 +00:00
Michel Danzer 49812b5bbd R600/SI: Initial local memory support 
Enough for the radeonsi driver to use it for calculating derivatives.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186012
 2013-07-10 16:37:07 +00:00
Michel Danzer 1f87df365f R600/SI: Add pattern for the AMDGPU.barrier.local intrinsic 
lit test coverage to follow in the next commit.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186011
 2013-07-10 16:36:57 +00:00
Michel Danzer 8d69617b27 R600/SI: Add intrinsic for retrieving the current thread ID 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186010
 2013-07-10 16:36:52 +00:00
Michel Danzer 1c45430e76 R600/SI: Initial support for LDS/GDS instructions 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186009
 2013-07-10 16:36:43 +00:00
Michel Danzer 83f87c4c2e R600/SI: Add intrinsics for texture sampling with user derivatives 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186008
 2013-07-10 16:36:36 +00:00
Vincent Lejeune ce499744b3 R600: Do not predicated basic block with multiple alu clause 
Test is not included as it is several 1000 lines long.
To test this functionnality, a test case must generate at least 2 ALU clauses,
where an ALU clause is ~110 instructions long.

NOTE: This is a candidate for the stable branch.
llvm-svn: 185943
 2013-07-09 15:03:33 +00:00
Vincent Lejeune b8aac8d720 R600: Fix a rare bug where swizzle optimization returns wrong values 
llvm-svn: 185942
 2013-07-09 15:03:25 +00:00
Vincent Lejeune a4d8d2ef2b R600: Fix wrong export reswizzling 
llvm-svn: 185941
 2013-07-09 15:03:19 +00:00
Vincent Lejeune b55940cc7d R600: Use DAG lowering pass to handle fcos/fsin 
NOTE: This is a candidate for the stable branch.
llvm-svn: 185940
 2013-07-09 15:03:11 +00:00
Vincent Lejeune f10d1cd2a3 R600: Print Export Swizzle 
llvm-svn: 185939
 2013-07-09 15:03:03 +00:00
Craig Topper 31ee5866de Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size. 
llvm-svn: 185540
 2013-07-03 15:07:05 +00:00
Rafael Espindola 64e1af8eb9 Remove address spaces from MC. 
This is dead code since PIC16 was removed in 2010. The result was an odd mix,
where some parts would carefully pass it along and others would assert it was
zero (most of the object streamer for example).

llvm-svn: 185436
 2013-07-02 15:49:13 +00:00
Chad Rosier 797ee3e3c6 Add a newline. 
llvm-svn: 185385
 2013-07-01 21:31:10 +00:00
Vincent Lejeune a8a50248d8 R600: Fix an unitialized variable in R600InstrInfo.cpp 
llvm-svn: 185294
 2013-06-30 21:44:06 +00:00
Benjamin Kramer 396906456f R600: Unbreak GCC build. 
operator++ on an enum is not legal. clang happens to accept it anyways, I think
that's a known bug.

llvm-svn: 185269
 2013-06-29 20:04:19 +00:00
Vincent Lejeune 77a8352476 R600: Support schedule and packetization of trans-only inst 
llvm-svn: 185268
 2013-06-29 19:32:43 +00:00
Vincent Lejeune bb8a872158 R600: Bank Swizzle now display SCL equivalent 
llvm-svn: 185267
 2013-06-29 19:32:29 +00:00
Tom Stellard c46e56721e R600/SI: Add processor types for each CIK variant 
Patch By: Alex Deucher

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
llvm-svn: 185209
 2013-06-28 20:23:29 +00:00
Tom Stellard c026e8bc8e R600: Add local memory support via LDS 
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 185162
 2013-06-28 15:47:08 +00:00
Tom Stellard ce540330df R600: Add support for GROUP_BARRIER instruction 
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 185161
 2013-06-28 15:46:59 +00:00
Tom Stellard 5eb903d9c5 R600: Add ALUInst bit to tablegen definitions v2 
v2:
  - Remove functions left over from a previous rebase.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 185160
 2013-06-28 15:46:53 +00:00
Tom Stellard 02661d9605 R600: Use new getNamedOperandIdx function generated by TableGen 
llvm-svn: 184880
 2013-06-25 21:22:18 +00:00
Aaron Watry 0a794a4612 R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI 
By default, we expand these operations for both EG and SI. Move the
duplicated code into a common space for now. If the targets ever actually
implement these operations as instructions, we can override that in the relevant
target.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 184848
 2013-06-25 13:55:57 +00:00
Aaron Watry daabb20e1b R600/SI: Expand xor v2i32/v4i32 
Add test cases for both vector sizes on SI and also add v2i32 test for EG.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 184846
 2013-06-25 13:55:52 +00:00
Aaron Watry 83fa6006bc R600/SI: Expand urem of v2i32/v4i32 for SI 
Also add lit test for both cases on SI, and v2i32 for evergreen.

Note: I followed the guidance of the v4i32 EG check... UREM produces really
complex code, so let's just check that the instruction was lowered
successfully.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 184844
 2013-06-25 13:55:46 +00:00
Aaron Watry 5527b6c6b6 R600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG 
Also add lit test for both cases on SI, and v2i32 for evergreen.

Note: I followed the guidance of the v4i32 EG check... UDIV produces really
complex code, so let's just check that the instruction was lowered
successfully.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 184843
 2013-06-25 13:55:43 +00:00
Aaron Watry 16d80c0529 R600/SI: Expand ashr of v2i32/v4i32 for SI 
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 184842
 2013-06-25 13:55:40 +00:00
Aaron Watry f63791e778 R600/SI: Expand srl of v2i32/v4i32 for SI 
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 184841
 2013-06-25 13:55:37 +00:00
Aaron Watry 5584553984 R600/SI: Expand shl of v2i32/v4i32 for SI 
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 184840
 2013-06-25 13:55:32 +00:00