Commit Graph

226 Commits

Author SHA1 Message Date
Dan Gohman 191453174d Move the code that adds the DeadMachineInstructionElimPass from
target-independent code to target-specific code. This prevents it
from running on targets that aren't using fast-isel.

In addition to saving compile time, this addresses the problem
that not all targets are prepared for it. In order to use this
pass, all instructions must declare all their fixed uses and
defs of physical registers.

llvm-svn: 58144
2008-10-25 17:46:52 +00:00
Dan Gohman 2fe6bee5b6 Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.

llvm-svn: 57748
2008-10-18 02:06:02 +00:00
Dan Gohman 9c4b7d5c4f Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.

llvm-svn: 57521
2008-10-14 20:25:08 +00:00
Dan Gohman 007a6bb9b9 Factor out the code for determining when symblic addresses
require RIP-relative addressing and use it to fix a bug
in X86FastISel in x86-64 PIC mode, where it was trying to
use base/index registers with RIP-relative addresses. This
fixes a bunch of x86-64 testsuite failures.

llvm-svn: 56676
2008-09-26 19:15:30 +00:00
Anton Korobeynikov 87001fd6fd Reapply 56585:56589 with proper fix for some gcc versions
llvm-svn: 56621
2008-09-25 21:00:33 +00:00
Evan Cheng 84301390ae Temporarily backing out 56585:56589 to unbreak the build.
llvm-svn: 56607
2008-09-25 07:38:08 +00:00
Anton Korobeynikov 77aa975bdd Use crazy template-based inheritance instead of virtual one.
llvm-svn: 56585
2008-09-24 22:21:39 +00:00
Owen Anderson 9371964f47 Use raw_ostream throughout the AsmPrinter.
llvm-svn: 55092
2008-08-21 00:14:44 +00:00
Anton Korobeynikov c5faeb82b5 Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this)
llvm-svn: 54886
2008-08-17 13:53:59 +00:00
Dale Johannesen 30e5dbb407 Make x86-64 JIT changes Darwin-specific.
llvm-svn: 54700
2008-08-12 21:02:08 +00:00
Dale Johannesen dafdbf77b3 Some fixes for x86-64 JIT. Make it use small code
model, except for external calls; this makes
addressing modes PC-relative.  Incomplete.

The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.

llvm-svn: 54656
2008-08-11 23:46:25 +00:00
Anton Korobeynikov 9a6ed374f8 Split X86TargetAsmInfo into 4 subtarget-specific classes
llvm-svn: 53299
2008-07-09 13:20:48 +00:00
Dan Gohman 1f2b2a4abe Remove unnecessary #includes.
llvm-svn: 52613
2008-06-22 19:21:26 +00:00
Evan Cheng 97b020e61e X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later.
llvm-svn: 51455
2008-05-22 23:55:24 +00:00
Dan Gohman d78c400b5b Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017
2008-05-13 00:00:25 +00:00
Anton Korobeynikov c1534dca56 Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register.
llvm-svn: 50167
2008-04-23 18:23:30 +00:00
Anton Korobeynikov 2659011b70 Add X86 Maximal Stack Alignment Calculator Pass before RA
llvm-svn: 50166
2008-04-23 18:23:05 +00:00
Anton Korobeynikov a347663762 Provide a JIT selector on win64
llvm-svn: 48704
2008-03-23 13:43:47 +00:00
Anton Korobeynikov 7574ead985 Hack out the PIC mode on Win64 targets. This needs to be investigated later.
llvm-svn: 48703
2008-03-23 13:41:18 +00:00
Dan Gohman 24570836b2 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Evan Cheng 95a7be473c Added option -align-loops=<true/false> to disable loop aligner pass.
llvm-svn: 47736
2008-02-28 23:29:57 +00:00
Evan Cheng c799065cc3 Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
Anton Korobeynikov 40d67c59d5 Remove bunch of gcc 4.3-related warnings from Target
llvm-svn: 47369
2008-02-20 11:22:39 +00:00
Evan Cheng 00300ddff1 Minor fix to enable x86-64 pic jit (still fails for other reasons).
llvm-svn: 45734
2008-01-08 02:07:10 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng 345a00ba05 Preliminary PIC JIT support for X86 (32-bit) / Darwin.
llvm-svn: 45313
2007-12-22 09:40:20 +00:00
Evan Cheng db33a0211b Oops.
llvm-svn: 45312
2007-12-22 09:14:34 +00:00
Evan Cheng ac134551c6 Allow JIT with non-static relocation model.
llvm-svn: 45304
2007-12-22 01:12:14 +00:00
Dale Johannesen d1822ea7d1 Move lengthy conditional down 1 level per review comment.
llvm-svn: 40878
2007-08-06 21:48:35 +00:00
Dale Johannesen b0c7585f2d Make x86 long double alignment 32 for everything but
Darwin (which makes size within a struct==96)

llvm-svn: 40796
2007-08-03 22:46:15 +00:00
Dale Johannesen c5283ecd6f long double patch 2 of N. Handle it in TargetData.
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)

llvm-svn: 40792
2007-08-03 20:20:50 +00:00
Evan Cheng 9d5df0a5f6 Added -print-emitted-asm to print out JIT generated asm to cerr.
llvm-svn: 40123
2007-07-20 21:56:13 +00:00
Chris Lattner 517290ae52 The various "getModuleMatchQuality" implementations should return
zero if they see a target triple they don't understand.

llvm-svn: 38463
2007-07-09 17:25:29 +00:00
Evan Cheng d00d344519 80 col. violation.
llvm-svn: 34520
2007-02-23 03:03:16 +00:00
Chris Lattner 945e437c65 Generalize TargetData strings, to support more interesting forms of data.
Patch by Scott Michel.

llvm-svn: 34266
2007-02-14 05:52:17 +00:00
Bill Wendling 2aa9a42f24 Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).

llvm-svn: 34034
2007-02-08 01:39:44 +00:00
Evan Cheng ca5fb6e4fc Double and long preferred alignment is 8 byte.
llvm-svn: 33446
2007-01-22 23:09:50 +00:00
Chris Lattner 50ee0e40e5 Teach TargetData to handle 'preferred' alignment for each target, and use
these alignment amounts to align scalars when we can.  Patch by Scott Michel!

llvm-svn: 33409
2007-01-20 22:35:55 +00:00
Evan Cheng 97057f37a5 - Target PIC style is no longer affected by relocation model.
- In x86-64 mode, symbols with external linkage (not just symbols which are
  defined externally) requires GOT indirect reference.
- Stylistic code clean up.

llvm-svn: 33345
2007-01-18 22:27:12 +00:00
Bill Wendling 38ee6519b7 Revert patch.
llvm-svn: 33298
2007-01-17 09:06:13 +00:00
Bill Wendling 05e5a5ee6c Create the specified TargetObjInfo and use it.
llvm-svn: 33291
2007-01-17 03:51:37 +00:00
Anton Korobeynikov a0554d90e8 * PIC codegen for X86/Linux has been implemented
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)

llvm-svn: 33136
2007-01-12 19:20:47 +00:00
Anton Korobeynikov 4efbbc963f Really big cleanup.
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin

llvm-svn: 32833
2007-01-03 11:43:14 +00:00
Anton Korobeynikov 430e68a1b9 Refactored JIT codegen for mingw32. Now we're using standart relocation
type for distinguish JIT & non-JIT instead of "dirty" hacks :)

llvm-svn: 32745
2006-12-22 22:29:05 +00:00
Anton Korobeynikov 93acb49182 Fixed dllimported symbols support during JIT'ing. JIT on mingw32
platform should be more or less workable. At least, sim is running fine
under lli :)

llvm-svn: 32711
2006-12-20 01:03:20 +00:00
Chris Lattner 68f62b58f7 The x86-64 target machine should be used for amd64-* target triples.
llvm-svn: 32678
2006-12-19 19:40:09 +00:00
Evan Cheng dd60ca029c - Switch X86-64 JIT to large code size model.
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.

llvm-svn: 32238
2006-12-05 19:50:18 +00:00
Evan Cheng 0c2a74a487 Non-darwin gcc should default to static relocation to match gcc.
llvm-svn: 32184
2006-12-04 18:07:10 +00:00
Bill Wendling c8e81b8d48 Removed even more std::cerr and #include <iostream> things.
llvm-svn: 31813
2006-11-17 07:52:03 +00:00
Evan Cheng 11b0a5dbd4 Committing X86-64 support.
llvm-svn: 30177
2006-09-08 06:48:29 +00:00
Jim Laskey ae92ce8798 1. Remove condition on delete.
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
2006-09-07 23:39:26 +00:00
Chris Lattner 49c45d3a13 Fix some X86 JIT failures. This should really come from TargetJITInfo.
llvm-svn: 30102
2006-09-04 18:48:41 +00:00
Chris Lattner 12e97307a1 Completely rearchitect the interface between targets and the pass manager.
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.

llvm-svn: 30081
2006-09-04 04:14:57 +00:00
Chris Lattner 0fc4541c67 Simplify target construction.
llvm-svn: 30070
2006-09-03 18:44:02 +00:00
Evan Cheng 358b9ed98a - Enable x86 isel preprocessing by default unless -fast is specified.
- Also disable isel load folding if -fast.

llvm-svn: 29956
2006-08-29 18:28:33 +00:00
Nate Begeman 3cb3921a60 Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it
does emit linkable .o files in very simple cases.

llvm-svn: 29850
2006-08-23 21:08:52 +00:00
Nate Begeman d573cc7938 Disable LSR at -fast
llvm-svn: 29467
2006-08-02 05:29:40 +00:00
Chris Lattner 9e56e5c003 Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
llvm-svn: 29307
2006-07-26 21:12:04 +00:00
Evan Cheng f6acb34d23 - Refactor the code that resolve basic block references to a TargetJITInfo
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.

llvm-svn: 29276
2006-07-25 20:40:54 +00:00
Chris Lattner f3b5b92e58 Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
2006-06-16 18:22:52 +00:00
Evan Cheng c8c172eaae Fix a build breaker.
llvm-svn: 28574
2006-05-30 21:45:53 +00:00
Owen Anderson 80b1b4d41e Make TargetData strings less redundant.
llvm-svn: 28423
2006-05-20 23:28:54 +00:00
Owen Anderson 88812b5c0a Make all of the TargetMachine subclasses use the new string TargetData methods.
This is part of the on-going work on PR 761.

llvm-svn: 28414
2006-05-20 00:24:56 +00:00
Owen Anderson 20a631fde7 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.

llvm-svn: 28074
2006-05-03 01:29:57 +00:00
Nate Begeman 3f9c17906f Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.

llvm-svn: 27539
2006-04-08 19:46:55 +00:00
Nate Begeman ed728c1291 SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156
2006-03-27 01:32:24 +00:00
Chris Lattner 6f95ab7abb Eliminate IntrinsicLowering from TargetMachine.
Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974
2006-03-23 05:43:16 +00:00
Evan Cheng 5111c81a3c Turning on LSR by default
llvm-svn: 26861
2006-03-19 06:08:49 +00:00
Evan Cheng 20931a798e Added a way for TargetLowering to specify what values can be used as the
scale component of the target addressing mode.

llvm-svn: 26802
2006-03-16 21:47:42 +00:00
Evan Cheng 2dd2c652b2 Added getTargetLowering() to TargetMachine. Refactored targets to support this.
llvm-svn: 26742
2006-03-13 23:20:37 +00:00
Evan Cheng 306c13a8fb Add option -enable-x86-lsr to enable x86 loop strength reduction pass.
llvm-svn: 26665
2006-03-09 21:51:28 +00:00
Evan Cheng 73136dfecc - Added option -relocation-model to set relocation model. Valid values include static, pic,
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
2006-02-22 20:19:42 +00:00
Evan Cheng 06c2e6d1b3 Disable PIC for JIT.
llvm-svn: 26281
2006-02-18 01:49:25 +00:00
Nate Begeman 7e5496d5fe Kill the x86 pattern isel. boom.
llvm-svn: 26246
2006-02-17 00:03:04 +00:00
Chris Lattner a1d312c6ea remove an old comment
llvm-svn: 25940
2006-02-03 18:59:39 +00:00
Chris Lattner 23d55f2547 Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
obsolete.  yaay :)

llvm-svn: 25939
2006-02-03 18:54:24 +00:00
Evan Cheng a814f0b31c Bye bye Pattern ISel, hello DAG ISel.
llvm-svn: 25700
2006-01-27 21:26:54 +00:00
Evan Cheng cde9e30bc6 x86 CPU detection and proper subtarget support
llvm-svn: 25679
2006-01-27 08:10:46 +00:00
Evan Cheng 54c13da29c Added preliminary x86 subtarget support.
llvm-svn: 25645
2006-01-26 09:53:06 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream>
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Evan Cheng 0c5de2864f Stop doing that accidental commit.
llvm-svn: 25474
2006-01-20 01:14:05 +00:00
Evan Cheng cce748d316 A few more SH{L|R}D peepholes.
llvm-svn: 25473
2006-01-20 01:13:30 +00:00
Evan Cheng 9c30bd5e25 Didn't mean to commit the last one.
llvm-svn: 25469
2006-01-19 23:27:08 +00:00
Evan Cheng 8591b9f254 Added i16 SH{L|R}D patterns.
llvm-svn: 25468
2006-01-19 23:26:24 +00:00
Evan Cheng 5c0b4df483 SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
llvm-svn: 24886
2005-12-20 22:59:51 +00:00
Evan Cheng 0f68322992 Only lower SELECT when using DAG based isel.
llvm-svn: 24755
2005-12-17 01:22:13 +00:00
Chris Lattner d6b17765e4 remove some never-completed and now-obsolete code.
llvm-svn: 24671
2005-12-12 20:12:20 +00:00
Chris Lattner 655e7dfd0d initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
by Evan Cheng!

llvm-svn: 24371
2005-11-16 01:54:32 +00:00
Chris Lattner 76ac068568 Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
contributed by Evan Cheng.

llvm-svn: 24358
2005-11-15 00:40:23 +00:00
Chris Lattner b28f214033 Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
llvm-svn: 24233
2005-11-08 02:11:51 +00:00
Jim Laskey 19058c3989 1. Use SubtargetFeatures in llc/lli.
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.

llvm-svn: 23192
2005-09-01 21:38:21 +00:00
Nate Begeman be1f314a47 Remove the X86 and PowerPC Simple instruction selectors; their time has
passed.

llvm-svn: 22886
2005-08-18 23:53:15 +00:00
Jeff Cohen 5f4ef3c5a8 Eliminate all remaining tabs and trailing spaces.
llvm-svn: 22523
2005-07-27 06:12:32 +00:00
Nate Begeman f26625e1de Implement Subtarget support
Implement the X86 Subtarget.

This consolidates the checks for target triple, and setting options based
on target triple into one place.  This allows us to convert the asm printer
and isel over from being littered with "forDarwin", "forCygwin", etc. into
just having the appropriate flags for each subtarget feature controlling
the code for that feature.

This patch also implements indirect external and weak references in the
X86 pattern isel, for darwin.  Next up is to convert over the asm printers
to use this new interface.

llvm-svn: 22389
2005-07-12 01:41:54 +00:00
Chris Lattner d831209c34 Refactor things a bit to allow the ELF code emitter to run the X86 machine code emitter
after itself.

llvm-svn: 22376
2005-07-11 05:17:48 +00:00
Nate Begeman 8a0933608a First round of support for doing scalar FP using the SSE2 ISA extension and
XMM registers.  There are many known deficiencies and fixmes, which will be
addressed ASAP.  The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP.  To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
                        Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1:     # no_exit
        fldl (%esp)
        faddl (%eax,%ecx,8)
        fstpl (%esp)
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

SSE2:
        addsd (%eax,%ecx,8), %xmm0
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

llvm-svn: 22340
2005-07-06 18:59:04 +00:00
Chris Lattner 10594206f4 Add support to the X86 backend for emitting ELF files. To use this, we
currently use: llc t.bc --filetype=obj

This will produce a t.o file which is dumpable with readelf.  Currently
the file produced is empty, but the scaffolding to do more is now in place.

llvm-svn: 22292
2005-06-27 06:30:12 +00:00
Chris Lattner f11f48ba61 Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
interface.

llvm-svn: 22282
2005-06-25 02:48:37 +00:00
Chris Lattner b5ff4e5e10 Enable pattern isel by default
llvm-svn: 21898
2005-05-12 19:56:09 +00:00
Misha Brukman c88330ad13 * Remove trailing whitespace
* Convert tabs to spaces

llvm-svn: 21426
2005-04-21 23:38:14 +00:00