b49177f017
Unbreak VC++ build
...
llvm-svn: 19908
2005-01-29 06:27:16 +00:00
fe7a9a242e
Minor simplification/speedup. Replaces a set lookup with a pointer comparison.
...
This speeds up 176.gcc from 25.73s to 23.48s, which is 9.5%
llvm-svn: 19907
2005-01-29 06:20:55 +00:00
787aed675d
Eliminate generality that is not buying us anything. In particular, this
...
will cause us to miss cases where the input pointer to a load could be value
numbered to another load. Something like this:
%X = load int* %P1
%Y = load int* %P2
Those are obviously the same if P1/P2 are the same. The code this patch
removes attempts to handle that. However, since GCSE iterates, this doesn't
actually buy us anything: GCSE will first replace P1 or P2 with the other
one, then the load can be value numbered as equal.
Removing this code speeds up gcse a lot. On 176.gcc in debug mode, this
speeds up gcse from 29.08s -> 25.73s, a 13% savings.
llvm-svn: 19906
2005-01-29 06:11:16 +00:00
b25abcb1fa
If we see:
...
%A = alloca int
%V = load int* %A
value number %V to undef, not 0.
llvm-svn: 19905
2005-01-29 05:57:01 +00:00
2295d0b7de
Memory used is a delta between memuse at the start of the time and the
...
memuse at the end, thus it is signed.
llvm-svn: 19904
2005-01-29 05:21:16 +00:00
a7f83cf6b3
Unbreak VC++ build
...
llvm-svn: 19903
2005-01-29 03:32:49 +00:00
f711f8db41
Make sure that we always grow a multiple of 2 operands.
...
llvm-svn: 19902
2005-01-29 01:05:12 +00:00
e9c61fbb51
noteworthy.
...
llvm-svn: 19901
2005-01-29 00:44:22 +00:00
d8e20188c6
Adjust to changes in instruction interfaces.
...
llvm-svn: 19900
2005-01-29 00:39:08 +00:00
a3f06fa2dd
Switchinst takes a hint for the number of cases it will have.
...
llvm-svn: 19899
2005-01-29 00:38:45 +00:00
a35dfcedd3
switchinst ctor now takes a hint for the number of cases that it will have.
...
llvm-svn: 19898
2005-01-29 00:38:26 +00:00
84d3137da7
Adjust Valuehandle to hold its operand directly in it.
...
llvm-svn: 19897
2005-01-29 00:37:36 +00:00
3479f9cca8
Finegrainify namespacification.
...
Adjust TmpInstruction to work with the new User model.
llvm-svn: 19896
2005-01-29 00:36:59 +00:00
68afd89730
add namespace qualifier
...
llvm-svn: 19895
2005-01-29 00:36:38 +00:00
616b8fc630
Adjust to changes in User class and minor changes in instruction ctors.
...
llvm-svn: 19894
2005-01-29 00:36:19 +00:00
2c08949c62
Adjust to slight changes in instruction interfaces.
...
llvm-svn: 19893
2005-01-29 00:35:55 +00:00
5d1bc2c408
Adjust to changes in User class.
...
llvm-svn: 19892
2005-01-29 00:35:33 +00:00
afdb3de4d7
Merge InstrTypes.cpp into this file
...
Adjust to changes in the User class, operand handling is very different.
PHI node and switch statements must handle explicit resizing of operand
lists.
llvm-svn: 19891
2005-01-29 00:35:16 +00:00
d0df99ce86
Adjust to changes in User class. Aggregate constants now must explicitly
...
manage their operands.
llvm-svn: 19890
2005-01-29 00:34:39 +00:00
03adb1aa83
This file is now merged into Instructions.cpp
...
llvm-svn: 19889
2005-01-29 00:33:32 +00:00
00b82c25bc
Adjust to changes in the User class.
...
llvm-svn: 19888
2005-01-29 00:33:00 +00:00
5e9de0e083
Adjust to changes in the User class. Introduce a new UnaryInstruction
...
class.
llvm-svn: 19887
2005-01-29 00:32:51 +00:00
9d8da6a9f4
Adjust to user changes.
...
llvm-svn: 19886
2005-01-29 00:32:00 +00:00
4921cdf9c0
Many changes to cope with the User.h changes. Instructions now generally
...
directly embed their operands.
llvm-svn: 19885
2005-01-29 00:31:36 +00:00
893314cd3a
Adjust to User.h changes.
...
llvm-svn: 19884
2005-01-29 00:30:52 +00:00
f11ea56ef6
Instead of storing operands as std::vector<Use>, just maintain a pointer
...
and num operands in the User class. this allows us to embed the operands
directly in the subclasses if possible. For example, for binary operators
we store the two operands in the derived class.
The has several effects:
1. it improves locality because the operands and instruction are together
2. it makes accesses to operands faster (one less load) if you access them
through the derived class pointer. For example this:
Value *GetBinaryOperatorOp(BinaryOperator *I, int i) {
return I->getOperand(i);
}
Was compiled to:
_Z19GetBinaryOperatorOpPN4llvm14BinaryOperatorEi:
movl 4(%esp), %edx
movl 8(%esp), %eax
sall $4, %eax
movl 24(%edx), %ecx
addl %ecx, %eax
movl (%eax), %eax
ret
and is now compiled to:
_Z19GetBinaryOperatorOpPN4llvm14BinaryOperatorEi:
movl 8(%esp), %eax
movl 4(%esp), %edx
sall $4, %eax
addl %edx, %eax
movl 44(%eax), %eax
ret
Accesses through "Instruction*" are unmodified.
3. This reduces memory consumption (by about 3%) by eliminating 1 word of
vector overhead and a malloc header on a seperate object.
4. This speeds up gccas about 10% (both debug and release builds) on
large things (such as 176.gcc). For example, it takes a debug build
from 172.9 -> 155.6s and a release gccas from 67.7 -> 61.8s
llvm-svn: 19883
2005-01-29 00:29:39 +00:00
4a0d200c13
fix ExprMap, partially teach about add long
...
llvm-svn: 19882
2005-01-28 23:17:54 +00:00
feaf92f7ad
Fix a nasty thinko in my previous commit.
...
llvm-svn: 19881
2005-01-28 23:17:27 +00:00
bc7497d5f5
Alpha doesn't have a native f32 extload instruction.
...
llvm-svn: 19880
2005-01-28 22:58:25 +00:00
bf8c1ad313
implement legalization of truncates whose results and sources need to be
...
truncated, e.g. (truncate:i8 something:i16) on a 32 or 64-bit RISC.
llvm-svn: 19879
2005-01-28 22:52:50 +00:00
a4cfafe31a
Get alpha working with memset/memcpy/memmove
...
llvm-svn: 19878
2005-01-28 22:29:18 +00:00
3a46875e54
Fix some typos in the Makefile.rules.
...
Patch contributed by Vladimer Merzliakov.
llvm-svn: 19877
2005-01-28 19:52:32 +00:00
cd96168c95
Hrm, who knows what 'uint' is, but it seems to work sometimes? Wierd.
...
llvm-svn: 19876
2005-01-28 19:37:35 +00:00
cd517ff0c7
* add some DEBUG statements
...
* Properly compile this:
struct a {};
int test() {
struct a b[2];
if (&b[0] != &b[1])
abort ();
return 0;
}
to 'return 0', not abort().
llvm-svn: 19875
2005-01-28 19:32:01 +00:00
60c47267a9
Fix ConstProp/2005-01-28-SetCCGEP.ll: indexing over zero sized elements does
...
not change the address.
llvm-svn: 19874
2005-01-28 19:09:51 +00:00
e3aa4c01d5
New testcase.
...
llvm-svn: 19873
2005-01-28 19:08:32 +00:00
54903b68f2
Add some initial documentation for the SelectionDAG based instruction selectors
...
llvm-svn: 19872
2005-01-28 17:22:53 +00:00
5d88f184e2
Do not clean up if the MappedFile was never used or if the client already
...
closed the file. This unbreaks the build.
llvm-svn: 19871
2005-01-28 16:08:23 +00:00
579a324137
fix ExprMap and constant check in setcc
...
llvm-svn: 19870
2005-01-28 14:06:46 +00:00
c723678541
Get VC++ compiling again
...
llvm-svn: 19869
2005-01-28 07:29:32 +00:00
adabeccd02
Convert some old C-style casts to C++ style.
...
llvm-svn: 19868
2005-01-28 07:22:20 +00:00
479bc61455
move FP into it's own select
...
llvm-svn: 19867
2005-01-28 06:57:18 +00:00
eb6614d719
CopyFromReg produces two values. Make sure that we remember that both are
...
legalized, and actually return the correct result when we legalize the chain first.
llvm-svn: 19866
2005-01-28 06:27:38 +00:00
38389b1633
These passes are no more.
...
llvm-svn: 19865
2005-01-28 06:13:52 +00:00
c782335e33
Remove this code as it is currently completely broken and unmaintained.
...
If needed, this can be resurrected from CVS.
Note that several of the interfaces (e.g. the IPModRef ones) are supersumed
by generic AliasAnalysis interfaces that have been written since this code
was developed (and they are not DSA specific).
llvm-svn: 19864
2005-01-28 06:12:46 +00:00
971e03d74a
Properly close mapped files.
...
llvm-svn: 19863
2005-01-28 01:17:07 +00:00
df77835166
Mark -parallel pass as `experimental'
...
llvm-svn: 19858
2005-01-27 17:59:51 +00:00
7c538a6593
stack frame fix and zero FP reg fix
...
llvm-svn: 19857
2005-01-27 08:31:19 +00:00
96515adad6
Floating point instructions like Floating point registers
...
llvm-svn: 19856
2005-01-27 07:58:15 +00:00
0cceb5165e
int to float conversion and another setcc
...
llvm-svn: 19855
2005-01-27 07:50:35 +00:00
3852f652bf
Fix grammar
...
llvm-svn: 19854
2005-01-27 06:46:38 +00:00
3c361fd6f7
teach isel about comparison with constants and zero extending bits
...
llvm-svn: 19853
2005-01-27 03:49:45 +00:00
9671b213b6
Fix some Path bugs
...
llvm-svn: 19852
2005-01-27 03:49:03 +00:00
5374789198
perhaps this will let me have calls again
...
llvm-svn: 19851
2005-01-27 01:22:48 +00:00
9e27e54d70
minor bug fix
...
llvm-svn: 19850
2005-01-27 00:52:26 +00:00
9748b623a4
minor bug fix
...
llvm-svn: 19849
2005-01-27 00:51:05 +00:00
267908ad47
added instructions for fp to int to fp moves
...
llvm-svn: 19848
2005-01-26 23:56:48 +00:00
5ae5f81720
initial fp support
...
llvm-svn: 19847
2005-01-26 21:54:09 +00:00
651ffb1df8
xfail this.
...
llvm-svn: 19846
2005-01-26 07:09:44 +00:00
a710180bba
XFAIL this for now.
...
llvm-svn: 19845
2005-01-26 07:08:42 +00:00
589304de7f
hum, writing on one machine, testing on another...
...
llvm-svn: 19844
2005-01-26 02:53:56 +00:00
02c5459948
add some operations, fix others. should compile several more tests now
...
llvm-svn: 19843
2005-01-26 01:24:38 +00:00
1b20615173
We can fold promoted and non-promoted loads into divs also!
...
llvm-svn: 19835
2005-01-25 20:35:10 +00:00
30607ec66e
Fold promoted loads into binary ops for FP, allowing us to generate m32 forms
...
of FP ops.
llvm-svn: 19834
2005-01-25 20:03:11 +00:00
ba2bcd867f
problems with bools, and their work arounds
...
llvm-svn: 19833
2005-01-25 19:58:40 +00:00
fbd921987f
Add a dependency to the trace library so that it gets pulled in
...
automatically.
llvm-svn: 19828
2005-01-25 16:23:57 +00:00
97f0f7646d
Document the --load option.
...
llvm-svn: 19822
2005-01-25 05:04:49 +00:00
122489bcab
more load choices, better add with imm
...
llvm-svn: 19821
2005-01-25 00:35:34 +00:00
2e2edef9c6
Make -ds-aa more useful, allowing it to be updated as xforms hack on the program.
...
llvm-svn: 19818
2005-01-24 20:00:14 +00:00
d64fafd937
Add some methods.
...
llvm-svn: 19817
2005-01-24 19:55:34 +00:00
2f0f845534
Clean ups, and taught the instruction selector about immediate forms
...
llvm-svn: 19816
2005-01-24 19:44:07 +00:00
6d1a96bccc
Alpha JIT prune
...
llvm-svn: 19815
2005-01-24 18:48:22 +00:00
3c12772190
include prune and JIT prune
...
llvm-svn: 19814
2005-01-24 18:45:41 +00:00
4680f89526
Pruned includes
...
llvm-svn: 19813
2005-01-24 18:37:48 +00:00
f36418f618
let configure recognize Alphas
...
llvm-svn: 19811
2005-01-24 17:33:52 +00:00
3c3de91b79
let configure recognize Alphas
...
llvm-svn: 19810
2005-01-24 17:25:41 +00:00
454c06f5a4
Mark CVS versions different from releases
...
llvm-svn: 19809
2005-01-24 16:29:24 +00:00
664d251443
`primitive' has no `a'
...
llvm-svn: 19808
2005-01-24 16:28:03 +00:00
5b9c49b6f2
Do not return true from isSized for things without a size (like functions and
...
labels) even though they are concrete. This fixes the DSA regressions from
last night.
llvm-svn: 19807
2005-01-24 16:00:52 +00:00
b6627702b4
This giant patch speeds up Type::isSized(). Before, this would have to search
...
large nested types over and over again to determine if they are sized or not.
Now, isSized() is able to make snap decisions about all concrete types, which
are a common occurance (and includes all primitives).
On 177.mesa, this speeds up DSE from 39.5s -> 21.3s and GCSE from
13.2s -> 11.3s, reducing gccas time from 80s -> 61s (this is a debug build).
DSE and GCSE are still too slow on this testcase, but this is a simple
improvement.
llvm-svn: 19800
2005-01-24 02:08:34 +00:00
39837024ae
Fix a spurious warning.
...
llvm-svn: 19799
2005-01-24 01:40:18 +00:00
0e1de101a1
Silence a warning.
...
llvm-svn: 19798
2005-01-23 23:20:06 +00:00
0dfd7d3a0d
Silence optimized warnings.
...
llvm-svn: 19797
2005-01-23 23:19:44 +00:00
debae1e3c3
Allow the FP stackifier to completely ignore functions that do not use FP at
...
all. This should speed up the X86 backend fairly significantly on integer
codes. Now if only we didn't have to compute livevar still... ;-)
llvm-svn: 19796
2005-01-23 23:13:59 +00:00
fb5614506e
Simplify/speedup the PEI by not having to scan for uses of the callee saved
...
registers. This information is computed directly by the register allocator
now.
llvm-svn: 19795
2005-01-23 23:13:12 +00:00
90b491f46a
Add an accessor.
...
llvm-svn: 19794
2005-01-23 22:57:27 +00:00
3d527f7b61
Update physregsused info.
...
llvm-svn: 19793
2005-01-23 22:55:45 +00:00
24f0f0e28f
Update this pass to set PhysRegsUsed info in MachineFunction.
...
llvm-svn: 19792
2005-01-23 22:51:56 +00:00
ae09d93b35
Update these register allocators to set the PhysRegUsed info in MachineFunction.
...
llvm-svn: 19791
2005-01-23 22:45:13 +00:00
304053c6ec
Add support for the PhysRegsUsed array.
...
llvm-svn: 19789
2005-01-23 22:13:58 +00:00
1def519f3d
Expose more information from register allocation to passes that run after
...
it.
llvm-svn: 19788
2005-01-23 22:13:36 +00:00
ef2de322c6
Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool>
...
llvm-svn: 19787
2005-01-23 21:45:01 +00:00
9e2c7facb2
Get rid of a several dozen more and instructions in specint.
...
llvm-svn: 19786
2005-01-23 20:26:55 +00:00
6c43f5e5fe
Fix crash comparing empty file against nonempty file.
...
llvm-svn: 19782
2005-01-23 06:02:40 +00:00
4add7e356f
Adjust to changes in SelectionDAG interfaces
...
The first half of correct chain insertion for libcalls. This is not enough
to fix Fhourstones yet though.
llvm-svn: 19781
2005-01-23 04:42:50 +00:00
90b7c13f3a
Remove the 3 HACK HACK HACKs I put in before, fixing them properly with
...
the new TLI that is available.
Implement support for handling out of range shifts. This allows us to
compile this code (a 64-bit rotate):
unsigned long long f3(unsigned long long x) {
return (x << 32) | (x >> (64-32));
}
into this:
f3:
mov %EDX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
ret
GCC produces this:
$ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer
..
f3:
push %ebx
mov %ebx, DWORD PTR [%esp+12]
mov %ecx, DWORD PTR [%esp+8]
mov %eax, %ebx
mov %edx, %ecx
pop %ebx
ret
The Simple ISEL produces (eww gross):
f3:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %ESI, 0
or %EAX, %ECX
or %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
llvm-svn: 19780
2005-01-23 04:39:44 +00:00
ffcb0ae329
Adjust to changes in SelectionDAG interface.
...
llvm-svn: 19779
2005-01-23 04:36:26 +00:00
2877e9e826
Give SelectionDAG a TargetLowering instance instead of TM instance.
...
llvm-svn: 19778
2005-01-23 04:36:06 +00:00
28939a222e
Build Alpha by default.
...
llvm-svn: 19777
2005-01-23 04:34:46 +00:00
d5d45b8d1a
Fix alloca support for Cygwin. On cygwin its __alloca not __builtin_alloca
...
llvm-svn: 19776
2005-01-23 04:32:47 +00:00
30226da5b3
Support Cygwin assembly generation. The cygwin version of Gnu ASsembler
...
doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.
llvm-svn: 19775
2005-01-23 03:52:14 +00:00
ece10a420e
Add support for fp tolerances
...
llvm-svn: 19774
2005-01-23 03:45:26 +00:00
580f5bfae3
This method takes sys::Path objects now.
...
llvm-svn: 19773
2005-01-23 03:32:16 +00:00
411bbeeac7
Adjust to changed interface.
...
llvm-svn: 19772
2005-01-23 03:31:39 +00:00
b782187b32
Make DiffFilesWithTolerance take sys::Path's instead of std::strings
...
Delete dead functions.
llvm-svn: 19771
2005-01-23 03:31:02 +00:00
7e264b2ec6
Remove two dead methods and improve the comments for DiffFilesWithTolerance.
...
Also, make DiffFilesWithTolerance take sys::Path objects instead of std::strings.
llvm-svn: 19770
2005-01-23 03:30:39 +00:00
364e8b771d
Fix a bug in previous checkin
...
llvm-svn: 19769
2005-01-23 03:19:13 +00:00
dff29cd72e
Drop dead #include
...
llvm-svn: 19768
2005-01-23 03:16:56 +00:00
c5a20a5dd4
The meat of this utility has been moved to FileUtilities, where it can be
...
used by other tools.
llvm-svn: 19767
2005-01-23 03:15:47 +00:00
16a4368c40
Add a new method, refactored out of fpcmp
...
llvm-svn: 19766
2005-01-23 03:13:43 +00:00
ca2bf0b67a
New method.
...
llvm-svn: 19765
2005-01-23 03:11:38 +00:00
a1b5ca2b9d
Let me introduce you to the early stages of the llvm backend for the alpha processor
...
llvm-svn: 19764
2005-01-22 23:41:55 +00:00
eccb73d57f
Get this to work for 64-bit systems.
...
llvm-svn: 19763
2005-01-22 23:04:37 +00:00
12b25a12a6
We're working towards LLVM 1.5 now so bump the version number. This change
...
won't be propagated to the configure script until there's a need to change
configure.ac for some larger purpose.
llvm-svn: 19762
2005-01-22 21:29:42 +00:00
97cf8fd4a9
Minor fix.
...
llvm-svn: 19761
2005-01-22 20:59:38 +00:00
59a7f5c2f3
This is the final big of factoring. This shares cases in suboperand
...
differences, which means that identical instructions (after stripping off
the first literal string) do not run any different code at all. On the X86,
this turns this code:
switch (MI->getOpcode()) {
case X86::ADC32mi: printOperand(MI, 4, MVT::i32); break;
case X86::ADC32mi8: printOperand(MI, 4, MVT::i8); break;
case X86::ADC32mr: printOperand(MI, 4, MVT::i32); break;
case X86::ADD32mi: printOperand(MI, 4, MVT::i32); break;
case X86::ADD32mi8: printOperand(MI, 4, MVT::i8); break;
case X86::ADD32mr: printOperand(MI, 4, MVT::i32); break;
case X86::AND32mi: printOperand(MI, 4, MVT::i32); break;
case X86::AND32mi8: printOperand(MI, 4, MVT::i8); break;
case X86::AND32mr: printOperand(MI, 4, MVT::i32); break;
case X86::CMP32mi: printOperand(MI, 4, MVT::i32); break;
case X86::CMP32mr: printOperand(MI, 4, MVT::i32); break;
case X86::MOV32mi: printOperand(MI, 4, MVT::i32); break;
case X86::MOV32mr: printOperand(MI, 4, MVT::i32); break;
case X86::OR32mi: printOperand(MI, 4, MVT::i32); break;
case X86::OR32mi8: printOperand(MI, 4, MVT::i8); break;
case X86::OR32mr: printOperand(MI, 4, MVT::i32); break;
case X86::ROL32mi: printOperand(MI, 4, MVT::i8); break;
case X86::ROR32mi: printOperand(MI, 4, MVT::i8); break;
case X86::SAR32mi: printOperand(MI, 4, MVT::i8); break;
case X86::SBB32mi: printOperand(MI, 4, MVT::i32); break;
case X86::SBB32mi8: printOperand(MI, 4, MVT::i8); break;
case X86::SBB32mr: printOperand(MI, 4, MVT::i32); break;
case X86::SHL32mi: printOperand(MI, 4, MVT::i8); break;
case X86::SHLD32mrCL: printOperand(MI, 4, MVT::i32); break;
case X86::SHR32mi: printOperand(MI, 4, MVT::i8); break;
case X86::SHRD32mrCL: printOperand(MI, 4, MVT::i32); break;
case X86::SUB32mi: printOperand(MI, 4, MVT::i32); break;
case X86::SUB32mi8: printOperand(MI, 4, MVT::i8); break;
case X86::SUB32mr: printOperand(MI, 4, MVT::i32); break;
case X86::TEST32mi: printOperand(MI, 4, MVT::i32); break;
case X86::TEST32mr: printOperand(MI, 4, MVT::i32); break;
case X86::TEST8mi: printOperand(MI, 4, MVT::i8); break;
case X86::XCHG32mr: printOperand(MI, 4, MVT::i32); break;
case X86::XOR32mi: printOperand(MI, 4, MVT::i32); break;
case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
}
into this:
switch (MI->getOpcode()) {
case X86::ADC32mi:
case X86::ADC32mr:
case X86::ADD32mi:
case X86::ADD32mr:
case X86::AND32mi:
case X86::AND32mr:
case X86::CMP32mi:
case X86::CMP32mr:
case X86::MOV32mi:
case X86::MOV32mr:
case X86::OR32mi:
case X86::OR32mr:
case X86::SBB32mi:
case X86::SBB32mr:
case X86::SHLD32mrCL:
case X86::SHRD32mrCL:
case X86::SUB32mi:
case X86::SUB32mr:
case X86::TEST32mi:
case X86::TEST32mr:
case X86::XCHG32mr:
case X86::XOR32mi:
case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
case X86::ADC32mi8:
case X86::ADD32mi8:
case X86::AND32mi8:
case X86::OR32mi8:
case X86::ROL32mi:
case X86::ROR32mi:
case X86::SAR32mi:
case X86::SBB32mi8:
case X86::SHL32mi:
case X86::SHR32mi:
case X86::SUB32mi8:
case X86::TEST8mi:
case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
}
After this, the generated asmwriters look pretty much as though they were
generated by hand. This shrinks the X86 asmwriter.inc files from 55101->39669
and 55429->39551 bytes each, and PPC from 16766->12859 bytes.
llvm-svn: 19760
2005-01-22 20:31:17 +00:00
92275bb6bb
Implement *even more* factoring. In particular, if all of the instruction
...
strings starts out with a constant string, we emit the string first, using
a table lookup (instead of a switch statement).
Because this is usually the opcode portion of the asm string, the differences
between the instructions have now been greatly reduced. This allows many
more case statements to be grouped together.
This patch also allows instruction cases to be grouped together when the
instruction patterns are exactly identical (common after the opcode string
has been ripped off), and when the differing operand is a MachineInstr
operand that needs to be formatted.
The end result of this is a mean and lean generated AsmPrinter!
llvm-svn: 19759
2005-01-22 19:22:23 +00:00
945e8655dd
Refactor code for numbering instructions into CodeGenTarget.
...
llvm-svn: 19758
2005-01-22 18:58:51 +00:00
da636b3783
Fix VC++ compilation error
...
llvm-svn: 19757
2005-01-22 18:50:10 +00:00
64d9d2b819
QOI feature implemented.
...
llvm-svn: 19756
2005-01-22 18:45:35 +00:00
9ceb7c8f23
Implement factoring of instruction pattern strings. In particular, instead of
...
emitting code like this:
case PPC::ADD: O << "add "; printOperand(MI, 0, MVT::i64); O << ", "; prin
tOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << '\n
'; break;
case PPC::ADDC: O << "addc "; printOperand(MI, 0, MVT::i64); O << ", "; pr
intOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << '
\n'; break;
case PPC::ADDE: O << "adde "; printOperand(MI, 0, MVT::i64); O << ", "; pr
intOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << '
\n'; break;
...
Emit code like this:
case PPC::ADD:
case PPC::ADDC:
case PPC::ADDE:
...
switch (MI->getOpcode()) {
case PPC::ADD: O << "add "; break;
case PPC::ADDC: O << "addc "; break;
case PPC::ADDE: O << "adde "; break;
...
}
printOperand(MI, 0, MVT::i64);
O << ", ";
printOperand(MI, 1, MVT::i64);
O << ", ";
printOperand(MI, 2, MVT::i64);
O << "\n";
break;
This shrinks the PPC asm writer from 24785->15205 bytes (even though the new
asmwriter has much more whitespace than the old one), and the X86 printers shrink
quite a bit too. The important implication of this is that GCC no longer hits swap
when building the PPC backend in optimized mode. Thus this fixes PR448.
-Chris
llvm-svn: 19755
2005-01-22 18:38:13 +00:00
b6f5d9a82a
Fix the ::: problem
...
llvm-svn: 19754
2005-01-22 18:18:59 +00:00
3baf682110
Minor refactoring, no functionality change.
...
llvm-svn: 19753
2005-01-22 17:40:38 +00:00
ff696def84
oops
...
llvm-svn: 19752
2005-01-22 17:37:13 +00:00
c8f1f4bc8e
Use binary mode for reading/writing bytecode files
...
llvm-svn: 19751
2005-01-22 17:36:17 +00:00
e90b0c5469
Add (non-working) project bugpoint to Visual Studio
...
llvm-svn: 19750
2005-01-22 17:35:30 +00:00
0c23ba5c0f
Seperate asmstring parsing from emission. This allows the code to be simpler
...
and more understandable. It also allows us to do simple things like fold
consequtive literal strings together. For example, instead of emitting this
for the X86 backend:
O << "adc" << "l" << " ";
we now generate this:
O << "adcl ";
*whoa* :)
This shrinks the X86 asmwriters from 62729->58267 and 65176->58644 bytes
for the intel/att asm writers respectively.
llvm-svn: 19749
2005-01-22 17:32:42 +00:00
0e64c73e67
Don't exclude FileUtilies and ToolRunner from VC++ build
...
llvm-svn: 19748
2005-01-22 16:32:47 +00:00
142b4a721f
Fix VC++ complaint
...
llvm-svn: 19747
2005-01-22 16:30:58 +00:00
ccbd3f0d57
Fix destroyDirectory bug
...
llvm-svn: 19746
2005-01-22 16:28:33 +00:00
52c97fbea9
Implicitly defined registers can clobber callee saved registers too!
...
This fixes the return-address-not-being-saved problem in the Alpha backend.
llvm-svn: 19741
2005-01-22 00:49:16 +00:00
67e2e21353
make double-dollar properly escape asmstrings
...
llvm-svn: 19740
2005-01-22 00:35:22 +00:00
3bc78b2e0b
More bugfixes for IA64 shifts.
...
llvm-svn: 19739
2005-01-22 00:33:03 +00:00
ec2183713c
Fix problems with non-x86 targets.
...
llvm-svn: 19738
2005-01-22 00:31:52 +00:00
d637c96fac
Add a nasty hack to fix Alpha/IA64 multiplies by a power of two.
...
llvm-svn: 19737
2005-01-22 00:20:42 +00:00
d53e763f18
Remove unneeded line.
...
llvm-svn: 19736
2005-01-21 23:43:12 +00:00
4f987bf16d
test commit
...
llvm-svn: 19735
2005-01-21 23:38:56 +00:00
fc4429e7c1
Handle comparisons of gep instructions that have different typed indices
...
as long as they are the same size.
llvm-svn: 19734
2005-01-21 23:06:49 +00:00
e70eb9da7d
Speed up folding operations into loads.
...
llvm-svn: 19733
2005-01-21 21:43:02 +00:00
e85a8d8f92
Keep track of node depth for each node
...
llvm-svn: 19732
2005-01-21 21:39:38 +00:00
e1e844c416
The ever-important vanity pass name :)
...
llvm-svn: 19731
2005-01-21 21:35:14 +00:00
28edd69eb4
If the interpreter tries to execute an external function, kill it. Of course
...
since we are dirty, special case __main. This should fix the infinite loop
horrible stuff that happens on linux-alpha when configuring llvm-gcc. It
might also help cygwin, who knows??
llvm-svn: 19729
2005-01-21 19:59:37 +00:00
c78776d209
Fix a FIXME: realize that argument stores are all independent (don't alias)
...
llvm-svn: 19728
2005-01-21 19:46:38 +00:00
96e809c47d
Unary token factor nodes are unneeded.
...
llvm-svn: 19727
2005-01-21 18:01:22 +00:00
aac464e6c0
Refactor libcall code a bit. Initial implementation of expanding int -> FP
...
operations for 64-bit integers.
llvm-svn: 19724
2005-01-21 06:05:23 +00:00
4105d5f249
Apparently destroyFile() now throws an exception. Since this class is
...
designed to be put on the stack, that's not cool. Catch and ignore the
exception.
llvm-svn: 19723
2005-01-20 23:31:35 +00:00
ac4e5ef023
Remove this test. This test is already in PR269, so it should be
...
readded when the bug is fixed.
llvm-svn: 19722
2005-01-20 20:58:42 +00:00
4d25c04f94
Simplify the shift-expansion code.
...
llvm-svn: 19721
2005-01-20 20:29:23 +00:00
2a631fa406
Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. This
...
fixes most of the remaining llc-beta failures.
llvm-svn: 19716
2005-01-20 18:53:00 +00:00
b3f83b28a5
Expand add/sub into ADD_PARTS/SUB_PARTS instead of a non-existant libcall.
...
llvm-svn: 19715
2005-01-20 18:52:28 +00:00
1fe9b40981
implement add_parts/sub_parts.
...
llvm-svn: 19714
2005-01-20 18:50:55 +00:00
ad1ffcc358
Eliminate the unimplemented ADDC/SUBB operations, add ADD_PARTS/SUB_PARTS instead.
...
llvm-svn: 19713
2005-01-20 18:50:39 +00:00
28d15860bd
Add missing entry.
...
llvm-svn: 19712
2005-01-20 17:32:28 +00:00
5b04f33405
Fix a crash compiling 134.perl.
...
llvm-svn: 19711
2005-01-20 16:50:16 +00:00
90f0dc8fc6
Get analyze to show all analysis options when compiled with VC++
...
llvm-svn: 19710
2005-01-20 05:19:40 +00:00
e1fde90bac
Add analyze project to Visual Studio
...
llvm-svn: 19709
2005-01-20 04:52:59 +00:00
6eaf83e172
Add project llvm-proj to Visual Studio
...
llvm-svn: 19708
2005-01-20 04:41:49 +00:00
96c26751ec
Support targets that do not use i8 shift amounts.
...
llvm-svn: 19707
2005-01-19 22:31:21 +00:00
411336fe04
Add two optimizations. The first folds (X+Y)-X -> Y
...
The second folds operations into selects, e.g. (select C, (X+Y), (Y+Z))
-> (Y+(select C, X, Z)
This occurs a few times across spec, e.g.
select add/sub
mesa: 83 0
povray: 5 2
gcc 4 2
parser 0 22
perlbmk 13 30
twolf 0 3
llvm-svn: 19706
2005-01-19 21:50:18 +00:00
2547f05be8
Add some new tests
...
llvm-svn: 19705
2005-01-19 21:48:31 +00:00
f840289291
Add an assertion that would have made more sense to duraid
...
llvm-svn: 19704
2005-01-19 21:32:07 +00:00
3d95c14d94
Add support for targets that pass args in registers to calls.
...
llvm-svn: 19703
2005-01-19 20:24:35 +00:00
5695864a41
Add an accessor for targets that pass args in regs
...
llvm-svn: 19702
2005-01-19 20:19:58 +00:00
55562fa99a
Fold single use token factor nodes into other token factor nodes.
...
llvm-svn: 19701
2005-01-19 19:10:54 +00:00
0d03eb45a8
Realize the individual pieces of an expanded copytoreg/store/load are
...
independent of each other.
llvm-svn: 19700
2005-01-19 18:02:17 +00:00
9b75e148fd
Know some identities about tokenfactor nodes.
...
llvm-svn: 19699
2005-01-19 18:01:40 +00:00
32a5f02598
Know some simple identities. This improves codegen for (1LL << N).
...
llvm-svn: 19698
2005-01-19 17:29:49 +00:00
474aac4da9
Fix a problem where were were literally selecting for INCREASED register
...
pressure, not decreases register pressure. Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail. This fixes
fourinarow.
llvm-svn: 19697
2005-01-19 17:24:34 +00:00
1cffa73f2a
Just in case, handle something that is both a use and a def.
...
llvm-svn: 19696
2005-01-19 17:11:51 +00:00
00c436824f
When an instruction moves, make sure to update the VarInfo::Kills list as
...
well as all of teh other stuff in livevar. This fixes the compiler crash
on fourinarow last night.
llvm-svn: 19695
2005-01-19 17:09:15 +00:00
25be208e02
When commuting these instructions, make sure to actually swap the operands too.
...
llvm-svn: 19694
2005-01-19 16:55:52 +00:00
a3cc1835ad
Fix 'raise' to work with packed types. Patch by Morten Ofstad.
...
llvm-svn: 19693
2005-01-19 16:16:35 +00:00
de87d146ab
Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (which
...
typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles). This also saves code space.
For example, instead of emitting:
rotr:
mov %EAX, DWORD PTR [%ESP + 4]
mov %CL, BYTE PTR [%ESP + 8]
shrd %EAX, %EAX, %CL
ret
rotli:
mov %EAX, DWORD PTR [%ESP + 4]
shrd %EAX, %EAX, 27
ret
Emit:
rotr32:
mov %CL, BYTE PTR [%ESP + 8]
mov %EAX, DWORD PTR [%ESP + 4]
ror %EAX, %CL
ret
rotli32:
mov %EAX, DWORD PTR [%ESP + 4]
ror %EAX, 27
ret
We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.
llvm-svn: 19692
2005-01-19 08:07:05 +00:00
c4adfbbd0b
New testcase for rotate instructions. Each function should codegen to a
...
rotate.
llvm-svn: 19691
2005-01-19 08:04:08 +00:00
0edf9535b9
Add rotate instructions.
...
llvm-svn: 19690
2005-01-19 07:50:03 +00:00
29f5819158
Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5
...
llvm-svn: 19689
2005-01-19 07:37:26 +00:00
603677549f
Add a test for 16-bit sh*d.
...
llvm-svn: 19688
2005-01-19 07:37:01 +00:00
d54845f530
Improve coverage of the X86 instruction set by adding 16-bit shift doubles.
...
llvm-svn: 19687
2005-01-19 07:31:24 +00:00
2947801735
Teach the code generator that shrd/shld is commutable if it has an immediate.
...
This allows us to generate this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
shld %EDX, %EDX, 2
shl %EAX, 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
mov %EDX, %EAX
shrd %EDX, %ECX, 30
shl %EAX, 2
ret
Note the magically transmogrifying immediate.
llvm-svn: 19686
2005-01-19 07:11:01 +00:00
ea42c15da9
Use the TargetInstrInfo::commuteInstruction method to commute instructions
...
instead of doing it manually.
llvm-svn: 19685
2005-01-19 07:08:42 +00:00
f6932b700b
Finegrainify namespacification
...
Add default impl of commuteInstruction
Add notes about ugly V9 code.
llvm-svn: 19684
2005-01-19 06:53:34 +00:00
eadd41207d
Add a new method, described in the comment.
...
llvm-svn: 19683
2005-01-19 06:53:02 +00:00
892336a1b5
Ensure that each these functions generates a sh[rl]d instruction.
...
llvm-svn: 19682
2005-01-19 06:30:36 +00:00
41fe201b61
Codegen long >> 2 to this:
...
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
shrd %EAX, %EDX, 2
sar %EDX, 2
ret
instead of this:
test1:
mov %ECX, DWORD PTR [%ESP + 4]
shr %ECX, 2
mov %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %EDX
shl %EAX, 30
or %EAX, %ECX
sar %EDX, 2
ret
and long << 2 to this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
*** mov %EDX, %EAX
shrd %EDX, %ECX, 30
shl %EAX, 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
shr %ECX, 30
mov %EDX, DWORD PTR [%ESP + 8]
shl %EDX, 2
or %EDX, %ECX
shl %EAX, 2
ret
The extra copy (marked ***) can be eliminated when I teach the code generator
that shrd32rri8 is really commutative.
llvm-svn: 19681
2005-01-19 06:18:43 +00:00
7230239553
Add missing data types for VC++
...
llvm-svn: 19680
2005-01-19 05:08:31 +00:00
2a7f8a94f4
Implement a way of expanding shifts. This applies to targets that offer
...
select operations or to shifts that are by a constant. This automatically
implements (with no special code) all of the special cases for shift by 32,
shift by < 32 and shift by > 32.
llvm-svn: 19679
2005-01-19 04:19:40 +00:00
d8d306601a
X86 shifts mask the amount.
...
llvm-svn: 19678
2005-01-19 03:36:30 +00:00
a05cd83d2f
Add a hook to find out how the target handles shift amounts that are out of
...
range. Either they are undefined (the default), they mask the shift amount
to the size of the register (X86, Alpha, etc), or they extend the shift (PPC).
This defaults to undefined, which is conservatively correct.
llvm-svn: 19677
2005-01-19 03:36:14 +00:00
9aa4886283
Move all data members to the end of the class.
...
Add a hook to find out how the target handles shift amounts that are out of
range. Either they are undefined (the default), they mask the shift amount
to the size of the register (X86, Alpha, etc), or they extend the shift (PPC).
This defaults to undefined, which is conservatively correct.
llvm-svn: 19676
2005-01-19 03:36:03 +00:00
42993e45b6
Zero is cheaper than sign extend.
...
llvm-svn: 19675
2005-01-18 21:57:59 +00:00
14947c34cc
Code to handle FP_EXTEND is dead now. X86 doesn't support any data types to
...
FP_EXTEND from!
llvm-svn: 19674
2005-01-18 20:05:56 +00:00
c6e928cba5
Remove more dead code.
...
llvm-svn: 19673
2005-01-18 19:50:08 +00:00
0616fa6b9b
The selection dag code handles the promotions from F32 to F64 for us, so we
...
don't need to even think about F32 in the X86 code anymore.
llvm-svn: 19672
2005-01-18 19:46:54 +00:00
d65c3f3118
Fix some fixmes (promoting bools for select and brcond), fix promotion
...
of zero and sign extends.
llvm-svn: 19671
2005-01-18 19:27:06 +00:00
a9d53f9fb9
Keep track of the retval type as well.
...
llvm-svn: 19670
2005-01-18 19:26:36 +00:00
8cd93be302
Keep track of the returned value type as well.
...
llvm-svn: 19669
2005-01-18 19:26:18 +00:00
9f2c4a5200
Teach legalize to promote copy(from|to)reg, instead of making the isel pass
...
do it. This results in better code on X86 for floats (because if strict
precision is not required, we can elide some more expensive double -> float
conversions like the old isel did), and allows other targets to emit
CopyFromRegs that are not legal for arguments.
llvm-svn: 19668
2005-01-18 17:54:55 +00:00
479c7118e4
Fix 124.m88ksim.
...
llvm-svn: 19667
2005-01-18 17:35:28 +00:00
cef394290f
Add project llvm-ld to Visual Studio
...
llvm-svn: 19665
2005-01-18 05:44:50 +00:00
18320b07d4
Add project llvm-nm to Visual Studio
...
llvm-svn: 19664
2005-01-18 05:44:25 +00:00
1a6c167332
Add project llvm-ld to Visual Studio
...
llvm-svn: 19663
2005-01-18 05:39:37 +00:00
c45440c72b
Add llvm-bcanalyzer project to Visual Studio
...
llvm-svn: 19662
2005-01-18 05:31:34 +00:00
ed246ec0d2
Do not emit loads multiple times, potentially in the wrong places.
...
llvm-svn: 19661
2005-01-18 04:18:32 +00:00
c227ad2640
Minor changes.
...
llvm-svn: 19660
2005-01-18 04:15:41 +00:00
28a205e01b
Eliminate bad assertions.
...
llvm-svn: 19659
2005-01-18 04:00:54 +00:00
78d3028350
* Eliminate the TokenSet and just use the ExprMap for both tokens and values.
...
* Insert some really pedantic assertions that will notice when we emit the
same loads more than one time, exposing bugs. This turns a miscompilation in
bzip2 into a compile-fail. yaay.
llvm-svn: 19658
2005-01-18 03:51:59 +00:00
2cb338d7b5
Teach legalize to promote SetCC results.
...
llvm-svn: 19657
2005-01-18 02:59:52 +00:00
b07e2d2084
Allow setcc operations to have nonbool types.
...
llvm-svn: 19656
2005-01-18 02:52:03 +00:00
178219f913
Allow setcc operations to have non-bool types.
...
llvm-svn: 19655
2005-01-18 02:51:41 +00:00
d7f93950aa
Rely on the code in MatchAddress to do this work. Otherwise we fail to
...
match (X+Y)+(Z << 1), because we match the X+Y first, consuming the index
register, then there is no place to put the Z.
llvm-svn: 19652
2005-01-18 02:25:52 +00:00
2b4b79581d
Fix the completely broken FP constant folds for setcc's.
...
llvm-svn: 19651
2005-01-18 02:11:55 +00:00
a7acdda064
Fix a problem where probing for addressing modes caused expressions to be
...
emitted too early. In particular, this fixes
Regression/CodeGen/X86/regpressure.ll:regpressure3.
This also improves the 2nd basic block in 164.gzip:flush_block, which went from
.LBBflush_block_1: # loopentry.1.i
movzx %EAX, WORD PTR [dyn_ltree + 20]
movzx %ECX, WORD PTR [dyn_ltree + 16]
mov DWORD PTR [%ESP + 32], %ECX
movzx %ECX, WORD PTR [dyn_ltree + 12]
movzx %EDX, WORD PTR [dyn_ltree + 8]
movzx %EBX, WORD PTR [dyn_ltree + 4]
mov DWORD PTR [%ESP + 36], %EBX
movzx %EBX, WORD PTR [dyn_ltree]
add DWORD PTR [%ESP + 36], %EBX
add %EDX, DWORD PTR [%ESP + 36]
add %ECX, %EDX
add DWORD PTR [%ESP + 32], %ECX
add %EAX, DWORD PTR [%ESP + 32]
movzx %ECX, WORD PTR [dyn_ltree + 24]
add %EAX, %ECX
mov %ECX, 0
mov %EDX, %ECX
to
.LBBflush_block_1: # loopentry.1.i
movzx %EAX, WORD PTR [dyn_ltree]
movzx %ECX, WORD PTR [dyn_ltree + 4]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 8]
add %EAX, %ECX
movzx %ECX, WORD PTR [dyn_ltree + 12]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 16]
add %EAX, %ECX
movzx %ECX, WORD PTR [dyn_ltree + 20]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 24]
add %ECX, %EAX
mov %EAX, 0
mov %EDX, %EAX
... which results in less spilling in the function.
This change alone speeds up 164.gzip from 37.23s to 36.24s on apoc. The
default isel takes 37.31s.
llvm-svn: 19650
2005-01-18 01:06:26 +00:00
b93409f3e2
Fix indentation.
...
llvm-svn: 19649
2005-01-17 23:25:45 +00:00
81841af594
This is a carefully contrived testcase where the X86 ISel is emitting all loads
...
before other ops, causing it to spill like mad. This occurs in
164.gzip:flush_block.
llvm-svn: 19648
2005-01-17 23:16:01 +00:00
a5d137f471
Don't bother using max here.
...
llvm-svn: 19647
2005-01-17 23:02:13 +00:00
ca318edb94
Do not give token factor nodes outrageous weights
...
llvm-svn: 19645
2005-01-17 22:56:09 +00:00
4d9651c760
Non-volatile loads can be freely reordered against each other. This fixes
...
X86/reg-pressure.ll again, and allows us to do nice things in other cases.
For example, we now codegen this sort of thing:
int %loadload(int *%X, int* %Y) {
%Z = load int* %Y
%Y = load int* %X ;; load between %Z and store
%Q = add int %Z, 1
store int %Q, int* %Y
ret int %Y
}
Into this:
loadload:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%EAX]
mov %ECX, DWORD PTR [%ESP + 8]
inc DWORD PTR [%ECX]
ret
where we weren't able to form the 'inc [mem]' before. This also lets the
instruction selector emit loads in any order it wants to, which can be good
for register pressure as well.
llvm-svn: 19644
2005-01-17 22:19:26 +00:00
e86c933df7
Two changes:
...
1. Fold [mem] += (1|-1) into inc [mem]/dec [mem] to save some icache space.
2. Do not let token factor nodes prevent forming '[mem] op= val' folds.
llvm-svn: 19643
2005-01-17 22:10:42 +00:00
4108bb01cf
Don't call SelectionDAG.getRoot() directly, go through a forwarding method.
...
llvm-svn: 19642
2005-01-17 19:43:36 +00:00
96113fd08f
Refactor load/op/store folding into it's own method, no functionality changes.
...
llvm-svn: 19641
2005-01-17 19:25:26 +00:00
e3c2cf4854
Implement a target independent optimization to codegen arguments only into
...
the basic block that uses them if possible. This is a big win on X86, as it
lets us fold the argument loads into instructions and reduce register pressure
(by not loading all of the arguments in the entry block).
For this (contrived to show the optimization) testcase:
int %argtest(int %A, int %B) {
%X = sub int 12345, %A
br label %L
L:
%Y = add int %X, %B
ret int %Y
}
we used to produce:
argtest:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, 12345
sub %EAX, %ECX
mov %EDX, DWORD PTR [%ESP + 8]
.LBBargtest_1: # L
add %EAX, %EDX
ret
now we produce:
argtest:
mov %EAX, 12345
sub %EAX, DWORD PTR [%ESP + 4]
.LBBargtest_1: # L
add %EAX, DWORD PTR [%ESP + 8]
ret
This also fixes the FIXME in the code.
BTW, this occurs in real code. 164.gzip shrinks from 8623 to 8608 lines of
.s file. The stack frame in huft_build shrinks from 1644->1628 bytes,
inflate_codes shrinks from 116->108 bytes, and inflate_block from 2620->2612,
due to fewer spills.
Take that alkis. :-)
llvm-svn: 19639
2005-01-17 17:55:19 +00:00
9098879472
Fix a major regression last night that prevented us from producing [mem] op= reg
...
operations.
The body of the if is less indented but unmodified in this patch.
llvm-svn: 19638
2005-01-17 17:49:14 +00:00
16f64df93a
Refactor code into a new method.
...
llvm-svn: 19635
2005-01-17 17:15:02 +00:00
b21b6b9e84
Make methods private, add a method.
...
llvm-svn: 19634
2005-01-17 17:14:43 +00:00
b72ea1b719
Codegen this:
...
int %foo(int %X) {
%T = add int %X, 13
%S = mul int %T, 3
ret int %S
}
as this:
mov %ECX, DWORD PTR [%ESP + 4]
lea %EAX, DWORD PTR [%ECX + 2*%ECX + 39]
ret
instead of this:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, %ECX
add %EAX, 13
imul %EAX, %EAX, 3
ret
llvm-svn: 19633
2005-01-17 06:48:02 +00:00
a8b2929f45
Added tmp instructions to preserve ssa.
...
llvm-svn: 19632
2005-01-17 06:47:26 +00:00
a56d29d517
Fix test/Regression/CodeGen/X86/2005-01-17-CycleInDAG.ll and 132.ijpeg.
...
Do not fold a load into an operation if it will induce a cycle in the DAG.
Repeat after me: dAg.
llvm-svn: 19631
2005-01-17 06:26:58 +00:00
9605c927d1
New testcase for a problem that occurred in 132.ijpeg
...
llvm-svn: 19630
2005-01-17 06:25:59 +00:00
715364364b
Delete PHI nodes that are not dead but are locked in a cycle of single
...
useness.
llvm-svn: 19629
2005-01-17 05:10:15 +00:00
03f06f11aa
Move code out of indentation one level to make it easier to read.
...
Disable the xform for < > cases. It turns out that the following is being
miscompiled:
bool %test(sbyte %S) {
%T = cast sbyte %S to uint
%V = setgt uint %T, 255
ret bool %V
}
llvm-svn: 19628
2005-01-17 03:20:02 +00:00
30d205e080
Add methods
...
llvm-svn: 19627
2005-01-17 02:24:59 +00:00
3be6cd57c9
Do not fold a load into a comparison that is used by more than one place.
...
The comparison will probably be folded, so this is not ok to do.
This fixed 197.parser.
llvm-svn: 19624
2005-01-17 01:34:14 +00:00
642de64ef9
sysconfdir -> PROJ_etcdir
...
llvm-svn: 19623
2005-01-17 00:42:31 +00:00
0cd6b9ae1e
Do not codegen 'xor bool, true' as 'not reg'. not reg inverts the upper bits
...
of the bytereg. This fixes yacr2, 300.twolf and probably others.
llvm-svn: 19622
2005-01-17 00:23:16 +00:00
f7648e7110
Fix typos noticed by Gabor Greif, thanks Gabor!
...
llvm-svn: 19621
2005-01-17 00:12:04 +00:00
c1f386c7b8
Set up the shift and setcc types.
...
If we emit a load because we followed a token chain to get to it, try to
fold it into its single user if possible.
llvm-svn: 19620
2005-01-17 00:00:33 +00:00
5f180e4645
Shift and setcc types default to the pointer type.
...
llvm-svn: 19619
2005-01-16 23:59:48 +00:00
12879e04cb
Add comments
...
Add fields to hold the result type of setcc operations and shift amounts.
llvm-svn: 19618
2005-01-16 23:59:30 +00:00
5c8a85e2d8
Implement legalize of call nodes.
...
llvm-svn: 19617
2005-01-16 19:46:48 +00:00
a9c9f38498
Fix llvm-java project autconfiguration.
...
llvm-svn: 19616
2005-01-16 09:44:58 +00:00
e4872342db
Added paramters to a few functions in order to allow me to change the functions to preserve SSA
...
llvm-svn: 19615
2005-01-16 08:51:10 +00:00
b14a63aa1c
* Adjust to changes in TargetLowering interfaces.
...
* Remove custom promotion for bool and byte select ops. Legalize now
promotes them for us.
* Allow folding ConstantPoolIndexes into EXTLOAD's, useful for float immediates.
* Declare which operations are not supported better.
* Add some hacky code for TRUNCSTORE to pretend that we have truncstore
for i16 types. This is useful for testing promotion code because I can
just remove 16-bit registers all together and verify that programs work.
llvm-svn: 19614
2005-01-16 07:34:08 +00:00
3c0dd46a3b
Revamp supported ops. Instead of just being supported or not, we now keep
...
track of how to deal with it, and provide the target with a hook that they
can use to legalize arbitrary operations in arbitrary ways.
Implement custom lowering for a couple of ops, implement promotion for select
operations (which x86 needs).
llvm-svn: 19613
2005-01-16 07:29:19 +00:00
897cd7dc0a
add method stub
...
llvm-svn: 19612
2005-01-16 07:28:41 +00:00
2c331fbc8f
Don't mash stuff together.
...
llvm-svn: 19611
2005-01-16 07:28:31 +00:00
6f8097951c
Use enums, move virtual dtor out of line.
...
llvm-svn: 19610
2005-01-16 07:28:11 +00:00
328bc38c5c
Revamp supported ops. Instead of just being supported or not, we now keep
...
track of how to deal with it, and provide the target with a hook that they
can use to legalize arbitrary operations in arbitrary ways.
llvm-svn: 19609
2005-01-16 07:27:49 +00:00
71e1e6220c
* Revise the projects section and make reference to Projects.html
...
* the dist-clean target no longer implies a check
llvm-svn: 19608
2005-01-16 07:18:31 +00:00
12adad4b2f
Don't confuse the LLVM_OBJ_DIR and the PROJ_OBJ_DIR because there might be
...
a symbolic link making the autoconf name for the directory (LLVM_OBJ_ROOT)
and the "make" name for the directory (PROJ_OBJ_ROOT) different.
llvm-svn: 19607
2005-01-16 06:53:48 +00:00
3ba56b3fe7
Implement some more missing promotions.
...
llvm-svn: 19606
2005-01-16 05:06:12 +00:00
8bdd0fc7aa
Fix bugpoint
...
llvm-svn: 19605
2005-01-16 04:23:22 +00:00
d0a65013ab
cycles_t -> CycleCount_t
...
llvm-svn: 19604
2005-01-16 04:20:30 +00:00
fcd4587a75
Add some .cvsignores to the win32 hierarchy to account for generated files
...
llvm-svn: 19603
2005-01-16 03:18:23 +00:00
d9f4f3b141
Provide support for HP/UX aCC compiler's variant of hash_map and hash_set
...
(RogueWave). These are implemented in rw/stdex/hash_map.h and
rw/stdex/hash_set.h on HP/UX.
llvm-svn: 19600
2005-01-16 02:58:39 +00:00
64cee423c3
Fix locations of libraries and executables to match makefiles.
...
llvm-svn: 19599
2005-01-16 02:38:06 +00:00
44764d6406
BUILD_* to PROJ_*
...
llvm-svn: 19598
2005-01-16 02:35:47 +00:00
73b6977700
Clarify assertion.
...
llvm-svn: 19597
2005-01-16 02:23:34 +00:00
4e550ebb38
Add assertions.
...
llvm-svn: 19596
2005-01-16 02:23:22 +00:00
209f585033
Add support for promoted registers being live across blocks.
...
llvm-svn: 19595
2005-01-16 02:23:07 +00:00
22978217af
Update per new Makefile requirements for projects
...
llvm-svn: 19594
2005-01-16 02:21:42 +00:00
0e48bf8a19
Rename BUILD_* to PROJ_*
...
llvm-svn: 19592
2005-01-16 02:21:29 +00:00
05a2e79221
Update documentation on how to set up a project
...
llvm-svn: 19591
2005-01-16 02:21:18 +00:00
ba6a3dbd2d
Several changes:
...
* Rename BUILD_* to PROJ_*
* Differentiate between LLVM's Makefile.conf and the project's
* Use project specific install locations
llvm-svn: 19590
2005-01-16 02:20:54 +00:00
62ca901007
Several changes:
...
* Get rid of variables that are duplicates of autoconf variables.
* Rename BUILD_* to PROJ_*
* Define some project related install locations
* Don't assume LLVM's configured values are the project's
llvm-svn: 19589
2005-01-16 02:20:42 +00:00
5ee86be22b
Make this file capable of being used by both LLVM and its projects
...
llvm-svn: 19588
2005-01-16 02:20:30 +00:00
7462d192b8
Fixed a couple of instructions that broke SSA.
...
llvm-svn: 19587
2005-01-16 02:14:17 +00:00
cebb964fef
Improve compatiblity with HPUX on Itanium, patch by Duraid Madina
...
llvm-svn: 19586
2005-01-16 01:31:31 +00:00
4fb0fa4309
Improve compatibility with aCC on HPUX. Patch by Duraid Madina
...
llvm-svn: 19585
2005-01-16 01:22:18 +00:00
8ec1dc5fc0
Set up identity transforms.
...
llvm-svn: 19584
2005-01-16 01:20:18 +00:00
87a769cbd4
Move some information into the TargetLowering object.
...
llvm-svn: 19583
2005-01-16 01:11:45 +00:00
d58384fca6
Use the new TLI method to get this.
...
llvm-svn: 19582
2005-01-16 01:11:19 +00:00
1bc93bac69
Move some information out of LegalizeDAG into the generic Target interface.
...
llvm-svn: 19581
2005-01-16 01:10:58 +00:00
71d7f6e86f
legalize a bunch of operations that I missed.
...
llvm-svn: 19580
2005-01-16 00:38:00 +00:00
a8d34fb8c6
Add support for targets that require promotions.
...
llvm-svn: 19579
2005-01-16 00:37:38 +00:00
207a962c2c
Fix some serious bugs in promotion.
...
llvm-svn: 19578
2005-01-16 00:17:42 +00:00
0fe7776da5
Eliminate unneeded extensions.
...
llvm-svn: 19577
2005-01-16 00:17:20 +00:00
4d97864e92
Implement promotion of a whole bunch more operators. I think that this is
...
basically everything.
llvm-svn: 19576
2005-01-15 22:16:26 +00:00
630d1937bf
Print extra type for nodes with extra type info.
...
llvm-svn: 19575
2005-01-15 21:11:37 +00:00
a2071f1247
Add new file to Visual Studio CodeGen project
...
llvm-svn: 19574
2005-01-15 07:33:52 +00:00
99222f706c
Add support for legalizing FP_ROUND_INREG, SIGN_EXTEND_INREG, and
...
ZERO_EXTEND_INREG for targets that don't support them.
llvm-svn: 19573
2005-01-15 07:15:18 +00:00
09d1b3d01d
Common code factored out.
...
llvm-svn: 19572
2005-01-15 07:14:32 +00:00
5d24d61ae8
implement these methods.
...
llvm-svn: 19571
2005-01-15 06:52:40 +00:00
efd434591d
Add some helper methods.
...
llvm-svn: 19570
2005-01-15 06:52:18 +00:00
c6c9a5b07d
Add support for promoting ADD/MUL.
...
Add support for new SIGN_EXTEND_INREG, ZERO_EXTEND_INREG, and FP_ROUND_INREG operators.
Realize that if we do any promotions, we need to iterate SelectionDAG
construction.
llvm-svn: 19569
2005-01-15 06:18:18 +00:00
1001c6e2cd
Add new SIGN_EXTEND_INREG, ZERO_EXTEND_INREG, and FP_ROUND_INREG operators.
...
llvm-svn: 19568
2005-01-15 06:17:04 +00:00
9de5890211
Add a new target-independent code generator flag.
...
llvm-svn: 19567
2005-01-15 06:00:32 +00:00
e18a4c4c19
Add support for truncstore and *extload.
...
llvm-svn: 19566
2005-01-15 05:22:24 +00:00
1f2c9d82fa
Add intitial support for promoting some operators.
...
llvm-svn: 19565
2005-01-15 05:21:40 +00:00
ea2fa46f53
Improve output precision.
...
llvm-svn: 19564
2005-01-15 00:07:19 +00:00
730e7cb048
We don't distribute the operating system specific directories any more.
...
llvm-svn: 19563
2005-01-14 22:43:01 +00:00
3b8e719d1d
Adjust to CopyFromReg changes, implement deletion of truncating/extending
...
stores/loads.
llvm-svn: 19562
2005-01-14 22:38:01 +00:00
720a62e8c7
Adjust to CopyFromREg changes.
...
llvm-svn: 19561
2005-01-14 22:37:41 +00:00
868e9d79d7
Change CopyFromReg to take and produce a chain node, allowing it to be used
...
with physregs that are not live across the entire block.
llvm-svn: 19560
2005-01-14 22:37:20 +00:00
39c6744c9f
Start implementing truncating stores and extending loads.
...
llvm-svn: 19559
2005-01-14 22:08:15 +00:00
4bdb582200
Start adding some new operators, give IMPLICIT_DEF a chain operand.
...
llvm-svn: 19558
2005-01-14 22:07:46 +00:00
d7bffad559
Fix Regression/CodeGen/PowerPC/2005-01-14-UndefLong.ll
...
llvm-svn: 19557
2005-01-14 20:22:02 +00:00
8025e8b9e6
New testcase, problem found by Rob.
...
llvm-svn: 19556
2005-01-14 20:21:51 +00:00
c3ed31f837
Fix: Regression/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
...
llvm-svn: 19555
2005-01-14 19:31:00 +00:00
57fb55d750
Testcase that crashes the PPC backend. Thanks to Rob for finding this.
...
llvm-svn: 19554
2005-01-14 19:30:42 +00:00
51726c47fe
Fix some bugs in an xform added yesterday. This fixes Prolangs-C/allroots.
...
llvm-svn: 19553
2005-01-14 17:35:12 +00:00
7aa41cfa88
Fix a compile crash on spiff
...
llvm-svn: 19552
2005-01-14 17:17:59 +00:00
b12e290f8a
Allow the Echo and EchoCmd variables to be overridden.
...
llvm-svn: 19551
2005-01-14 16:33:36 +00:00
9dcfffd730
Fix the path from ../lib/Debug to ../Debug/lib per changes to Makefiles.
...
llvm-svn: 19550
2005-01-14 16:32:39 +00:00
0ad02bdd3d
Improve compatibility with acc
...
llvm-svn: 19549
2005-01-14 15:54:24 +00:00
d3af59bec2
Make this compatible with the HP/intel compiler. Fix by Duraid, thanks!
...
llvm-svn: 19548
2005-01-14 15:53:26 +00:00
a938e629f6
Correctly update configure to configure the llvm-java project
...
llvm-svn: 19546
2005-01-14 07:52:28 +00:00
e246cdc946
Fix and improve win32 path validation.
...
llvm-svn: 19545
2005-01-14 04:09:39 +00:00
cbeed3571a
Make asctime_r work for HP/UX.
...
llvm-svn: 19544
2005-01-14 00:50:50 +00:00
144f6e3dee
More testcases
...
llvm-svn: 19543
2005-01-14 00:26:25 +00:00
4fa89827e2
if two gep comparisons only differ by one index, compare that index directly.
...
This allows us to better optimize begin() -> end() comparisons in common cases.
llvm-svn: 19542
2005-01-14 00:20:05 +00:00
d35d210ea0
Do not overrun iterators. This fixes a 176.gcc crash
...
llvm-svn: 19541
2005-01-13 23:26:48 +00:00
8ea1e8b982
Add a method
...
llvm-svn: 19540
2005-01-13 23:26:28 +00:00
7db6765530
new testcase
...
llvm-svn: 19539
2005-01-13 23:26:14 +00:00
7d131a4b9c
Add a method
...
llvm-svn: 19538
2005-01-13 22:58:50 +00:00
a04c904c4c
Turn select C, (X+Y), (X-Y) --> (X+(select C, Y, (-Y))). This occurs in
...
the 'sim' program and probably elsewhere. In sim, it comes up for cases
like this:
#define round(x) ((x)>0.0 ? (x)+0.5 : (x)-0.5)
double G;
void T(double X) { G = round(X); }
(it uses the round macro a lot). This changes the LLVM code from:
%tmp.1 = setgt double %X, 0.000000e+00 ; <bool> [#uses=1]
%tmp.4 = add double %X, 5.000000e-01 ; <double> [#uses=1]
%tmp.6 = sub double %X, 5.000000e-01 ; <double> [#uses=1]
%mem_tmp.0 = select bool %tmp.1, double %tmp.4, double %tmp.6
store double %mem_tmp.0, double* %G
to:
%tmp.1 = setgt double %X, 0.000000e+00 ; <bool> [#uses=1]
%mem_tmp.0.p = select bool %tmp.1, double 5.000000e-01, double -5.000000e-01
%mem_tmp.0 = add double %mem_tmp.0.p, %X
store double %mem_tmp.0, double* %G
ret void
llvm-svn: 19537
2005-01-13 22:52:24 +00:00
81e8417614
Implement an optimization for == and != comparisons like this:
...
_Bool test2(int X, int Y) {
return &arr[X][Y] == arr;
}
instead of generating this:
bool %test2(int %X, int %Y) {
%tmp.3.idx = mul int %X, 160 ; <int> [#uses=1]
%tmp.3.idx1 = shl int %Y, ubyte 2 ; <int> [#uses=1]
%tmp.3.offs2 = sub int 0, %tmp.3.idx ; <int> [#uses=1]
%tmp.7 = seteq int %tmp.3.idx1, %tmp.3.offs2 ; <bool> [#uses=1]
ret bool %tmp.7
}
generate this:
bool %test2(int %X, int %Y) {
seteq int %X, 0 ; <bool>:0 [#uses=1]
seteq int %Y, 0 ; <bool>:1 [#uses=1]
%tmp.7 = and bool %0, %1 ; <bool> [#uses=1]
ret bool %tmp.7
}
This idiom occurs in C++ programs when iterating from begin() to end(),
in a vector or array. For example, we now compile this:
void test(int X, int Y) {
for (int *i = arr; i != arr+100; ++i)
foo(*i);
}
to this:
no_exit: ; preds = %entry, %no_exit
...
%exitcond = seteq uint %indvar.next, 100 ; <bool> [#uses=1]
br bool %exitcond, label %return, label %no_exit
instead of this:
no_exit: ; preds = %entry, %no_exit
...
%inc5 = getelementptr [100 x [40 x int]]* %arr, int 0, int 0, int %inc.rec ; <int*> [#uses=1]
%tmp.8 = seteq int* %inc5, getelementptr ([100 x [40 x int]]* %arr, int 0, int 100, int 0) ; <bool> [#uses=1]
%indvar.next = add uint %indvar, 1 ; <uint> [#uses=1]
br bool %tmp.8, label %return, label %no_exit
llvm-svn: 19536
2005-01-13 22:25:21 +00:00
e727af06c8
Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode.
...
llvm-svn: 19535
2005-01-13 20:50:02 +00:00
4cb9fa373b
Fix some bugs in code I didn't mean to check in.
...
llvm-svn: 19534
2005-01-13 20:40:58 +00:00
0798af33a5
Fix a crash compiling 129.compress
...
llvm-svn: 19533
2005-01-13 20:14:25 +00:00
15bd19dd76
Codegen factor nodes more intelligently according to perceived register pressure.
...
llvm-svn: 19532
2005-01-13 19:56:00 +00:00
2451684678
Don't forget the existing root.
...
llvm-svn: 19531
2005-01-13 19:53:14 +00:00
74bc42304c
Update the documentation about -enable-llcbeta vs. -enable-linscan
...
llvm-svn: 19530
2005-01-13 18:02:40 +00:00
c251fb6441
Initial trivial (but stupid) codegen for this node.
...
llvm-svn: 19529
2005-01-13 18:01:36 +00:00
718b5c2f82
Codegen independent ops as being independent.
...
llvm-svn: 19528
2005-01-13 17:59:43 +00:00
05b4e37e85
Legalize new node, add assertion.
...
llvm-svn: 19527
2005-01-13 17:59:25 +00:00
4b1be0dfeb
Print new node.
...
llvm-svn: 19526
2005-01-13 17:59:10 +00:00
f510866785
Add a new node type, add comments.
...
llvm-svn: 19525
2005-01-13 17:58:35 +00:00
152733823e
Turn on LOADABLE_MODULE so that profile.so can be loaded dynamically by
...
the JIT.
llvm-svn: 19524
2005-01-13 16:53:05 +00:00
9df352d469
Re-enable libprofile now that llvm-ar is working better.
...
llvm-svn: 19523
2005-01-13 16:51:19 +00:00
3676cd6fe2
Add some really pedantic assertions to the load folding code. Fix a bunch
...
of cases where we accidentally emitted a load folded once and unfolded
elsewhere.
llvm-svn: 19522
2005-01-13 05:53:16 +00:00
4dfd2cfc0c
Do not fold (zero_ext (sign_ext V)) -> (sign_ext V), they are not the same.
...
This fixes llvm-test/SingleSource/Regression/C/casts.c
llvm-svn: 19519
2005-01-12 18:51:15 +00:00
7b1dae8032
We can only fold a load into an op if there is exactly one use of the value.
...
Checking to see if the load has two uses is not equivalent, as the chain
value may have zero uses.
llvm-svn: 19518
2005-01-12 18:38:26 +00:00
40e7982c2c
New method
...
llvm-svn: 19517
2005-01-12 18:37:47 +00:00
373e8f5607
New method.
...
llvm-svn: 19516
2005-01-12 18:37:33 +00:00
9864b08f94
Fix sign extend to long. When coming from sbyte, we used to generate:
...
movsbl 4(%esp), %eax
movl %eax, %edx
sarl $7, %edx
Now we generate:
movsbl 4(%esp), %eax
movl %eax, %edx
sarl $31, %edx
Which is right.
llvm-svn: 19515
2005-01-12 18:19:52 +00:00
1321754941
Update comments to indicate CopyFrom/ToReg take physregs as well as vregs.
...
llvm-svn: 19514
2005-01-12 18:11:36 +00:00
1755360db6
Try both ways to fold an add together. This allows us to generate this code
...
imul %EAX, %EAX, 400
add %ECX, %EAX
add %ESI, DWORD PTR [%ECX + 4*%EDX]
inc %EDX
cmp %EDX, 100
instead of this:
imul %EAX, %EAX, 400
add %ECX, %EAX
mov %EAX, %EDX
shl %EAX, 2
add %ECX, %EAX
add %ESI, DWORD PTR [%ECX]
inc %EDX
cmp %EDX, 100
llvm-svn: 19513
2005-01-12 18:08:53 +00:00
6dced92447
Shut up warnings with GCC 3.4.3 about uninitialized variables.
...
llvm-svn: 19512
2005-01-12 14:53:45 +00:00
42e7e98908
Fix a major miscompilation where we were overwriting the scale reg.
...
llvm-svn: 19511
2005-01-12 07:33:20 +00:00
db4b67c81e
Do not use the type of the RHS constant to determine the type of the operation.
...
This fails for shifts because the constant is always 8 bits.
llvm-svn: 19508
2005-01-12 05:22:07 +00:00
bdb2e9dabc
Do not lose the offset from teh global when peephole optimizing instructions.
...
This fixes FreeBench/pcompress
llvm-svn: 19507
2005-01-12 05:17:28 +00:00
2f8e4ad870
Silence VC++ warnings.
...
llvm-svn: 19506
2005-01-12 04:51:37 +00:00
847b54101b
Add new file to Visual Studio CodeGen project
...
llvm-svn: 19505
2005-01-12 04:32:42 +00:00
407aa0198c
Fix C++ more compilatiom errors
...
llvm-svn: 19504
2005-01-12 04:29:05 +00:00
efe90209ef
Fix a compile error with VC++, which things that static const arrays need
...
to be dynamically initialized. :(
llvm-svn: 19503
2005-01-12 04:23:22 +00:00
6fba62d6ec
Fix a bug that caused us to crash on povray. We weren't emitting an FP_REG_KILL into a block that had a successor with a FP PHI node.
...
llvm-svn: 19502
2005-01-12 04:21:28 +00:00
bb4c14f270
Print a load of a null pointer (in intel mode) like this:
...
mov %AX, WORD PTR [0]
instead of like this:
mov %AX, WORD PTR []
llvm-svn: 19501
2005-01-12 04:07:11 +00:00
b372fab2be
Print a load of a null pointer like this:
...
movw 0, %ax
instead of like this:
movw , %ax
llvm-svn: 19500
2005-01-12 04:05:19 +00:00
f8f79c4192
Fix a crash compiling povray on UINT_TO_FP from i16.
...
llvm-svn: 19499
2005-01-12 04:00:00 +00:00
e05a461f1d
Add an option to view the selection dags as they are generated.
...
llvm-svn: 19498
2005-01-12 03:41:21 +00:00
732daa5b9d
Use and print out BuildStatus, we don't always have build errors.
...
llvm-svn: 19497
2005-01-12 03:31:38 +00:00
3278ce8871
There are no [mem] op= reg instructions for FP, so remove their entries.
...
llvm-svn: 19496
2005-01-12 03:16:09 +00:00
e49a335797
Fix a bug where we didn't insert FP_REG_KILL instructions into MBB's that
...
contain FP PHI nodes but no other FP defining instructions. This fixes
183.equake
llvm-svn: 19495
2005-01-12 02:57:10 +00:00
b7fe57a0f1
Fold TRUNCATE (LOAD P) into a smaller load from P.
...
llvm-svn: 19494
2005-01-12 02:19:06 +00:00
2cfce6853b
Be more careful about order of arg evalution for CopyToReg nodes. This shrinks
...
256.bzip2 from 7142 to 7103 lines of .s file.
Second, add initial support for folding loads into compares, though this code
is dynamically dead for now. :(
llvm-svn: 19493
2005-01-12 02:02:48 +00:00
021cfd2a80
Fold some more [mem] op= val operators. This allows us to things like this
...
several times in 256.bzip2:
mov %EAX, DWORD PTR [%ESP + 204]
- mov %EAX, DWORD PTR [%EAX]
- or %EAX, 2097152
- mov %ECX, DWORD PTR [%ESP + 204]
- mov DWORD PTR [%ECX], %EAX
+ or DWORD PTR [%EAX], 2097152
llvm-svn: 19492
2005-01-12 01:28:00 +00:00
b0eef82b82
Fold loads into sign/zero extends. instead of:
...
mov %AL, BYTE PTR [%EDX + l18_length_code]
movzx %EAX, %AL
Emit:
movzx %EAX, BYTE PTR [%EDX + l18_length_code]
llvm-svn: 19489
2005-01-11 23:33:00 +00:00
75bac9f786
Comment out debug code :)
...
Select [mem] += Val operations. For constants, we used to get:
mov %ECX, -32768
add %ECX, DWORD PTR [l4_match_start]
mov DWORD PTR [l4_match_start], %ECX
Now we get:
add DWORD PTR [l4_match_start], -32768
For other values we used to get:
mov %EBP, %EDI ;; because the add destroys the value
add %EBP, DWORD PTR [l4_input_len]
mov DWORD PTR [l4_input_len], %EBP
now we get:
add DWORD PTR [l4_input_len], %EDI
Both of these use less registers than the alternative, are faster and smaller.
llvm-svn: 19488
2005-01-11 23:21:30 +00:00
d28ae12168
Handle the global address case here, not just the offset case.
...
llvm-svn: 19487
2005-01-11 22:58:43 +00:00
8aa10fcd1b
Treat int constants as not requiring a register, since they are almost always
...
folded into an instruction.
llvm-svn: 19486
2005-01-11 22:29:12 +00:00
c2785562f1
Print the value types in the nodes of the graph
...
llvm-svn: 19485
2005-01-11 22:21:04 +00:00
613f79fcbb
add an assertion, avoid creating copyfromreg/copytoreg pairs that are the
...
same for PHI nodes.
llvm-svn: 19484
2005-01-11 22:03:46 +00:00
62b22420be
* Factor a bunch of binary operator cases into shared code.
...
* Fold loads into Add, sub, and, or, xor and mul when possible.
* Codegen shl X, 1 as add X, X
llvm-svn: 19483
2005-01-11 21:19:59 +00:00
4cbf1f0038
Clear the whole array, always.
...
llvm-svn: 19482
2005-01-11 20:25:26 +00:00
7b98f7407b
No need to repeat the word `build' since it's under `Build status'
...
llvm-svn: 19481
2005-01-11 19:51:24 +00:00
8cf9cdae3d
Fold multiplies by 3,5,9 into addressing modes when possible.
...
llvm-svn: 19480
2005-01-11 19:37:02 +00:00
870b872bfa
We don't always have build errors, so call it `status', not `error'
...
llvm-svn: 19479
2005-01-11 18:27:16 +00:00
f49c27c65c
Squelch optimized warning.
...
llvm-svn: 19475
2005-01-11 17:46:49 +00:00
792bbf02a2
Fix the documentation for executeAndWait so the argument comments are
...
actually attributed to the arguments by doxygen.
llvm-svn: 19473
2005-01-11 06:37:27 +00:00
b74ec4cd24
Instead of generating stuff like this:
...
mov %ECX, %EAX
add %ECX, 32768
mov %SI, WORD PTR [2*%ECX + l13_prev]
Generate this:
mov %SI, WORD PTR [2*%ECX + l13_prev + 65536]
This occurs when you have a GEP instruction where an index is
"something + imm".
llvm-svn: 19472
2005-01-11 06:36:20 +00:00
4596db3509
Make the construction of doxygen documentation a repeatable process
...
llvm-svn: 19469
2005-01-11 06:26:27 +00:00
c07164e909
Implement MEMCPY natively in terms of rep movs*
...
llvm-svn: 19468
2005-01-11 06:19:26 +00:00
36f7848b26
Implement memset -> rep stos*
...
llvm-svn: 19467
2005-01-11 06:14:36 +00:00
a19f84240f
Announce that we don't support mem ops yet.
...
llvm-svn: 19466
2005-01-11 05:57:36 +00:00
85d70c6fd5
Teach legalize to lower MEMSET/MEMCPY/MEMMOVE operations if the target
...
does not support them.
llvm-svn: 19465
2005-01-11 05:57:22 +00:00
844277fb1e
Print new operations.
...
llvm-svn: 19464
2005-01-11 05:57:01 +00:00
875def9b71
Turn memset/memcpy/memmove into the corresponding operations.
...
llvm-svn: 19463
2005-01-11 05:56:49 +00:00
1d7b8e118b
Add MEMSET/MEMCPY/MEMMOVE operations. Fix a really bad bug in the vector
...
SDNode ctor.
llvm-svn: 19462
2005-01-11 05:56:17 +00:00
4a1ab18fbf
* Add the use of LOADABLE_MODULE=1 in the makefile example
...
* Change the names of the resulting module to Hello instead of libHello
* Change lib/Debug -> Debug/lib per new makefile implementation.
llvm-svn: 19459
2005-01-11 05:16:23 +00:00
1e008c200d
* Describe the LOADABLE_MODULE feature
...
* Get rid of non-compliant <font> elements (how did that get in there?)
llvm-svn: 19458
2005-01-11 05:12:54 +00:00
378262d33b
Teach the address selector to make 'reg+reg' addressing modes.
...
llvm-svn: 19457
2005-01-11 04:40:19 +00:00
134f02d0c7
Add the LOADABLE_MODULE=1 directive to indicate that this shared library is
...
intended to be a dlopenable module and not a "plain" shared library.
llvm-svn: 19456
2005-01-11 04:33:32 +00:00
9d7cf998ca
Emit NOT instructions.
...
llvm-svn: 19455
2005-01-11 04:31:30 +00:00
87e645c5bd
Implement the LOADABLE_MODULE option when building a shared library. This
...
passes the -module option on the libtool command line to ensure that the
shared library being built can be dlopened and dlsym can work on that
module. LOADABLE_MODULE should be sent only in conjunction with the
SHARED_LIBRARY directive. It should generally be used for any module that
is intended to be the target of an LLVM -load option. Note that loadable
modules will not have the lib prefix but otherwise look like shared
libraries. This is per the libtool recommendations and prevents these
special shared libraries from being linked in via -l option to the linker.
llvm-svn: 19454
2005-01-11 04:31:07 +00:00
a86fa4455b
shift X, 0 -> X
...
llvm-svn: 19453
2005-01-11 04:25:13 +00:00
37ed28558f
Fix a bug emitting branches that broke a lot of programs.
...
llvm-svn: 19452
2005-01-11 04:06:27 +00:00
e44e6d16fb
Be more careful where we set ContainsFPCode. We were missing a set in the
...
int -> FP casting code. Note that we don't have to set it for FP operations
that take FP values as operands: whatever produces the FP value will set the
flag.
llvm-svn: 19451
2005-01-11 03:50:45 +00:00
8fea42bd6d
Fix a major bug in setcc/cmov folding, where we accidentally
...
inverted the sense of the comparison.
llvm-svn: 19450
2005-01-11 03:37:59 +00:00
0d1f82ac2f
Take register pressure into account when we have to decide whether to
...
evaluate the LHS or the RHS of an operation first. This causes good things
to happen. For example, instead of compiling a loop to this:
.LBBstrength_result7_1: # loopentry
movl 16(%esp), %edi
movl (%edi), %edi ;;; LOAD
movl (%ecx), %ebx
movl $2, (%eax,%ebx,4)
movl (%edx), %ebx
movl %esi, %ebp
addl $21, %ebp
addl $42, %esi
cmpl $0, %edi ;;; USE
cmovne %esi, %ebp
cmpl %ebp, %ebx
movl %ebp, %esi
jg .LBBstrength_result7_1
We now compile it to this:
.LBBstrength_result7_1: # loopentry
movl %edi, %ebx
addl $42, %ebx
addl $21, %edi
movl (%ecx), %ebp ;; LOAD
cmpl $0, %ebp ;; USE
cmovne %ebx, %edi
movl (%edx), %ebx
movl $2, (%eax,%ebx,4)
movl (%esi), %ebx
cmpl %edi, %ebx
jg .LBBstrength_result7_1
Which reduces register pressure enough (in this case) to avoid spilling in the
loop.
As another example, consider the CodeGen/X86/regpressure.ll testcase. We
used to generate this code for both cases:
regpressure1:
subl $32, %esp
movl %esi, 12(%esp)
movl %edi, 8(%esp)
movl %ebx, 4(%esp)
movl %ebp, (%esp)
movl 36(%esp), %ecx
movl (%ecx), %eax
movl 4(%ecx), %edx
movl %edx, 24(%esp)
movl 8(%ecx), %edx
movl %edx, 16(%esp)
movl 12(%ecx), %edx
movl 16(%ecx), %esi
movl 20(%ecx), %edi
movl 24(%ecx), %ebx
movl %ebx, 28(%esp)
movl 28(%ecx), %ebx
movl 32(%ecx), %ebp
movl %ebp, 20(%esp)
movl 36(%ecx), %ecx
imull 24(%esp), %eax
imull 16(%esp), %eax
imull %edx, %eax
imull %esi, %eax
imull %edi, %eax
imull 28(%esp), %eax
imull %ebx, %eax
imull 20(%esp), %eax
imull %ecx, %eax
movl (%esp), %ebp
movl 4(%esp), %ebx
movl 8(%esp), %edi
movl 12(%esp), %esi
addl $32, %esp
ret
This code is basically trying to do all of the loads first, then execute all
of the multiplies. Because we run out of registers, lots of spill code happens.
We now generate this code for both cases:
regpressure1:
movl 4(%esp), %ecx
movl (%ecx), %eax
movl 4(%ecx), %edx
imull %edx, %eax
movl 8(%ecx), %edx
imull %edx, %eax
movl 12(%ecx), %edx
imull %edx, %eax
movl 16(%ecx), %edx
imull %edx, %eax
movl 20(%ecx), %edx
imull %edx, %eax
movl 24(%ecx), %edx
imull %edx, %eax
movl 28(%ecx), %edx
imull %edx, %eax
movl 32(%ecx), %edx
imull %edx, %eax
movl 36(%ecx), %ecx
imull %ecx, %eax
ret
which is much nicer (when we fold loads into the muls it will be even better).
The old instruction selector used to produce the good code for regpressure1
but not for regpressure2, as it depended on the order of operations in the
LLVM code.
llvm-svn: 19449
2005-01-11 03:11:44 +00:00
788bdba13d
The pattern isel is aggressively codegen'ing all of the loads in these
...
functions together at the start of the basic block, causing massive spillage.
The old isel codegened the loads wherever they happened to land, so it
generated good code for the first case, but bad code for the second.
We really want the pattern isel to generate (the same) good code for both.
llvm-svn: 19448
2005-01-11 03:05:03 +00:00
1308b488ea
Print SelectionDAGs bottom up, include extra info in the node labels
...
llvm-svn: 19447
2005-01-11 00:34:33 +00:00
39c5808fdb
Add support for bottom-up graphs.
...
llvm-svn: 19446
2005-01-11 00:24:59 +00:00
b241b443b6
Add a marker for the graph root.
...
llvm-svn: 19445
2005-01-10 23:52:04 +00:00
12be02722f
Put the operation name in each node, put the function name on the graph.
...
llvm-svn: 19444
2005-01-10 23:26:00 +00:00
9e4c76123c
Split out SDNode::getOperationName into its own method.
...
llvm-svn: 19443
2005-01-10 23:25:25 +00:00
7fa992e976
Add a helper method.
...
llvm-svn: 19442
2005-01-10 23:25:04 +00:00
7f65075be3
Implement initial selectiondag printing support. This gets us a nice
...
graph with no labels! :)
llvm-svn: 19441
2005-01-10 23:08:40 +00:00
e32371bad6
Add support for graph operations, and add a viewGraph method to SelectionDAG.
...
llvm-svn: 19440
2005-01-10 23:05:53 +00:00
da7c050442
Add a helper method
...
llvm-svn: 19439
2005-01-10 23:05:07 +00:00
1d13a92af4
Fold setcc instructions into selects.
...
llvm-svn: 19438
2005-01-10 22:10:13 +00:00
Jeff Cohen