ce774e2383
Darwin assembler now supports "rrx", so remove workaround.
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llvm-svn: 77625
2009-07-30 21:38:40 +00:00
79c079b478
Cleanup and include code selection for some frame index cases.
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llvm-svn: 77622
2009-07-30 18:56:48 +00:00
cab137d294
Add missing D* register clobbers for Thumb-2 call.
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llvm-svn: 77611
2009-07-30 18:01:09 +00:00
703edcc553
Minor whitespace tidiness.
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llvm-svn: 77602
2009-07-30 17:04:07 +00:00
013f007762
Rename GRAD to GR32_AD, to follow the naming convention of other
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classes. And define its SubRegClassList.
llvm-svn: 77601
2009-07-30 17:02:08 +00:00
c667b60b93
add a random codegen deficiency.
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llvm-svn: 77598
2009-07-30 16:08:58 +00:00
92df9c3323
Add a note.
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llvm-svn: 77584
2009-07-30 08:56:19 +00:00
e62288fdd4
Optimize some common usage patterns of atomic built-ins __sync_add_and_fetch() and __sync_sub_and_fetch.
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When the return value is not used (i.e. only care about the value in the memory), x86 does not have to use add to implement these. Instead, it can use add, sub, inc, dec instructions with the "lock" prefix.
This is currently implemented using a bit of instruction selection trick. The issue is the target independent pattern produces one output and a chain and we want to map it into one that just output a chain. The current trick is to select it into a merge_values with the first definition being an implicit_def. The proper solution is to add new ISD opcodes for the no-output variant. DAG combiner can then transform the node before it gets to target node selection.
Problem #2 is we are adding a whole bunch of x86 atomic instructions when in fact these instructions are identical to the non-lock versions. We need a way to add target specific information to target nodes and have this information carried over to machine instructions. Asm printer (or JIT) can use this information to add the "lock" prefix.
llvm-svn: 77582
2009-07-30 08:33:02 +00:00
6afdc5e694
Switch obvious clients to Twine instead of utostr (when they were already using
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a Twine, e.g., for names).
- I am a little ambivalent about this; we don't want the string conversion of
utostr, but using overload '+' mixed with string and integer arguments is
sketchy. On the other hand, this particular usage is something of an idiom.
llvm-svn: 77579
2009-07-30 04:20:37 +00:00
8787861004
Keep track of references to mem(cpy,move,set) and then print only one extern
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declaration for them.
llvm-svn: 77578
2009-07-30 04:15:15 +00:00
49a6f16b7c
Add a new register class to describe operands that can't be SP,
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due to x86 encoding restrictions. This is currently off by default
because it may cause code quality regressions. This is for PR4572.
llvm-svn: 77565
2009-07-30 01:56:29 +00:00
652529ec9c
Eliminate a bunch of redundant tables.
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llvm-svn: 77558
2009-07-30 00:40:42 +00:00
0dbdec8042
Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs.
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llvm-svn: 77557
2009-07-30 00:31:25 +00:00
da9ba9ec2c
Use array_endof instead of doing it manually.
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llvm-svn: 77553
2009-07-30 00:10:18 +00:00
e3493a91cc
tbb / tbh instructions only branch forward, not backwards.
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llvm-svn: 77522
2009-07-29 23:20:20 +00:00
1f58eed638
Add VFP3 D registers to the DPR register class.
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llvm-svn: 77521
2009-07-29 23:03:41 +00:00
4056ca9568
Move types back to the 2.5 API.
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llvm-svn: 77516
2009-07-29 22:17:13 +00:00
7667332899
inline the global 'getInstrOperandRegClass' function into its callers
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now that TargetOperandInfo does the heavy lifting.
llvm-svn: 77508
2009-07-29 21:36:49 +00:00
175bd14967
Make sure Thumb2 uses the right call instructions.
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llvm-svn: 77507
2009-07-29 21:26:42 +00:00
f3239532cc
1. Introduce a new TargetOperandInfo::getRegClass() helper method
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and convert code to using it, instead of having lots of things
poke the isLookupPtrRegClass() method directly.
2. Make PointerLikeRegClass contain a 'kind' int, and store it in
the existing regclass field of TargetOperandInfo when the
isLookupPtrRegClass() predicate is set. Make getRegClass pass
this into TargetRegisterInfo::getPointerRegClass(), allowing
targets to have multiple ptr_rc things.
llvm-svn: 77504
2009-07-29 21:10:12 +00:00
ee68a483ec
Give getPointerRegClass() a "kind" value so that targets can
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support multiple different pointer register classes.
llvm-svn: 77501
2009-07-29 20:31:52 +00:00
0d98d8b8b3
- Fix an obvious copy and paste error.
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- Darwin Thumb2 call clobbers r9.
llvm-svn: 77500
2009-07-29 20:10:36 +00:00
77268a56ff
Add llvm_unreachable for ... unreachable code!
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llvm-svn: 77480
2009-07-29 18:14:04 +00:00
cf19885a32
Change Neon VLDn intrinsics to return multiple values instead of really
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wide vectors. Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct. Adjust tests accordingly.
llvm-svn: 77468
2009-07-29 16:39:22 +00:00
4eb9df073d
more syntactic cleanups.
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llvm-svn: 77442
2009-07-29 06:33:53 +00:00
5e6e022770
minor smallvector cleanups
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llvm-svn: 77441
2009-07-29 06:29:53 +00:00
6b6dbb3bd8
whitespace cleanup.
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llvm-svn: 77438
2009-07-29 05:48:09 +00:00
e033e6da08
mingw uses .data and .text, not _data and _text.
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llvm-svn: 77435
2009-07-29 05:25:42 +00:00
c5397abb52
fix PR4584 with a trivial patch now that the pieces are in place.
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llvm-svn: 77434
2009-07-29 05:20:33 +00:00
5034329f8d
pass the mangler down into the various SectionForGlobal methods.
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No functionality change.
llvm-svn: 77432
2009-07-29 05:09:30 +00:00
8f35574c06
constant prop a utostr.
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llvm-svn: 77430
2009-07-29 04:55:08 +00:00
7610c57d4b
remove some completely wrong code. 1 is never < 16. It turns out that GCC appears to put strings of any length into the ELF cstring equivalent, so just rip out the code.
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llvm-svn: 77429
2009-07-29 04:54:38 +00:00
c6d70ae063
Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte / halfword.
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llvm-svn: 77422
2009-07-29 02:18:14 +00:00
99f5534296
Fix comment.
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llvm-svn: 77415
2009-07-29 01:01:19 +00:00
bef0437d61
Change the "PreferredEHDataFormat" from "absptr" if we're on a Darwin system >
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Leopard.
llvm-svn: 77414
2009-07-29 00:59:34 +00:00
f7802a33ce
Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower
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to ptest instruction plus setcc. Revamp ptest instruction. Add test.
llvm-svn: 77407
2009-07-29 00:28:05 +00:00
0033199c50
Match X86 register names to number.
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llvm-svn: 77404
2009-07-29 00:02:19 +00:00
0830980141
Thumb-2: fix typo that caused incorrect stack elimination for VFP operations and very large stack frames.
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llvm-svn: 77401
2009-07-28 23:52:33 +00:00
e1fdb0e8ce
Move X86 instruction parsing into X86/AsmParser.
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llvm-svn: 77384
2009-07-28 22:40:46 +00:00
26cf1e3baf
Output the correct format for Darwin.
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llvm-svn: 77376
2009-07-28 22:03:50 +00:00
403990ad58
Darwin outputs (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4) when we're
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dealing with Data.
llvm-svn: 77372
2009-07-28 21:53:17 +00:00
a4f43fb5dd
Rename MDNode.h header. It defines MDnode and other metadata classes.
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New name is Metadata.h.
llvm-svn: 77370
2009-07-28 21:49:47 +00:00
4aa3295a65
Return ConstantVector to 2.5 API.
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llvm-svn: 77366
2009-07-28 21:19:26 +00:00
c8bed03349
In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in).
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llvm-svn: 77364
2009-07-28 20:53:24 +00:00
68bb69d6e3
Remove support for ORN to workaround <rdar://problem/7096522>.
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llvm-svn: 77363
2009-07-28 20:51:25 +00:00
f59ee96a16
Provide generic MCAsmParser when constructing target specific parsers.
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llvm-svn: 77362
2009-07-28 20:47:52 +00:00
d6b4b29706
more simplifications and cleanup. :)
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llvm-svn: 77350
2009-07-28 18:48:43 +00:00
c2c7932c64
Change ConstantArray to 2.5 API.
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llvm-svn: 77347
2009-07-28 18:32:17 +00:00
865c6298d7
Add workaround for <rdar://problem/7098328>.
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llvm-svn: 77340
2009-07-28 18:15:38 +00:00
513a36b63d
Fix PR4639, a ELF-TLS regression from some of my refactoring.
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llvm-svn: 77336
2009-07-28 17:57:51 +00:00
David Goodwin