llvm-project

Commit Graph

Author	SHA1	Message	Date
Chris Lattner	353fda159d	relax this test to just check that the lock prefix is encoded properly, and to not rely on the register allocator's arbitrary operand choices. llvm-svn: 129690	2011-04-18 06:15:35 +00:00
Chris Lattner	b53ccb8e36	1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.ll 2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts 3. teach tblgen to handle shift immediates that are different sizes than the shifted operands, eliminating some code from the X86 fast isel backend. 4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function instead of FastEmit_ri to simplify code. llvm-svn: 129666	2011-04-17 20:23:29 +00:00
Daniel Dunbar	1844a71e66	X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard to find miscompiles with the integrated assembler. llvm-svn: 112250	2010-08-27 01:30:14 +00:00

Author

SHA1

Message

Date

Chris Lattner

353fda159d

relax this test to just check that the lock prefix is encoded properly,

and to not rely on the register allocator's arbitrary operand choices.

llvm-svn: 129690

2011-04-18 06:15:35 +00:00

Chris Lattner

b53ccb8e36

1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.ll

2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts
3. teach tblgen to handle shift immediates that are different sizes than the 
   shifted operands, eliminating some code from the X86 fast isel backend.
4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function
   instead of FastEmit_ri to simplify code.

llvm-svn: 129666

2011-04-17 20:23:29 +00:00

Daniel Dunbar

1844a71e66

X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard to find miscompiles with the integrated assembler.

llvm-svn: 112250

2010-08-27 01:30:14 +00:00

3 Commits