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10 Commits

Author SHA1 Message Date
Elena Demikhovsky 7c2c9fd243 AVX-512: Fixed COPY_TO_REGCLASS for mask registers 
Copying one mask register to another under BW should be done with kmovq instruction, otherwise we can loose some bits.
Copying 8 bits under DQ may be done with kmovb.

Differential Revision: http://reviews.llvm.org/D14812

llvm-svn: 253563
 2015-11-19 13:13:00 +00:00
Igor Breger fa798a9dbb AVX512: Implemented encoding and intrinsics for VBROADCASTI32x2 and VBROADCASTF32x2 instructions. 
Differential Revision: http://reviews.llvm.org/D14216

llvm-svn: 251781
 2015-11-02 07:39:36 +00:00
Asaf Badouh 572bbceecc [X86][AVX512DQ] Add fpclass instruction 
Differential Revision: http://reviews.llvm.org/D12931

llvm-svn: 248115
 2015-09-20 08:46:07 +00:00
Igor Breger 0ede3cbb5c AVX512: Implement instructions encoding, lowering and intrinsics 
vinserti64x4, vinserti64x2, vinserti32x8, vinserti32x4, vinsertf64x4, vinsertf64x2, vinsertf32x8, vinsertf32x4
Added tests for encoding, lowering and intrinsics.

Differential Revision: http://reviews.llvm.org/D11893

llvm-svn: 248111
 2015-09-20 06:52:42 +00:00
Igor Breger 7f69a99c54 AVX512: Implemented encoding and intrinsics for 
vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11802

llvm-svn: 247276
 2015-09-10 12:54:54 +00:00
Renato Golin db7ea86bf4 Revert "AVX512: Implemented encoding and intrinsics for vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4 Added tests for intrinsics and encoding." 
This reverts commit r247149, as it was breaking numerous buildbots of varied architectures.

llvm-svn: 247177
 2015-09-09 19:44:40 +00:00
Igor Breger ac29a82921 AVX512: Implemented encoding and intrinsics for 
vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11802

llvm-svn: 247149
 2015-09-09 14:35:09 +00:00
Asaf Badouh a5b2e5e2a7 [X86][AVX512] add reduce/range/scalef/rndScale 
include encoding and intrinsics

Differential Revision: http://reviews.llvm.org/D11222

llvm-svn: 242896
 2015-07-22 12:00:43 +00:00
Elena Demikhovsky a26f10ce18 AVX-512: Added intrinsics for VCVT* instructions. 
All SKX forms. All VCVT instructions for float/double/int/long types.

Differential Revision: http://reviews.llvm.org/D11343

llvm-svn: 242877
 2015-07-22 08:56:00 +00:00
Elena Demikhovsky d41e506342 AVX-512: added a test for encoding 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236421
 2015-05-04 12:59:15 +00:00