Commit Graph

21655 Commits

Author SHA1 Message Date
Nate Begeman 26b76b69f4 Support a new type of MachineOperand, MO_FPImmediate, used for holding
FP Immediates, crazily enough

llvm-svn: 47117
2008-02-14 07:39:30 +00:00
Chris Lattner 89acd61805 simplify code, no functionality change.
llvm-svn: 47116
2008-02-14 07:39:01 +00:00
Nate Begeman 64db2b9615 Move some useful operands up into the all-targets .td
llvm-svn: 47115
2008-02-14 07:25:46 +00:00
Nick Lewycky 7c77e2bc65 Fix PR2032. Inform the alias analysis of changes to the underlying program.
llvm-svn: 47111
2008-02-14 07:11:24 +00:00
Chris Lattner eb63b09206 upgrade some entries, remove stuff that is done.
llvm-svn: 47109
2008-02-14 06:19:02 +00:00
Chris Lattner 5bc0957f5b the mid-level optimizer removes this stuff.
llvm-svn: 47108
2008-02-14 05:43:18 +00:00
Chris Lattner b43983b274 this one is easy.
llvm-svn: 47107
2008-02-14 05:41:38 +00:00
Chris Lattner 3bd37f549a This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
Dan Gohman 7e22a5d8df Allow the APInt form of ComputeMaskedBits to operate on i128 types.
llvm-svn: 47101
2008-02-13 23:13:32 +00:00
Dan Gohman 9ca025f1dc Assigning an APInt to 0 with plain assignment gives it a one-bit
size. Initialize these APInts to properly-sized zero values.

llvm-svn: 47099
2008-02-13 23:07:24 +00:00
Dan Gohman 95d25d39d0 Avoid setting bits that aren't demanded.
llvm-svn: 47098
2008-02-13 22:43:25 +00:00
Dan Gohman e1d9ee66ed Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference. 

llvm-svn: 47096
2008-02-13 22:28:48 +00:00
Devang Patel 0ecb76d820 A loop latch phi node may have uses inside loop, not just in loop header.
llvm-svn: 47093
2008-02-13 22:23:07 +00:00
Dan Gohman 1ee8dc97d9 Rename APInt's isPositive to isNonNegative, to reflect what it
actually does.

llvm-svn: 47090
2008-02-13 22:09:18 +00:00
Devang Patel 22c3caab6e While moving exit condition, do not drop loop latch on the floor.
llvm-svn: 47089
2008-02-13 22:06:36 +00:00
Dan Gohman 8b4fa9dc0a Add countTrailingOnes member functions to APInt.
llvm-svn: 47086
2008-02-13 21:11:05 +00:00
Devang Patel c281d8031b Keep track of exit value operand number when operands are swapped.
llvm-svn: 47082
2008-02-13 19:48:48 +00:00
Nicolas Geoffray 21ad494f67 Enable exception handling int JIT
llvm-svn: 47079
2008-02-13 18:39:37 +00:00
Duncan Sands f8d29f228d Teach LegalizeTypes how to expand and promote CTLZ,
CTTZ and CTPOP.  The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it.  I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it.  The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select.  This also means the value doesn't
need to be zero extended.

llvm-svn: 47075
2008-02-13 18:01:53 +00:00
Chris Lattner d973e836f1 Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR.
llvm-svn: 47067
2008-02-13 17:24:14 +00:00
Chris Lattner 67b9ef7be8 remove some dead code.
llvm-svn: 47066
2008-02-13 17:18:26 +00:00
Devang Patel f64f7fb1b6 Remove use of ltdl
llvm-svn: 47065
2008-02-13 17:11:39 +00:00
Wojciech Matyjewicz 0e411f653c Fix typo. Thanks to Duncan for noticing.
llvm-svn: 47062
2008-02-13 12:21:32 +00:00
Wojciech Matyjewicz 35545fd84d Add comments as per review feedback.
llvm-svn: 47061
2008-02-13 11:51:34 +00:00
Evan Cheng 587c66ed96 Some code clean up.
llvm-svn: 47060
2008-02-13 09:56:03 +00:00
Evan Cheng dc3f3841fc Simplify.
llvm-svn: 47058
2008-02-13 09:13:21 +00:00
Evan Cheng bb4b97f90e Fix a potential serious problem where kills belonging to the val# defined by a two-address instruction is also on the val# that defines the input.
llvm-svn: 47057
2008-02-13 09:06:18 +00:00
Evan Cheng 8cc58728a8 * Cannot safely commute an instruction there are other defs which can reach its uses.
* Ignore copy instructions which have already been coalesced.

llvm-svn: 47056
2008-02-13 08:41:08 +00:00
Chris Lattner a08af08a88 In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
node as soon as we create it in SDISel.  Previously we would lower it in
legalize.  The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them.  This causes us to miss some optimizations because 
datatype expansion also happens here.

Exposing the loads early allows us to do optimizations on them.  For example
we now compile arg-cast.ll to:

_foo:
	movl	$2147483647, %eax
	andl	8(%esp), %eax
	ret

where we previously produced:

_foo:
	subl	$12, %esp
	movsd	16(%esp), %xmm0
	movsd	%xmm0, (%esp)
	movl	$2147483647, %eax
	andl	4(%esp), %eax
	addl	$12, %esp
	ret

It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.

llvm-svn: 47054
2008-02-13 07:39:09 +00:00
Chris Lattner f6518cf4ab don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS.
DAGCombine is now quite good at zapifying them.

llvm-svn: 47053
2008-02-13 07:35:30 +00:00
Chris Lattner ee322b44a4 teach dag combiner how to eliminate MERGE_VALUES nodes.
llvm-svn: 47052
2008-02-13 07:25:05 +00:00
Nate Begeman eea32990a9 readme updates
llvm-svn: 47051
2008-02-13 07:06:12 +00:00
Nate Begeman 735ab3ce67 Support legalizing insert_vector_elt on targets where the element
type is not legal.

llvm-svn: 47048
2008-02-13 06:43:04 +00:00
Evan Cheng 1446726f3e Initial support for copy elimination by commuting its definition MI.
PR1877.
A3 = op A2 B0<kill>                                                                                                                                                                            
...                                                                                                                                                                                     
B1 = A3      <- this copy                                                                                                                                                                      
...                                                                                                                                                                                          
   = op A3   <- more uses                                                                                                                                                                      
                                                                                                                                                                                                 
==>                                                                                                                                                                                             
                                                                                                                                                                                            
B2 = op B0 A2<kill>                                                                                                                                                                            
...                                                                                                                                                                                          
B1 = B2      <- now an identify copy                                                                                                                                                           
...                                                                                                                                                                                          
   = op B2   <- more uses

This speeds up FreeBench/neural by 29%, Olden/bh by 12%, oopack_v1p8 by 53%.

llvm-svn: 47046
2008-02-13 03:01:43 +00:00
Nate Begeman 87abe955fc Make register scavenging happy by not using a reg (CR0) that isn't defined
llvm-svn: 47045
2008-02-13 02:58:33 +00:00
Evan Cheng 47f462a7ec - Added removeValNo() to remove all live ranges of a particular value#.
- removeRange() can now update value# information.

llvm-svn: 47044
2008-02-13 02:48:26 +00:00
Evan Cheng 244183ef0d commuteInstr() can now commute non-ssa machine instrs.
llvm-svn: 47043
2008-02-13 02:46:49 +00:00
Evan Cheng 61732d994e Added debugging routine dumpUses.
llvm-svn: 47042
2008-02-13 02:45:38 +00:00
Dan Gohman f990faf23b Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.

llvm-svn: 47039
2008-02-13 00:35:47 +00:00
Dale Johannesen ffde4ff5b1 __DATA not __DATA__ is the right segment name on darwin.
Spotted by Nick Kledzik.

llvm-svn: 47037
2008-02-12 23:35:09 +00:00
Nate Begeman bcc182f50d Remove some dead code
llvm-svn: 47036
2008-02-12 22:54:40 +00:00
Nate Begeman 8ef50214f0 SSE4.1 64b integer insert/extract pattern support
Move formats into the formats file

llvm-svn: 47035
2008-02-12 22:51:28 +00:00
Owen Anderson 00dba4f734 Re-apply the patch to improve the optimizations of memcpy's, with several
bugs fixed.  This now passes PPC bootstrap.

llvm-svn: 47026
2008-02-12 21:15:18 +00:00
Duncan Sands f213e82bc5 Generalize getCopyFromParts and getCopyToParts to
handle arbitrary precision integers and any number
of parts.  For example, on a 32 bit machine an i50
corresponds to two i32 parts.  getCopyToParts will
extend the i50 to an i64 then write half of the i64
to each part; getCopyFromParts will combine the two
i32 parts into an i64 then truncate the result to
i50.

llvm-svn: 47024
2008-02-12 20:46:31 +00:00
Evan Cheng 83af1197ca Revert r46916 PPCTargetAsmInfo.cpp.
llvm-svn: 47020
2008-02-12 19:25:12 +00:00
Evan Cheng 8a25d6ac53 Only using x86-64 rip relative addressing in non-staic mode?
llvm-svn: 47019
2008-02-12 19:20:46 +00:00
Wojciech Matyjewicz 1d2c27b23e Fix PR2002. Suppose n is the initial value for the induction
variable (with step 1) and m is its final value. Then, the correct trip 
count is SMAX(m,n)-n. Previously, we used SMAX(0,m-n), but m-n may 
overflow and can't in general be interpreted as signed.

Patch by Nick Lewycky.

llvm-svn: 47007
2008-02-12 15:09:36 +00:00
Eli Friedman 716c10c01e Fix for bug 1996: optimize out loads of undef. This code basically just
checks for a malloc/alloca immediately followed by a load.

llvm-svn: 47006
2008-02-12 12:08:14 +00:00
Evan Cheng 352acec37e Update comment.
llvm-svn: 47002
2008-02-12 07:59:55 +00:00
Evan Cheng 4d8c98b8f9 Unbreak various insert_vector_elt and extract_vector_elt tests in presence of SSE4.
llvm-svn: 47001
2008-02-12 07:59:45 +00:00