832a6a1909
PreRA scheduler should avoid cloning compares.
...
Added canClobberReachingPhysRegUse() to handle a particular pattern in
which a two-address instruction could be forced to interfere with
EFLAGS, causing a compare to be unnecessarilly cloned.
Fixes rdar://problem/5875261
llvm-svn: 138924
2011-09-01 00:54:31 +00:00
b9a899995d
Don't forget to add the landingpad and resume instructions to the InstructionList.
...
This was found via a nightly build of 483.xalancbmk.
llvm-svn: 138923
2011-09-01 00:50:20 +00:00
1d3c137839
Thumb2 assembly parsing and encoding for ADD(immediate).
...
llvm-svn: 138922
2011-09-01 00:28:52 +00:00
17847ae757
Fixup for functions that return a bool.
...
llvm-svn: 138918
2011-08-31 23:49:05 +00:00
080f40a49d
Reenable test.
...
llvm-svn: 138916
2011-08-31 23:08:05 +00:00
54b91028f0
Revert accidental commit
...
llvm-svn: 138915
2011-08-31 23:07:46 +00:00
c472975fd9
Disable this test until Bill fixes it properly.
...
llvm-svn: 138914
2011-08-31 23:03:30 +00:00
e1995f2566
Static relocation model Thumb jump table interworking.
...
Make sure the low bit of the PC is set when loading an address directly
for jump tables in static relocation model.
llvm-svn: 138912
2011-08-31 22:23:09 +00:00
4af0aa98d5
The asm parser currently selects the wrong encoding for non-conditional Thumb2 branches. However, this exposed a number of situations where the decoder was too permissive in allowing invalid instructions to decode successful. Specify additional fixed bits to close those gaps.
...
llvm-svn: 138910
2011-08-31 22:00:41 +00:00
5624fe0cff
Update to new EH scheme.
...
llvm-svn: 138908
2011-08-31 21:50:07 +00:00
e336599f6d
Update to new EH scheme.
...
llvm-svn: 138906
2011-08-31 21:44:24 +00:00
55fb73a6e0
Remove old declare statements.
...
llvm-svn: 138905
2011-08-31 21:41:20 +00:00
22055c713f
Update more tests to the new EH scheme.
...
llvm-svn: 138904
2011-08-31 21:40:15 +00:00
d4e871404d
Update more tests to the new EH scheme.
...
llvm-svn: 138903
2011-08-31 21:39:05 +00:00
293c31b81c
Add tests for the transformations SCCP can do on atomic loads and stores (which are safe without any modifications).
...
llvm-svn: 138902
2011-08-31 21:37:06 +00:00
7df940d660
Fix Size Typing
...
Stores sizes as uint64_t to avoid possible truncation.
llvm-svn: 138901
2011-08-31 21:34:20 +00:00
c4c24f03e9
Revert r138894. This was failing on cmake-clang-i686-msvc10.
...
llvm-svn: 138900
2011-08-31 21:20:25 +00:00
99bc84662f
Thumb2 t2Bcc should encode as t2B when condition is 'always'.
...
llvm-svn: 138898
2011-08-31 21:17:31 +00:00
a0d85139e5
Move more code around and duplicate AVX patterns: MOVHPS and MOVLPS
...
llvm-svn: 138897
2011-08-31 21:15:32 +00:00
21a180367b
Move MOVAPS,MOVUPS patterns close to the instructions definition
...
llvm-svn: 138896
2011-08-31 21:15:29 +00:00
941001312a
Remove "_Int" forms of MOVUPSmr and MOVAPSmr
...
llvm-svn: 138895
2011-08-31 21:15:22 +00:00
e6174a2c85
Update more tests to the new EH scheme.
...
llvm-svn: 138894
2011-08-31 21:04:11 +00:00
b1e680fd3f
Update the tests to the new EH scheme.
...
llvm-svn: 138891
2011-08-31 20:55:40 +00:00
770d0f0700
Make sure we aren't deleting the landingpad instruction.
...
The landingpad instruction is required in the landing pad block. Because we're
not deleting terminating instructions, the invoke may still jump to here (see
Transforms/SCCP/2004-11-16-DeadInvoke.ll). Remove all uses of the landingpad
instruction, but keep it around until code-gen can remove the basic block.
llvm-svn: 138890
2011-08-31 20:55:20 +00:00
a455a0b1e7
Fix encoding for tBcc with immediate offset operand.
...
llvm-svn: 138889
2011-08-31 20:26:14 +00:00
ae1acddb95
Misc cleanup; addresses Duncan's comments on r138877.
...
llvm-svn: 138887
2011-08-31 20:13:26 +00:00
939cd21248
When performing instruction selection for LDR_PRE_IMM/LDRB_PRE_IMM, we still need to preserve the sign of the index. This fixes miscompilations of Quicksort in the nightly testsuite, and hopefully others as well.
...
<rdar://problem/10046188>
llvm-svn: 138885
2011-08-31 20:00:11 +00:00
6a69d6902f
Run the Thumb1 parser tests in Thumb2 mode, as well.
...
Thumb2 is a superset of Thumb1, so all of the encodings should still work.
llvm-svn: 138883
2011-08-31 19:50:28 +00:00
cfa9421e16
Remove FIXME. Thumb2 MOV instruction will use separate custom tricks.
...
When we want encoding T3 (the wide encoding), we can explicitly check for
that and twiddle the CanAcceptCarrySet accordingly. For now, just correctly
handle encodings T1 and T2 when in Thumb2 mode.
llvm-svn: 138879
2011-08-31 18:39:39 +00:00
e839ecb70b
Fill in type legalization for MERGE_VALUES in all the various cases. Patch by Micah Villmow. (No testcase because the issue only showed up in an out-of-tree backend.)
...
llvm-svn: 138877
2011-08-31 18:36:04 +00:00
6eb213c919
Thumb NOP encoding varies depending on ARCH revision.
...
llvm-svn: 138876
2011-08-31 18:35:46 +00:00
5c160fd243
Fix roundtripping of Thumb BL/BLX instructions with immediate offsets instead of labels.
...
llvm-svn: 138874
2011-08-31 18:30:20 +00:00
c61fc8f301
tBcc is OK to be predicated in Thumb2 outside of IT blocks (obviously).
...
llvm-svn: 138873
2011-08-31 18:29:05 +00:00
7c3bdede25
Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM.
...
llvm-svn: 138872
2011-08-31 18:26:09 +00:00
af8c3cc710
Thumb2 parsing and encoding for ADC(register).
...
Also add instruction aliases for non-.w versions of SBC since they're the
same.
llvm-svn: 138871
2011-08-31 18:23:08 +00:00
df060bc3c2
After r138010, subroutine type does not have context info. Update type verifier accordingly.
...
This fixes ptype.exp gdb testsuite regressions.
llvm-svn: 138869
2011-08-31 18:04:31 +00:00
1ccecbb9d3
64-bit atomic cmpxchg for ARM.
...
llvm-svn: 138868
2011-08-31 17:52:22 +00:00
1fcf140ae3
Fix typo. Patch by Liu.
...
llvm-svn: 138866
2011-08-31 17:49:04 +00:00
cdef71f4f3
Compress Repeated Byte Output
...
Emit a repeated sequence of bytes using .zero. This saves an enormous
amount of asm file space for certain programs.
llvm-svn: 138864
2011-08-31 17:30:56 +00:00
6d606fbe14
Tweak Thumb1 ADD encoding selection a bit.
...
When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.
llvm-svn: 138862
2011-08-31 17:07:33 +00:00
cd893390f5
Put VMOVS widening under a command line option, off by default.
...
It appears that our use of the imp-use and imp-def flags with
sub-registers is not yet robust enough to support this.
The failing test case is complicated, I am working on a reduction.
<rdar://problem/10044201>
llvm-svn: 138861
2011-08-31 17:00:02 +00:00
5247ca0ae5
This test requires sse, otherwise x87 ops will block tailcall optimization
...
llvm-svn: 138859
2011-08-31 16:49:05 +00:00
6e31dfea35
Spelling and grammar fixes to problems found by Duncan.
...
llvm-svn: 138858
2011-08-31 16:43:33 +00:00
635d9692b6
Make sure we don't crash when -miphoneos-version-min is specified on x86. Hopefully this will fix gcc testsuite failures.
...
llvm-svn: 138856
2011-08-31 16:19:51 +00:00
72d1d5e193
Rework this conditional a bit.
...
Patch by Sanjoy Das
llvm-svn: 138853
2011-08-31 04:17:21 +00:00
93f3082118
lit: Normalize pathsep slashes also on %T.
...
On Python-w32 with mingw msys bash, %T was replaced to "x:\foo\bar...". msys bash cannot handle DOSish paths.
llvm-svn: 138852
2011-08-31 03:56:17 +00:00
9fc6b8be03
- Move all MOVSS and MOVSD patterns close to their definitions
...
- Duplicate some store patterns to their AVX forms!
- Catched a bug while restricting the patterns subtarget, fix it
and update a testcase to check it properly
llvm-svn: 138851
2011-08-31 03:04:20 +00:00
aa1daa63da
Remove unnecessary AVX checks
...
llvm-svn: 138850
2011-08-31 03:04:14 +00:00
db520db514
Teach more places to use VMOVAPS,VMOVUPS instead of MOVAPS,MOVUPS,
...
whenever AVX is enabled.
llvm-svn: 138849
2011-08-31 03:04:09 +00:00
cb1e5bae4c
Fix (movhps load) lowering / pattern to match more cases. rdar://10050549
...
llvm-svn: 138848
2011-08-31 02:05:24 +00:00
2c7bb52f56
Some minor cleanups for r138845.
...
llvm-svn: 138846
2011-08-31 00:41:05 +00:00
c3f9c4a852
Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next.
...
llvm-svn: 138845
2011-08-31 00:31:29 +00:00
50cabb5de4
Fix test typo.
...
llvm-svn: 138843
2011-08-31 00:02:59 +00:00
a45c20b049
Remove the old tail duplication pass. It is not used and is unable to update
...
ssa, so it has to be run really early in the pipeline. Any replacement
should probably use the SSAUpdater.
llvm-svn: 138841
2011-08-30 23:03:45 +00:00
2fa06a7226
Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing.
...
llvm-svn: 138840
2011-08-30 22:58:27 +00:00
fdf3cd7f2b
Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels.
...
llvm-svn: 138837
2011-08-30 22:15:17 +00:00
58298f028c
Teach macho-dump to dump the uleb128s referred to by linkedit_data segments.
...
llvm-svn: 138836
2011-08-30 22:10:58 +00:00
d16fb43b1f
Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead of labels.
...
llvm-svn: 138835
2011-08-30 22:10:03 +00:00
543c89fb15
Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping.
...
llvm-svn: 138834
2011-08-30 22:03:20 +00:00
1732c2ebf6
Clean up whitespace.
...
llvm-svn: 138833
2011-08-30 21:58:18 +00:00
6470e07e20
Fix off-by-one error Benjamin noticed.
...
llvm-svn: 138832
2011-08-30 21:23:24 +00:00
1450f61e8f
Add a triple.
...
llvm-svn: 138831
2011-08-30 21:19:37 +00:00
b359367a3d
Remove empty file.
...
llvm-svn: 138830
2011-08-30 21:17:20 +00:00
e316e5b2ad
Speculatively revert r138809 in an attempt to fix DragonEgg.
...
llvm-svn: 138829
2011-08-30 21:11:06 +00:00
7a9c3033a4
Enable compact unwind info by default. This only applies to Darwin when CFI is
...
disabled.
llvm-svn: 138826
2011-08-30 20:54:11 +00:00
065c35726f
Fix C++0x narrowing errors when char is unsigned.
...
In the case of EDInstInfo, this would actually cause a bug when -1 became 255
and was then compared >=0 in llvm-mc/Disassembler.cpp.
llvm-svn: 138825
2011-08-30 20:53:29 +00:00
f3458e5594
Preliminary documentation in docs/SegmentedStacks.html.
...
llvm-svn: 138823
2011-08-30 20:25:49 +00:00
2e282257ed
Port Thumb2 assembler tests over to disassembler tests.
...
llvm-svn: 138822
2011-08-30 20:03:11 +00:00
9f2edc8d2c
Some test code to check if correct code is being generated.
...
Patch by Sanjoy Das.
llvm-svn: 138820
2011-08-30 19:51:29 +00:00
e031097177
The code model of JIT should default to JITDefault.
...
llvm-svn: 138819
2011-08-30 19:50:33 +00:00
94d3253626
Adds support for variable sized allocas. For a variable sized alloca,
...
code is inserted to first check if the current stacklet has enough
space. If so, space is allocated by simply decrementing the stack
pointer. Otherwise a runtime routine (__morestack_allocate_stack_space
in libgcc) is called which allocates the required memory from the
heap.
Patch by Sanjoy Das.
llvm-svn: 138818
2011-08-30 19:47:04 +00:00
3353017668
Adds a SelectionDAG node X86SegAlloca which will be custom lowered
...
from DYNAMIC_STACKALLOC.
Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which
will match X86SegAlloca (based on word size) are also added. They
will be custom emitted to inject the actual stack handling code.
Patch by Sanjoy Das.
llvm-svn: 138814
2011-08-30 19:43:21 +00:00
c21742112b
Emit segmented-stack specific code into function prologues for
...
X86. Modify the pass added in the previous patch to call this new
code.
This new prologues generated will call a libgcc routine (__morestack)
to allocate more stack space from the heap when required
Patch by Sanjoy Das.
llvm-svn: 138812
2011-08-30 19:39:58 +00:00
ddc0f8779e
Command line option to enable support for segmented stacks:
...
-segmented-stacks.
Patch by Sanjoy Das!
llvm-svn: 138811
2011-08-30 19:29:02 +00:00
e6fba77971
Follow up to r138791.
...
Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.
llvm-svn: 138810
2011-08-30 19:09:48 +00:00
d708ec4c6a
When walking backwards to eliminate final stores to allocas at the end of a function, encountering an unrelated store should not cause us to give up like encountering a load does.
...
llvm-svn: 138809
2011-08-30 18:51:55 +00:00
267a6d92fa
Teach macho-dump how to dump linkedit_data load commands.
...
llvm-svn: 138807
2011-08-30 18:33:37 +00:00
a338996629
Add load commands from Lion to Macho.h.
...
llvm-svn: 138806
2011-08-30 18:33:34 +00:00
e8f2009f27
Update docs: Bugpoint understands -O[123]
...
Eli added this in revision 132695.
llvm-svn: 138805
2011-08-30 18:26:11 +00:00
d74c19449e
Lit option for ignoring stderr output.
...
This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!
llvm-svn: 138804
2011-08-30 17:42:33 +00:00
71038e7021
Set CR1EQ only when lowering vararg floating arguments (not any vararg
...
arguments as before), unset CR1EQ otherwise.
llvm-svn: 138802
2011-08-30 17:04:16 +00:00
87cec4d172
Fix typos in SPUMCTargetDesc.h
...
Patch supplied by Liu (projlc@gmail.com )
llvm-svn: 138799
2011-08-30 07:27:02 +00:00
02ad655446
Fix typo in BlackfinFrameLowering.h
...
Patch supplied by Liu (projlc@gmail.com )
llvm-svn: 138798
2011-08-30 07:26:11 +00:00
9668f2d775
Fix typo in MSP430MCTargetDesc.h.
...
Patch supplied by Liu (projlc@gmail.com )
llvm-svn: 138797
2011-08-30 07:24:47 +00:00
8c54533f99
Fix typo in MipsMCTargetDesc.h; Patch supplied by Liu (proljc@gmail.com)
...
llvm-svn: 138796
2011-08-30 07:23:29 +00:00
4f2fba1108
Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807.
...
llvm-svn: 138795
2011-08-30 07:09:35 +00:00
358a5f6a72
Do not try to rematerialize a value from a partial definition.
...
I don't currently have a good testcase for this; will try to get one
tomorrow. <rdar://problem/10032939>
llvm-svn: 138794
2011-08-30 05:36:02 +00:00
e891654a58
Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical
...
register dependency (rather than glue them together). This is general
goodness as it gives scheduler more freedom. However it is motivated by
a nasty bug in isel.
When a i64 sub is expanded to subc + sube.
libcall #1
\
\ subc
\ / \
\ / \
\ / libcall #2
sube
If the libcalls are not serialized (i.e. both have chains which are dag
entry), legalizer can serialize them in arbitrary orders. If it's
unlucky, it can force libcall #2 before libcall #1 in the above case.
subc
|
libcall #2
|
libcall #1
|
sube
However since subc and sube are "glued" together, this ends up being a
cycle when the scheduler combine subc and sube as a single scheduling
unit.
The right solution is to fix LegalizeType too chains the libcalls together.
However, LegalizeType is not processing nodes in order so that's harder than
it should be. For now, the move to physical register dependency will do.
rdar://10019576
llvm-svn: 138791
2011-08-30 01:34:54 +00:00
6e59d5c916
Revert 138781. It's not playing nicely with the immediate forms for ADC.
...
llvm-svn: 138782
2011-08-29 23:24:15 +00:00
19a75f075d
Thumb2 assembler aliases for ADC/SBC w/o the .w suffix.
...
llvm-svn: 138781
2011-08-29 23:20:54 +00:00
3e0aa03fe9
Add missing encoding information for some of the GPR<->FP register moves.
...
llvm-svn: 138780
2011-08-29 23:15:25 +00:00
4b23a65582
Remove redundant tests from XFAIL'ed test file.
...
llvm-svn: 138779
2011-08-29 23:04:04 +00:00
55d6f43cab
Thumb2 assembly parsing and encoding support for ADC(immediate).
...
llvm-svn: 138778
2011-08-29 23:01:38 +00:00
89a12be8bb
Remove test file. Superceded by other more exhaustive tests.
...
llvm-svn: 138777
2011-08-29 23:00:19 +00:00
ed16ec4248
Thumb2 parsing and encoding for IT blocks.
...
llvm-svn: 138773
2011-08-29 22:24:09 +00:00
7e2489a7c9
Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217
...
llvm-svn: 138771
2011-08-29 22:06:28 +00:00
850b9a9a84
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802.
...
llvm-svn: 138768
2011-08-29 21:15:46 +00:00
5ea100a4ce
Tidy up. Whitespace.
...
llvm-svn: 138767
2011-08-29 21:15:20 +00:00
243274c789
Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite.
...
llvm-svn: 138766
2011-08-29 21:14:19 +00:00
7113f221e2
Fix grammar, noticed by Duncan.
...
llvm-svn: 138764
2011-08-29 21:03:12 +00:00
Andrew Trick