Commit Graph

367 Commits

Author SHA1 Message Date
Daniil Fukalov 1b14a3ad3d [AMDGPU] fixes for lds f32 builtins
1. added restrictions to memory scope, order and volatile parameters
2. added custom processing for these builtins - currently is not used code,
   needed to switch off GCCBuiltin link to the builtins (ongoing change to llvm
   tree)
3. builtins renamed as requested

Differential Revision: https://reviews.llvm.org/D43281

llvm-svn: 332848
2018-05-21 16:18:07 +00:00
Sanjay Patel cda77b30e5 [OpenCL] make test independent of optimizer
There shouldn't be any tests that run the entire optimizer here,
but the last test in this file is definitely going to break with 
a change in LLVM IR canonicalization. Change that part to check
the unoptimized IR because that's the real intent of this file.

llvm-svn: 332473
2018-05-16 14:38:07 +00:00
Yaxun Liu 3cab24aa4f [OpenCL] Fix typos in emitted enqueue kernel function names
Two typos: 
vaarg => vararg
get_kernel_preferred_work_group_multiple => get_kernel_preferred_work_group_size_multiple

Differential Revision: https://reviews.llvm.org/D46601

llvm-svn: 331895
2018-05-09 17:07:06 +00:00
Anastasia Stulova 59055b94af [OpenCL] Add constant address space to __func__ in AST.
Added string literal helper function to obtain the type
attributed by a constant address space.

Also fixed predefind __func__ expr to use the helper
to constract the string literal correctly.

Differential Revision: https://reviews.llvm.org/D46049

llvm-svn: 331877
2018-05-09 13:23:26 +00:00
Erich Keane 14c1085317 Add Microsoft Mangling for OpenCL Half Type
Half-type mangling is accomplished following the method introduced by Erich 
Keane for mangling _Float16. Updated the half.cl LIT test to cover this 
particular case.

Patch By: vbridgers

Differential Revision: https://reviews.llvm.org/D46131

llvm-svn: 331263
2018-05-01 14:16:15 +00:00
Matt Arsenault d2da3c20d7 AMDGPU: Add Vega12 and Vega20
Changes by
  Matt Arsenault
  Konstantin Zhuravlyov

llvm-svn: 331216
2018-04-30 19:08:27 +00:00
Sven van Haastregt 4700faa28e [OpenCL] Add separate read_only and write_only pipe IR types
SPIR-V encodes the read_only and write_only access qualifiers of pipes,
so separate LLVM IR types are required to target SPIR-V.  Other backends
may also find this useful.

These new types are `opencl.pipe_ro_t` and `opencl.pipe_wo_t`, which
replace `opencl.pipe_t`.

This replaces __get_pipe_num_packets(...) and __get_pipe_max_packets(...)
which took a read_only pipe with separate versions for read_only and
write_only pipes, namely:

 * __get_pipe_num_packets_ro(...)
 * __get_pipe_num_packets_wo(...)
 * __get_pipe_max_packets_ro(...)
 * __get_pipe_max_packets_wo(...)

These separate versions exist to avoid needing a bitcast to one of the
two qualified pipe types.

Patch by Stuart Brady.

Differential Revision: https://reviews.llvm.org/D46015

llvm-svn: 331026
2018-04-27 10:37:04 +00:00
Hans Wennborg a417362c28 Fix some tests that were failing on Windows
llvm-svn: 330441
2018-04-20 15:33:44 +00:00
Alexey Sotkin 3858e26f22 [OpenCL] Add 'denorms-are-zero' function attribute
Summary:
Generate attribute 'denorms-are-zero'='true' if '-cl-denorms-are-zero'
compile option was specified and 'denorms-are-zero'='false' otherwise.

Patch by krisb

Reviewers: Anastasia, yaxunl

Reviewed By:  yaxunl 

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45808

llvm-svn: 330404
2018-04-20 08:08:04 +00:00
Alexander Kornienko 2a8c18d991 Fix typos in clang
Found via codespell -q 3 -I ../clang-whitelist.txt
Where whitelist consists of:

  archtype
  cas
  classs
  checkk
  compres
  definit
  frome
  iff
  inteval
  ith
  lod
  methode
  nd
  optin
  ot
  pres
  statics
  te
  thru

Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few
files that have dubious fixes reverted.)

Differential revision: https://reviews.llvm.org/D44188

llvm-svn: 329399
2018-04-06 15:14:32 +00:00
Matt Arsenault b130ea5605 AMDGPU: Update datalayout for stack alignment
llvm-svn: 328657
2018-03-27 19:26:51 +00:00
Yaxun Liu ac1263cd54 [AMDGPU] Fix codegen for inline assembly
Need to override convertConstraint to recognise amdgpu specific register names.

Differential Revision: https://reviews.llvm.org/D44533

llvm-svn: 328359
2018-03-23 19:43:42 +00:00
Tony Tye 68e11a6eca [AMDGPU] Update OpenCL to use 48 bytes of implicit arguments for AMDGPU (CLANG)
Add two additional implicit arguments for OpenCL for the AMDGPU target using the AMDHSA runtime to support device enqueue.

Differential Revision: https://reviews.llvm.org/D44696

llvm-svn: 328350
2018-03-23 18:51:45 +00:00
Tony Tye 1a3f3a2d14 [AMDGPU] Remove use of OpenCL triple environment and replace with function attribute for AMDGPU (CLANG)
- Remove use of the opencl and amdopencl environment member of the target triple for the AMDGPU target.
- Use a function attribute to communicate to the AMDGPU backend.

Differential Revision: https://reviews.llvm.org/D43735

llvm-svn: 328347
2018-03-23 18:43:15 +00:00
Yaxun Liu 5b330e8d61 Recommit r326946 after reducing CallArgList memory footprint
llvm-svn: 327634
2018-03-15 15:25:19 +00:00
Richard Smith 007cb6df58 Revert r326946. It caused stack overflows by significantly increasing the size of a CallArgList.
llvm-svn: 327195
2018-03-10 01:47:22 +00:00
Yaxun Liu 06dd81149f CodeGen: Fix address space of indirect function argument
The indirect function argument is in alloca address space in LLVM IR. However,
during Clang codegen for C++, the address space of indirect function argument
should match its address space in the source code, i.e., default addr space, even
for indirect argument. This is because destructor of the indirect argument may
be called in the caller function, and address of the indirect argument may be
taken, in either case the indirect function argument is expected to be in default
addr space, not the alloca address space.

Therefore, the indirect function argument should be mapped to the temp var
casted to default address space. The caller will cast it to alloca addr space
when passing it to the callee. In the callee, the argument is also casted to the
default address space and used.

CallArg is refactored to facilitate this fix.

Differential Revision: https://reviews.llvm.org/D34367

llvm-svn: 326946
2018-03-07 21:45:40 +00:00
Yaxun Liu cb35e9fa94 [OpenCL] Remove block invoke function from emitted block literal struct
OpenCL runtime tracks the invoke function emitted for
any block expression. Due to restrictions on blocks in
OpenCL (v2.0 s6.12.5), it is always possible to know the
block invoke function when emitting call of block expression
or __enqueue_kernel builtin functions. Since __enqueu_kernel
already has an argument for the invoke function, it is redundant
to have invoke function member in the llvm block literal structure.

This patch removes invoke function from the llvm block literal
structure. It also removes the bitcast of block invoke function
to the generic block literal type which is useless for OpenCL.

This will save some space for the kernel argument, and also
eliminate some store instructions.

Differential Revision: https://reviews.llvm.org/D43783

llvm-svn: 326937
2018-03-07 19:32:58 +00:00
Rafael Espindola 922f2aa9b2 Bring r325915 back.
The tests that failed on a windows host have been fixed.

Original message:

Start setting dso_local for COFF.

With this there are still some GVs where we don't set dso_local
because setGVProperties is never called. I intend to fix that in
followup commits. This is just the bare minimum to teach
shouldAssumeDSOLocal what it should do for COFF.

llvm-svn: 325940
2018-02-23 19:30:48 +00:00
Alexey Sotkin 20f65928e1 [OpenCL] Add '-cl-uniform-work-group-size' compile option
Summary:
OpenCL 2.0 specification defines '-cl-uniform-work-group-size' option,
which requires that the global work-size be a multiple of the work-group
size specified to clEnqueueNDRangeKernel and allows optimizations that
are made possible by this restriction.

The patch introduces the support of this option.

To keep information about whether an OpenCL kernel has uniform work
group size or not, clang generates 'uniform-work-group-size' function
attribute for every kernel:
- "uniform-work-group-size"="true" for OpenCL 1.2 and lower,
- "uniform-work-group-size"="true" for OpenCL 2.0 and higher if
 '-cl-uniform-work-group-size' option was specified,
- "uniform-work-group-size"="false" for OpenCL 2.0 and higher if no
 '-cl-uniform-work-group-size' options was specified.

If the function is not an OpenCL kernel, 'uniform-work-group-size'
attribute isn't generated.

Patch by: krisb

Reviewers: yaxunl, Anastasia, b-sumner

Reviewed By: yaxunl, Anastasia

Subscribers: nhaehnle, yaxunl, Anastasia, cfe-commits

Differential Revision: https://reviews.llvm.org/D43570

llvm-svn: 325771
2018-02-22 11:54:14 +00:00
Yaxun Liu f8ad59d99d Clean up AMDGCN tests
Differential Revision: https://reviews.llvm.org/D43340

llvm-svn: 325279
2018-02-15 19:12:41 +00:00
Yaxun Liu fa13d015a3 [OpenCL] Fix __enqueue_block for block with captures
The following test case causes issue with codegen of __enqueue_block

void (^block)(void) = ^{ callee(id, out); };

enqueue_kernel(queue, 0, ndrange, block);
Clang first does codegen for block expression in the first line and deletes its block info.
Clang then tries to do codegen for the same block expression again for the second line,
and fails because the block info is gone.

The fix is to do normal codegen for both lines. Introduce an API to OpenCL runtime to
record llvm block invoke function and llvm block literal emitted for each AST block
expression, and use the recorded information for generating the wrapper kernel.

The EmitBlockLiteral APIs are cleaned up to minimize changes to the normal codegen
of blocks.

Another minor issue is that some clean up AST expression is generated for block
with captures, which can be stripped by IgnoreImplicit.

Differential Revision: https://reviews.llvm.org/D43240

llvm-svn: 325264
2018-02-15 16:39:19 +00:00
Yaxun Liu 651bd73c02 [AMDGPU] Change constant addr space to 4
Differential Revision: https://reviews.llvm.org/D43171

llvm-svn: 325031
2018-02-13 18:01:21 +00:00
Matt Arsenault e7da136a74 AMDGPU: Update for datalayout change
llvm-svn: 324748
2018-02-09 16:58:41 +00:00
Matt Arsenault 935574a490 Fix crash on array initializer with non-0 alloca addrspace
llvm-svn: 324641
2018-02-08 19:37:09 +00:00
Daniil Fukalov da2a0558ea Recommit rL323890: [AMDGPU] Add ds_fadd, ds_fmin, ds_fmax builtins functions
Fixed asserts in tests.

llvm-svn: 324201
2018-02-04 22:32:07 +00:00
Yaxun Liu f5f45e5e63 [AMDGPU] Switch to the new addr space mapping by default
This requires corresponding llvm change.

Differential Revision: https://reviews.llvm.org/D40956

llvm-svn: 324102
2018-02-02 16:08:24 +00:00
Daniil Fukalov 07df4ffae7 Revert "[AMDGPU] Add ds_fadd, ds_fmin, ds_fmax builtins functions"
This reverts https://reviews.llvm.org/rL323890

This reverts commit 251524ebd8c346a936f0e74b09d609d49fbaae4a.

llvm-svn: 323896
2018-01-31 18:49:49 +00:00
Daniil Fukalov e72cde57d2 [AMDGPU] Add ds_fadd, ds_fmin, ds_fmax builtins functions
Reviewed by arsenm

Differential Revision: https://reviews.llvm.org/D42578

llvm-svn: 323890
2018-01-31 16:55:09 +00:00
Daniel Neilson 6e938effaa Change memcpy/memove/memset to have dest and source alignment attributes (Step 1).
Summary:
  Upstream LLVM is changing the the prototypes of the @llvm.memcpy/memmove/memset
intrinsics. This change updates the Clang tests for this change.

  The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument
which is required to be a constant integer. It represents the alignment of the
dest (and source), and so must be the minimum of the actual alignment of the
two.

 This change removes the alignment argument in favour of placing the alignment
attribute on the source and destination pointers of the memory intrinsic call.

 For example, code which used to read:
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false)
will now read
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false)

 At this time the source and destination alignments must be the same (Step 1).
Step 2 of the change, to be landed shortly, will relax that contraint and allow
the source and destination to have different alignments.

llvm-svn: 322964
2018-01-19 17:12:54 +00:00
Yaxun Liu c325d30d2c CodeGen: Fix invalid bitcasts for memcpy
CreateCoercedLoad/CreateCoercedStore assumes pointer argument of
memcpy is in addr space 0, which is not correct and causes invalid
bitcasts for triple amdgcn---amdgiz.

It is fixed by using alloca addr space instead.

Differential Revision: https://reviews.llvm.org/D40806

llvm-svn: 320000
2017-12-07 01:39:52 +00:00
Alexey Bader bed400957b [OpenCL] Fix code generation of function-scope constant samplers.
Summary:
Constant samplers are handled as static variables and clang's code generation
library, which leads to llvm::unreachable. We bypass emitting sampler variable
as static since it's translated to a function call later.

Reviewers: yaxunl, Anastasia

Reviewed By: yaxunl, Anastasia

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D34342

llvm-svn: 318290
2017-11-15 11:38:17 +00:00
Matt Arsenault a5888a730d OpenCL: Assume inline asm is convergent
Already done for CUDA.

llvm-svn: 318098
2017-11-13 22:40:55 +00:00
Yaxun Liu e45b3d5dad CodeGen: Fix missing debug loc due to alloca
Builder save/restores insertion pointer when emitting addr space cast
for alloca, but does not save/restore debug loc, which causes verifier
failure for certain call instructions.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D39069

llvm-svn: 316484
2017-10-24 19:14:43 +00:00
Yaxun Liu bd3823618d CodeGen: Fix invalid bitcast in partial initialization of automatic arrary variable
Differential Revision: https://reviews.llvm.org/D39184

llvm-svn: 316353
2017-10-23 17:49:26 +00:00
Yaxun Liu f2127d1728 [AMDGPU] Fix bug in enqueued block codegen due to an extra line
llvm-svn: 316165
2017-10-19 15:56:13 +00:00
Yaxun Liu 8ab5ab066a CodeGen: Fix invalid bitcasts for atomic builtins
Currently clang assumes the temporary variables emitted during
codegen of atomic builtins have address space 0, which
is not true for target triple amdgcn---amdgiz and causes invalid
bitcasts.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D38966

llvm-svn: 316000
2017-10-17 14:19:29 +00:00
Yaxun Liu c2a87a05f1 [OpenCL] Emit enqueued block as kernel
In OpenCL the kernel function and non-kernel function has different calling conventions.
For certain targets they have different argument ABIs. Also kernels have special function
attributes and metadata for runtime to launch them.

The blocks passed to enqueue_kernel is supposed to be executed as kernels. As such,
the block invoke function should be emitted as kernel with proper calling convention and
argument ABI.

This patch emits enqueued block as kernel. If a block is both called directly and passed
to enqueue_kernel, separate functions will be generated.

Differential Revision: https://reviews.llvm.org/D38134

llvm-svn: 315804
2017-10-14 12:23:50 +00:00
Yaxun Liu d029234fc6 Fix regression of test/CodeGenOpenCL/address-spaces.cl on ppc
llvm-svn: 315678
2017-10-13 13:53:06 +00:00
Yaxun Liu b7318e02c1 [OpenCL] Add LangAS::opencl_private to represent private address space in AST
Currently Clang uses default address space (0) to represent private address space for OpenCL
in AST. There are two issues with this:

Multiple address spaces including private address space cannot be diagnosed.
There is no mangling for default address space. For example, if private int* is emitted as
i32 addrspace(5)* in IR. It is supposed to be mangled as PUAS5i but it is mangled as
Pi instead.

This patch attempts to represent OpenCL private address space explicitly in AST. It adds
a new enum LangAS::opencl_private and adds it to the variable types which are implicitly
private:

automatic variables without address space qualifier

function parameter

pointee type without address space qualifier (OpenCL 1.2 and below)

Differential Revision: https://reviews.llvm.org/D35082

llvm-svn: 315668
2017-10-13 03:37:48 +00:00
Matt Arsenault f12e3b848a AMDGPU: Add read_exec_lo/hi builtins
llvm-svn: 315238
2017-10-09 20:06:37 +00:00
Matt Arsenault cbe0dd13d2 AMDGPU: Fix missing declaration for __builtin_amdgcn_dispatch_ptr
llvm-svn: 315219
2017-10-09 17:44:18 +00:00
Matt Arsenault a1cf61b6fc OpenCL: Assume functions are convergent
This was done for CUDA functions in r261779, and for the same
reason this also needs to be done for OpenCL. An arbitrary
function could have a barrier() call in it, which in turn
requires the calling function to be convergent.

llvm-svn: 315094
2017-10-06 19:34:40 +00:00
Yaxun Liu 10712d9203 [OpenCL] Clean up and add missing fields for block struct
Currently block is translated to a structure equivalent to

struct Block {
  void *isa;
  int flags;
  int reserved;
  void *invoke;
  void *descriptor;
};
Except invoke, which is the pointer to the block invoke function,
all other fields are useless for OpenCL, which clutter the IR and
also waste memory since the block struct is passed to the block
invoke function as argument.

On the other hand, the size and alignment of the block struct is
not stored in the struct, which causes difficulty to implement
__enqueue_kernel as library function, since the library function
needs to know the size and alignment of the argument which needs
to be passed to the kernel.

This patch removes the useless fields from the block struct and adds
size and align fields. The equivalent block struct will become

struct Block {
  int size;
  int align;
  generic void *invoke;
 /* custom fields */
};
It also changes the pointer to the invoke function to be
a generic pointer since the address space of a function
may not be private on certain targets.

Differential Revision: https://reviews.llvm.org/D37822

llvm-svn: 314932
2017-10-04 20:32:17 +00:00
Anastasia Stulova 89a947da72 [OpenCL] Fixed CL version in failing test.
llvm-svn: 314317
2017-09-27 17:03:35 +00:00
Anastasia Stulova 0a72ed40d3 [OpenCL] Handle address space conversion while setting type alignment.
Added missing addrspacecast case in alignment computation
logic of pointer type emission in IR generation.

Differential Revision: https://reviews.llvm.org/D37804

llvm-svn: 314304
2017-09-27 14:37:00 +00:00
Yaxun Liu 1f33d8eb19 Add more tests for OpenCL atomic builtin functions
Add tests for different address spaces and insert some blank lines to make them more readable.

Differential Revision: https://reviews.llvm.org/D37742

llvm-svn: 313172
2017-09-13 18:56:25 +00:00
Yaxun Liu e37793545e [AMDGPU] Change addr space of clk_event_t, queue_t and reserve_id_t to global
Differential Revision: https://reviews.llvm.org/D37703

llvm-svn: 313171
2017-09-13 18:50:42 +00:00
Jan Vesely 31ecb4bf60 [OpenCL] Add half load and store builtins
This enables load/stores of half type, without half being a legal type.

Differential Revision: https://reviews.llvm.org/D37231

llvm-svn: 312742
2017-09-07 19:39:10 +00:00
Yaxun Liu 29a5ee358e [OpenCL] Do not use vararg in emitted functions for enqueue_kernel
Not all targets support vararg (e.g. amdgpu). Instead of using vararg in the emitted functions for enqueue_kernel,
this patch creates a temporary array of size_t, stores the size arguments in the temporary array
and passes it to the emitted functions for enqueue_kernel.

Differential Revision: https://reviews.llvm.org/D36678

llvm-svn: 312441
2017-09-03 13:52:24 +00:00
Adrian Prantl 9e83fb0838 Adapt testcases to LLVM change r312144 in DIGlobalVariableExpression
llvm-svn: 312148
2017-08-30 18:22:23 +00:00
Reid Kleckner 6d353348e5 Parse and print DIExpressions inline to ease IR and MIR testing
Summary:
Most DIExpressions are empty or very simple. When they are complex, they
tend to be unique, so checking them inline is reasonable.

This also avoids the need for CodeGen passes to append to the
llvm.dbg.mir named md node.

See also PR22780, for making DIExpression not be an MDNode.

Reviewers: aprantl, dexonsmith, dblaikie

Subscribers: qcolombet, javed.absar, eraman, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D37075

llvm-svn: 311594
2017-08-23 20:31:27 +00:00
Yaxun Liu 504d4e2403 Attempt to fix failure in CodeGenOpenCL/atomic-ops.cl again
llvm-svn: 310937
2017-08-15 17:59:26 +00:00
Yaxun Liu adcfe5d881 Attempt to fix failure in CodeGenOpenCL/atomic-ops.cl
llvm-svn: 310932
2017-08-15 17:16:44 +00:00
Yaxun Liu 99d56d291f Remove -finclude-default-header in OpenCL atomic tests
Differential Revision: https://reviews.llvm.org/D36676

llvm-svn: 310927
2017-08-15 16:30:31 +00:00
Yaxun Liu 30d652a447 [OpenCL] Support variable memory scope in atomic builtins
Differential Revision: https://reviews.llvm.org/D36580

llvm-svn: 310924
2017-08-15 16:02:49 +00:00
Sven van Haastregt efb4d4c78c [OpenCL] Allow targets to select address space per type
Generalize getOpenCLImageAddrSpace into getOpenCLTypeAddrSpace, such
that targets can select the address space per type.

No functional changes intended.

Initial patch by Simon Perretta.

Differential Revision: https://reviews.llvm.org/D33989

llvm-svn: 310911
2017-08-15 09:38:18 +00:00
Matt Arsenault 3fe7395fbc AMDGPU: Use direct struct returns and arguments
This is an improvement over always using byval for
structs.

This will use registers until ~16 are used, and then
switch back to byval. This needs more work, since I'm
not sure it ever really makes sense to use byval. If
the register limit is exceeded, the arguments still
end up passed on the stack, but with a different ABI.
It also may make sense to base this on number of
registers used for non-struct arguments, rather than
just arguments that appear first in the argument list.

llvm-svn: 310527
2017-08-09 21:44:58 +00:00
Yaxun Liu 39195062c2 Add OpenCL 2.0 atomic builtin functions as Clang builtin
OpenCL 2.0 atomic builtin functions have a scope argument which is ideally
represented as synchronization scope argument in LLVM atomic instructions.

Clang supports translating Clang atomic builtin functions to LLVM atomic
instructions. However it currently does not support synchronization scope
of LLVM atomic instructions. Without this, users have to use LLVM assembly
code to implement OpenCL atomic builtin functions.

This patch adds OpenCL 2.0 atomic builtin functions as Clang builtin
functions, which supports generating LLVM atomic instructions with
synchronization scope operand.

Currently only constant memory scope argument is supported. Support of
non-constant memory scope argument will be added later.

Differential Revision: https://reviews.llvm.org/D28691

llvm-svn: 310082
2017-08-04 18:16:31 +00:00
Joey Gouly fa76b49cef [OpenCL] Add missing subgroup builtins
This adds get_kernel_max_sub_group_size_for_ndrange and
get_kernel_sub_group_count_for_ndrange.

llvm-svn: 309678
2017-08-01 13:27:09 +00:00
Joey Gouly 53160cdc45 [OpenCL] Enable subgroup extension in tests
This fixes the test, so that it can be run on different hosts that may have
different OpenCL extensions enabled.

llvm-svn: 309571
2017-07-31 15:50:27 +00:00
Joey Gouly 84ae3364df [OpenCL] Add extension Sema check for subgroup builtins
Check the subgroup extension is enabled, before doing other Sema checks.

llvm-svn: 309567
2017-07-31 15:15:59 +00:00
Alexey Sotkin 7d7f0dc08b [OpenCL] Fix access qualifiers metadata for kernel arguments with typedef
Subscribers: cfe-commits, yaxunl, Anastasia

Differential Revision: https://reviews.llvm.org/D35420

llvm-svn: 309155
2017-07-26 18:49:54 +00:00
Egor Churaev 53f9a30543 [OpenCL] Added extended tests on metadata generation for half data type and arrays.
Reviewers: Anastasia

Reviewed By: Anastasia

Subscribers: bader, cfe-commits, yaxunl

Differential Revision: https://reviews.llvm.org/D35000

llvm-svn: 308266
2017-07-18 06:04:01 +00:00
Yaxun Liu 25d1b4341f [AMDGPU] Fix size and alignment of size_t and pointer types
Differential Revision: https://reviews.llvm.org/D34995

llvm-svn: 307121
2017-07-05 04:58:24 +00:00
Yaxun Liu 3ba4a720ad [AMDGPU] Fix regressions on mesa/clover with libclc due to address space
Currently AMDGPUTargetInfo does not initialize AddrSpaceMap in constructor, which causes regressions in mesa/clover with libclc.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D34987

llvm-svn: 307105
2017-07-04 19:57:18 +00:00
Yaxun Liu e9e5c4f975 CodeGen: Fix invalid bitcast for coerced function argument
Clang assumes coerced function argument is in address space 0, which is not always true and results in invalid bitcasts.

This patch fixes failure in OpenCL conformance test api/get_kernel_arg_info with amdgcn---amdgizcl triple, where non-zero alloca address space is used.

Differential Revision: https://reviews.llvm.org/D34777

llvm-svn: 306721
2017-06-29 18:47:45 +00:00
Alexey Bader 364a11651e [OpenCL] Fix OpenCL and SPIR version metadata generation.
Summary: OpenCL and SPIR version metadata must be generated once per module instead of once per mangled global value.

Reviewers: Anastasia, yaxunl

Reviewed By: Anastasia

Subscribers: ahatanak, cfe-commits

Differential Revision: https://reviews.llvm.org/D34235

llvm-svn: 305796
2017-06-20 14:30:18 +00:00
Pekka Jaaskelainen 2eb0bcc9e6 [OpenCL] spir_kern by defaul: fix old test cases
llvm-svn: 304396
2017-06-01 08:19:43 +00:00
Pekka Jaaskelainen fc2629a65a [OpenCL] Makes kernels use the SPIR_KERNEL CC by default.
Rationale: OpenCL kernels are called via an explicit runtime API
with arguments set with clSetKernelArg(), not as normal sub-functions.
Return SPIR_KERNEL by default as the kernel calling convention to ensure
the fingerprint is fixed such way that each OpenCL argument gets one
matching argument in the produced kernel function argument list to enable
feasible implementation of clSetKernelArg() with aggregates etc. In case
we would use the default C calling conv here, clSetKernelArg() might
break depending on the target-specific conventions; different targets
might split structs passed as values to multiple function arguments etc.

https://reviews.llvm.org/D33639

llvm-svn: 304389
2017-06-01 07:18:49 +00:00
Javed Absar 0841d620c5 Fix issue with test that caused bildbot failure
These tests did not specify the target. 
The failure was triggered by change - 
https://reviews.llvm.org/D33205
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-full/builds/7314

which sets vector alignment to 8-byte for arm-targets (except for Android).
So, fixing the test to make it target specific. 

llvm-svn: 304210
2017-05-30 13:34:26 +00:00
Egor Churaev dd7d82c408 [OpenCL] Test on half immediate support.
Reviewers: Anastasia

Reviewed By: Anastasia

Subscribers: yaxunl, cfe-commits, bader

Differential Revision: https://reviews.llvm.org/D33592

llvm-svn: 304134
2017-05-29 07:44:22 +00:00
Mehdi Amini 6aa9e9b41a IRGen: Add optnone attribute on function during O0
Amongst other, this will help LTO to correctly handle/honor files
compiled with O0, helping debugging failures.
It also seems in line with how we handle other options, like how
-fnoinline adds the appropriate attribute as well.

Differential Revision: https://reviews.llvm.org/D28404

llvm-svn: 304127
2017-05-29 05:38:20 +00:00
Konstantin Zhuravlyov 1f144a18ff Resubmit r303861.
[AMDGPU] add __builtin_amdgcn_s_getpc

Patch by Tim Corringham

llvm-svn: 304033
2017-05-26 21:08:20 +00:00
Reid Kleckner 581a6c5d56 Revert "[AMDGPU] add __builtin_amdgcn_s_getpc"
This reverts commit r303861, the LLVM intrinsic was reverted.

llvm-svn: 303908
2017-05-25 20:28:26 +00:00
Tim Corringham 702fe45bcd [AMDGPU] add __builtin_amdgcn_s_getpc
Summary: Added the builtin corresponding to the s_getpc intrinsic added in llvm D32862

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D33276

llvm-svn: 303861
2017-05-25 14:16:11 +00:00
Yaxun Liu af3d4db64b [AMDGPU] Do not require opencl triple environment for OpenCL
A recent change requires opencl triple environment for compiling OpenCL
program, which causes regressions in libclc.

This patch fixes that. Instead of deducing language based on triple
environment, it checks LangOptions.

Differential Revision: https://reviews.llvm.org/D33445

llvm-svn: 303644
2017-05-23 16:15:53 +00:00
Yaxun Liu 6d96f16347 CodeGen: Cast alloca to expected address space
Alloca always returns a pointer in alloca address space, which may
be different from the type defined by the language. For example,
in C++ the auto variables are in the default address space. Therefore
cast alloca to the expected address space when necessary.

Differential Revision: https://reviews.llvm.org/D32248

llvm-svn: 303370
2017-05-18 18:51:09 +00:00
Yaxun Liu 4f33b3d396 [OpenCL] Emit function-scope variable in constant address space as static variable
Differential Revision: https://reviews.llvm.org/D32977

llvm-svn: 303072
2017-05-15 14:47:47 +00:00
Xiuli Pan be6da4bbdb [OpenCL] Add intel_reqd_sub_group_size attribute support
Summary:
Add intel_reqd_sub_group_size attribute support as intel extension  cl_intel_required_subgroup_size from
https://www.khronos.org/registry/OpenCL/extensions/intel/cl_intel_required_subgroup_size.txt

Reviewers: Anastasia, bader, hfinkel, pxli168

Reviewed By: Anastasia, bader, pxli168

Subscribers: cfe-commits, yaxunl

Differential Revision: https://reviews.llvm.org/D30805

llvm-svn: 302125
2017-05-04 07:31:20 +00:00
Adrian Prantl c3782a1a6f Debug Info: Remove special-casing of indirect function argument handling.
LLVM has changed the semantics of dbg.declare for describing function
arguments. After this patch a dbg.declare always takes the *address*
of a variable as the first argument, even if the argument is not an
alloca.

https://bugs.llvm.org/show_bug.cgi?id=32382
rdar://problem/31205000

llvm-svn: 300523
2017-04-18 01:22:01 +00:00
Yaxun Liu d7523283a7 CodeGen: Let byval parameter use alloca address space
Differential Revision: https://reviews.llvm.org/D32133

llvm-svn: 300487
2017-04-17 20:10:44 +00:00
Yaxun Liu 7f7f323e4f CodeGen: Let lifetime intrinsic use alloca address space
Differential Revision: https://reviews.llvm.org/D31717

llvm-svn: 300485
2017-04-17 20:03:11 +00:00
Konstantin Zhuravlyov e668b1cd1e [AMDGPU][GFX9] Set +fp32-denormals for >=gfx900 unless -cl-denorms-are-zero is set
Differential Revision: https://reviews.llvm.org/D31482

llvm-svn: 300306
2017-04-14 05:33:57 +00:00
Yaxun Liu b34ec829be [OpenCL] Map default address space to alloca address space
For OpenCL, the private address space qualifier is 0 in AST. Before this change, 0 address space qualifier
is always mapped to target address space 0. As now target private address space is specified by
alloca address space in data layout, address space qualifier 0 needs to be mapped to alloca addr space specified by the data layout.

This change has no impact on targets whose alloca addr space is 0.

With contributions from Matt Arsenault, Tony Tye and Wen-Heng (Jack) Chung

Differential Revision: https://reviews.llvm.org/D31404

llvm-svn: 299965
2017-04-11 17:24:23 +00:00
Yaxun Liu b122ed9181 [AMDGPU] Temporarily change constant address space from 4 to 2 for the new address space mapping
Change constant address space from 4 to 2 for the new address space mapping in Clang.

Differential Revision: https://reviews.llvm.org/D31771

llvm-svn: 299691
2017-04-06 19:18:36 +00:00
Stanislav Mekhanoshin 921a42314b [AMDGPU] Translate reqd_work_group_size into amdgpu_flat_work_group_size
These two attributes specify the same info in a different way.
AMGPU BE only checks the latter as a target specific attribute
as opposed to language specific reqd_work_group_size.

This change produces amdgpu_flat_work_group_size out of
reqd_work_group_size if specified.

Differential Revision: https://reviews.llvm.org/D31728

llvm-svn: 299678
2017-04-06 18:15:44 +00:00
Egor Churaev a8d2451533 [OpenCL] Enables passing sampler initializer to function argument
Reviewers: Anastasia, cfe-commits

Reviewed By: Anastasia

Subscribers: yaxunl, bader

Differential Revision: https://reviews.llvm.org/D31594

llvm-svn: 299524
2017-04-05 09:02:56 +00:00
Jin-Gu Kang e7cdcdea73 Preserve vec3 type.
Summary: Preserve vec3 type with CodeGen option.

Reviewers: Anastasia, bruno

Reviewed By: Anastasia

Subscribers: bruno, ahatanak, cfe-commits

Differential Revision: https://reviews.llvm.org/D30810

llvm-svn: 299445
2017-04-04 16:40:25 +00:00
Egor Churaev ba8b84d7fb [OpenCL] Do not generate "kernel_arg_type_qual" metadata for non-pointer args
Summary:
"kernel_arg_type_qual" metadata should contain const/volatile/restrict
tags only for pointer types to match the corresponding requirement of
the OpenCL specification.

OpenCL 2.0 spec 5.9.3 Kernel Object Queries:

CL_KERNEL_ARG_TYPE_VOLATILE is returned if the argument is a pointer
and the referenced type is declared with the volatile qualifier.
[...]
Similarly, CL_KERNEL_ARG_TYPE_CONST is returned if the argument is a
pointer and the referenced type is declared with the restrict or const
qualifier.
[...]
CL_KERNEL_ARG_TYPE_RESTRICT will be returned if the pointer type is
marked restrict.

Reviewers: Anastasia, cfe-commits

Reviewed By: Anastasia

Subscribers: bader, yaxunl

Differential Revision: https://reviews.llvm.org/D31321

llvm-svn: 299192
2017-03-31 10:14:52 +00:00
Egor Churaev 45c26ee0bf [OpenCL] Extended mapping of parcing CodeGen arguments
Summary: Enable cl_mad_enamle and cl_no_signed_zeros options when user turns on cl_unsafe_math_optimizations or cl_fast_relaxed_math options.

Reviewers: Anastasia, cfe-commits

Reviewed By: Anastasia

Subscribers: bader, yaxunl

Differential Revision: https://reviews.llvm.org/D31324

llvm-svn: 298838
2017-03-27 10:38:01 +00:00
Yaxun Liu 3464f92e23 [AMDGPU] Switch address space mapping by triple environment amdgiz
For target environment amdgiz and amdgizcl (giz means Generic Is Zero), AMDGPU will use new address space mapping where generic address space is 0 and private address space is 5. The data layout is also changed correspondingly.

Differential Revision: https://reviews.llvm.org/D31210

llvm-svn: 298767
2017-03-25 03:46:25 +00:00
Konstantin Zhuravlyov 9c1e310c16 Fix array sizes where address space is not yet known
For variables in generic address spaces, for example:

```
unsigned char V[6442450944];
...
```

the address space is not yet known when we get into
*getConstantArrayType*, it is 0. AMDGCN target's
address space 0 has 32 bits pointers, so when we
call *getPointerWidth* with 0, the array size is
trimmed to 32 bits, which is not right.

Differential Revision: https://reviews.llvm.org/D30845

llvm-svn: 298420
2017-03-21 18:55:39 +00:00
Egor Churaev c217f37cb6 [OpenCL] Added implicit conversion rank for overloading functions with vector data type in OpenCL
Summary: I added a new rank to ImplicitConversionRank enum to resolve the function overload ambiguity with vector types. Rank of scalar types conversion is lower than vector splat. So, we can choose which function should we call. See test for more details.

Reviewers: Anastasia, cfe-commits

Reviewed By: Anastasia

Subscribers: bader, yaxunl

Differential Revision: https://reviews.llvm.org/D30816

llvm-svn: 298366
2017-03-21 12:55:55 +00:00
Matt Arsenault bf5e3e4391 AMDGPU: Make 0 the private nullptr value
We can't actually pretend that 0 is valid for address space 0.
r295877 added a workaround to stop allocating user objects
there, so we can use 0 as the invalid pointer.

Some of the tests seemed to be using private as the non-0 null
test address space, so add copies using local to make sure
this is still stressed.

llvm-svn: 297659
2017-03-13 19:47:53 +00:00
Yaxun Liu 4d86799219 [AMDGPU] Add builtin functions readlane ds_permute mov_dpp
Differential Revision: https://reviews.llvm.org/D30551

llvm-svn: 297436
2017-03-10 01:30:46 +00:00
Konstantin Zhuravlyov 2b4917fcc9 [DebugInfo] Append extended dereferencing mechanism to variables' DIExpression for targets that support more than one address space
Differential Revision: https://reviews.llvm.org/D29673

llvm-svn: 297397
2017-03-09 18:06:23 +00:00
Konstantin Zhuravlyov d1ba16e762 [DebugInfo] Add address space when creating DIDerivedTypes
Differential Revision: https://reviews.llvm.org/D29671

llvm-svn: 297321
2017-03-08 23:56:48 +00:00
Jan Vesely 9488560bb8 AMDGPU: export s_sendmsg{halt} instrinsics
Differential Revision: https://reviews.llvm.org/D30366

llvm-svn: 296241
2017-02-25 04:20:24 +00:00
Jan Vesely c255097517 AMDGPU: export l1 cache invalidation intrinsics
Differential Revision: https://reviews.llvm.org/D30360

llvm-svn: 296240
2017-02-25 04:20:22 +00:00