Commit Graph

392800 Commits

Author SHA1 Message Date
Caroline Concatto a2c5c56055 [AArch64][CostModel] Add cost model for experimental.vector.splice
This patch adds a new  ShuffleKind SK_Splice and then handle the cost in
getShuffleCost, as in experimental.vector.reverse.

Differential Revision: https://reviews.llvm.org/D104630
2021-07-05 14:30:24 +01:00
Wang, Pengfei 9ab99f773f [X86] Twist shuffle mask when fold HOP(SHUFFLE(X,Y),SHUFFLE(X,Y)) -> SHUFFLE(HOP(X,Y))
This patch fixes PR50823.

The shuffle mask should be twisted twice before gotten the correct one due to the difference between inner HOP and outer.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D104903
2021-07-05 21:29:42 +08:00
Louis Dionne 681aa574c0 [libc++] NFC: Sort headers in CMakeLists.txt 2021-07-05 09:25:15 -04:00
Simon Pilgrim 5db826e4ce [CostModel][X86] Handle costs for insert/extractelement with non-immediate indices via stack
Determine the insert/extractelement costs when performing this as a sequence of aliased loads+stores via the stack.
2021-07-05 13:26:53 +01:00
Simon Pilgrim 65e4240fa1 [CostModel][X86] Adjust i32/i64 to f32/f64 scalar based on llvm-mca reports (+ Agner).
Older SSE targets have slower gpr->fpu scalar conversions - we also need to account for uitofp i32 > f32/f64 being lowered as sitofp i64 -> f32/f64
2021-07-05 13:26:53 +01:00
Sanjay Patel 3d3c0ed932 [InstSimplify] fold extractelement of splat with variable extract index
We already have a fold for variable index with constant vector,
but if we can determine a scalar splat value, then it does not
matter whether that value is constant or not.

We overlooked this fold in D102404 and earlier patches,
but the fixed vector variant is shown in:
https://llvm.org/PR50817

Alive2 agrees on that:
https://alive2.llvm.org/ce/z/HpijPC

The same logic applies to scalable vectors.

Differential Revision: https://reviews.llvm.org/D104867
2021-07-05 08:19:40 -04:00
Kirill Bobyrev de8274a1b9
[clangd] NFC: Remove outdated comment 2021-07-05 13:58:54 +02:00
Caroline Concatto b868a2d2c6 [SLPVectorizer] Fix crash in vectorizeChainsInBlock for scalable vector.
The function vectorizeChainsInBlock does not support scalable vector,
because function like canReuseExtract and isCommutative in the code
path assert with scalable vectors.

This patch avoids vectorizing blocks that have extract instructions with scalable
vector..

Differential Revision: https://reviews.llvm.org/D104809
2021-07-05 12:43:41 +01:00
Ole Strohm 85255a04e5 [C++][Sema] Ignore top-level qualifiers in casts
Ignore top-level qualifiers in casts, which fixes issues in reinterpret_cast.

This rule comes from [expr.type]/8.2.2 which explains that casting to a
pr-qualified type should actually cast to the unqualified type. In C++
this is only done for types that aren't classes or arrays.

Fixes: PR49221

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D102689
2021-07-05 12:22:08 +01:00
Bradley Smith cc273983f7 [AArch64][SVE] Improve fixed length codegen for common vector shuffle case
Improve codegen when lowering the common vector shuffle case from the
vectorizer (op1[last]:op2[0:last-1]). This patch only handles this
common case as it is difficult to handle this more generally when using
fixed length vectors, due to being unable to use the SVE ext instruction.

Differential Revision: https://reviews.llvm.org/D105289
2021-07-05 12:09:27 +01:00
David Stuttard 83cb9632a1 [DAGCombiner] Add support for mulhi const folding in DAGCombiner
Differential Revision: https://reviews.llvm.org/D103323

Change-Id: I4ffaaa32301795ba8a339567a68e77fe0862b869
2021-07-05 12:01:26 +01:00
Adrian Kuegel bf17ee1950 Add MulOp lowering from Complex dialect to Standard/Math dialect.
The lowering handles special cases with NaN or infinity like C++.

Differential Revision: https://reviews.llvm.org/D105270
2021-07-05 12:51:51 +02:00
David Stuttard 4b125b23ba [DAGCombiner] Pre-commit test to demonstrate mulhi const folding
D103323 will fold this

Differential Revision: https://reviews.llvm.org/D105424

Change-Id: I64947215eb531fbd70b52a72203b39e43fefafcc
2021-07-05 11:34:38 +01:00
Sjoerd Meijer ee752134ac [AArch64] Cost-model i8 vector loads/stores
Loads of <4 x i8> vectors were modeled as extremely expensive. And while we
don't have a load instruction that supports this, it isn't that expensive to
create a vector of i8 elements. The codegen for this was fixed/optimised in
D105110. This now tweaks the cost model and enables SLP vectorisation of my
motivating case loadi8.ll.

Differential Revision: https://reviews.llvm.org/D103629
2021-07-05 11:25:10 +01:00
Markus Böck a96911c49b [mlir] Escape strings of opaque attributes
Opaque attributes that currently contain string literals can't currently be properly roundtripped as they are not printed as escaped strings. This leads to incorrect tokens being generated and the parser to almost certainly fail. This patch simply uses llvm::printEscapedString from LLVM. It escapes all non printable characters and quotes to \xx hex literals, and backslashes to two backslashes. This syntax is supported by MLIRs Lexer as well. The same function is also currently in use for the same purpose in printSymbolReference, printAttribute for StringAttr and many more in AsmPrinter.cpp.

Differential Revision: https://reviews.llvm.org/D105405
2021-07-05 12:13:36 +02:00
Stephen Tozer 14b62f7e2f [DebugInfo] CGP+HWasan: Handle dbg.values with duplicate location ops
This patch fixes an issue which occurred in CodeGenPrepare and
HWAddressSanitizer, which both at some point create a map of Old->New
instructions and update dbg.value uses of these. They did this by
iterating over the dbg.value's location operands, and if an instance of
the old instruction was found, replaceVariableLocationOp would be
called on that dbg.value. This would cause an error if the same operand
appeared multiple times as a location operand, as the first call to
replaceVariableLocationOp would update all uses of the old instruction,
invalidating the old iterator and eventually hitting an assertion.

This has been fixed by no longer iterating over the dbg.value's location
operands directly, but by first collecting them into a set and then
iterating over that, ensuring that we never attempt to replace a
duplicated operand multiple times.

Differential Revision: https://reviews.llvm.org/D105129
2021-07-05 10:35:19 +01:00
David Stuttard b8173c3178 [AMDGPU] Stop mulhi from doing 24 bit mul for uniform values
Added support to check if architecture supports s_mulhi which is used as part of
the decision whether or not to use valu 24 bit mul (if the mulhi gets
transformed to a valu op anyway, then may as well use it).

This is an extension of the work in D97063

Differential Revision: https://reviews.llvm.org/D103321

Change-Id: I80b1323de640a52623d69ac005a97d06a5d42a14
2021-07-05 10:33:23 +01:00
Georgy Komarov 3697f26836
[docs] Fix linking issues in LibASTMatchers tutorial
Update CMakeLists.txt in the tutorial to reflect the latest changes in
LLVM. The demo project cannot be linked without added libraries.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D105409
2021-07-05 12:11:25 +03:00
Jez Ng 4aaf878750 [lld-macho][nfc] Add REQUIRES: x86 to test
I didn't realize that llvm-objdump's features were arch-specific.

This should fix the non-x86 buildbots.
2021-07-05 03:40:54 -04:00
Adrian Kuegel 380fa71fb0 [mlir] Add LogOp lowering from Complex dialect to Standard/Math dialect.
Differential Revision: https://reviews.llvm.org/D105342
2021-07-05 09:33:45 +02:00
Craig Topper 21a1bcbd4d [RISCV] Pass FeatureBitset by reference rather than by value. NFCI
FeatureBitset is 4 64-bit values in an array. It's better passed by
reference rather than copying it.

I may be adding FeatureBitset as an argument to another function
and noticed this while working on that.
2021-07-04 23:11:40 -07:00
Jez Ng bcaf57cae8 [lld-macho] Parse relocations quickly by assuming sorted order
clang and gcc both seem to emit relocations in reverse order of
address. That means we can match relocations to their containing
subsections in `O(relocs + subsections)` rather than the `O(relocs *
log(subsections))` that our previous binary search implementation
required.

Unfortunately, `ld -r` can still emit unsorted relocations, so we have a
fallback code path for that (less common) case.

Numbers for linking chromium_framework on my 3.2 GHz 16-Core Intel Xeon W:

      N           Min           Max        Median           Avg        Stddev
  x  20          4.04          4.11         4.075        4.0775   0.018027756
  +  20          3.95          4.02          3.98         3.985   0.020900768
  Difference at 95.0% confidence
          -0.0925 +/- 0.0124919
          -2.26855% +/- 0.306361%
          (Student's t, pooled s = 0.0195172)

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D105410
2021-07-05 01:13:44 -04:00
Esme-Yi 0dad3f6ee2 [llvm-readobj][XCOFF] Add support for printing the String Table.
Summary: The patch adds the StringTable dumping to
llvm-readobj. Currently only XCOFF is supported.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D104613
2021-07-05 04:16:58 +00:00
Chen Zheng 26d72bd93a [XCOFF][NFC] add DWARF section support in XCOFF object writer
Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D97049
2021-07-05 03:13:29 +00:00
Chia-hung Duan 1a001dede8 [mlir-reduce] Improve diagnostic message and clean build dependency
Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D104443
2021-07-05 10:15:35 +08:00
Chia-hung Duan db9df434fa [mlir-tblgen] Avoid ODS verifier duplication
Different constraints may share the same predicate, in this case, we
will generate duplicate ODS verification function.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D104369
2021-07-05 10:09:41 +08:00
Nathan Ridge a15adbcddd [clangd] Type hints for structured bindings
Hints are shown for the individual bindings, not the aggregate.

Differential Revision: https://reviews.llvm.org/D104617
2021-07-04 21:53:36 -04:00
Xiang1 Zhang a39bb960fc [X86] Refine code of generating BB labels in Keylocker
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D105336
2021-07-05 09:29:51 +08:00
Matthias Springer 2c115ecc41 [mlir][NFC] MemRef cleanup: Remove helper functions
Remove `getDynOperands` and `createOrFoldDimOp` from MemRef.h to decouple MemRef a bit from Tensor. These two functions are used in other dialects/transforms.

Differential Revision: https://reviews.llvm.org/D105260
2021-07-05 10:10:21 +09:00
Nico Weber 9e24979d73 [lld/mac] Fix function offset on 1st-level unwind table sentinel
Two bugs:
1. This tries to take the address of the last symbol plus the length
   of the last symbol. However, the sorted vector is cuPtrVector,
   not cuVector. Also, cuPtrVector has tombstone values removed
   and cuVector doesn't. If there was a stripped value at the end,
   the "last" element's value was UINT64_MAX, which meant the
   sentinel value was one less than the length of that "last"
   dead symbol.

2. We have to subtract in.header->addr. For 64-bit binaries that's
   (1 << 32) and functionAddress is 32-bit so this is a no-op, but
   for 32-bit binaries the sentinel's value was too large.

I believe this has no effect in practice since the first-level
binary search code in libunwind (in UnwindCursor.hpp) does:

    uint32_t low = 0;
    uint32_t high = sectionHeader.indexCount();
    uint32_t last = high - 1;
    while (low < high) {
      uint32_t mid = (low + high) / 2;
        if ((mid == last) ||
            (topIndex.functionOffset(mid + 1) > targetFunctionOffset)) {
          low = mid;
          break;
        } else {
        low = mid + 1;
      }

So the address of the last entry in the first-level table isn't really
checked -- except for the very end, but the check against `last` means
we just run the loop once more than necessary. But it makes `unwinddump` output
look less confusing, and it's what it looks was the intention here.

(No test since I can't think of a way to make FileCheck check that one
number is larger than another.)

Differential Revision: https://reviews.llvm.org/D105404
2021-07-04 18:06:20 -04:00
Nico Weber d2d6da3011 [lld/mac] Don't crash on 32-bit output binaries when dead-stripping
Fixes PR50974.

Differential Revision: https://reviews.llvm.org/D105399
2021-07-04 18:03:31 -04:00
Nico Weber 7cdd768ac9 [libunwind] reflow some debug logs for better greppability
"bad second level page" and "second level compressed unwind table"
can now be grepped for.

(Also remove one of the two spaces between "second" and "level"
in the second message.)
2021-07-04 17:52:23 -04:00
patacca 3f9bf9f42a [Polly][Isl] Update isl to isl-0.24-47-g8853f375
This is needed for the new functions exposed in the C++ interface as used in https://reviews.llvm.org/D104994

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D105132
2021-07-04 19:50:39 +02:00
Markus Böck 14078ae8ca [mlir][OpAsmParser] Add parseString method
Basically every kind of parseOptional* method in DialectAsmParser has a corresponding parse* method which will emit an error if the requested token has not been found. An odd one out of this rule is parseOptionalString which does not have a corresponding parseString method.

This patch adds that method and implements it in basically the same fashion as parseKeyword, by first going through parseOptionalString and emitting an error on failure.

Differential Revision: https://reviews.llvm.org/D105406
2021-07-04 17:12:22 +02:00
Nikita Popov a213f735d8 [IR] Deprecate GetElementPtrInst::CreateInBounds without element type
This API is not compatible with opaque pointers, the method
accepting an explicit pointer element type should be used instead.

Thankfully there were few in-tree users. The BPF case still ends
up using the pointer element type for now and needs something like
D105407 to avoid doing so.
2021-07-04 16:49:30 +02:00
Paul Walker 287d39dd5a [NFC] Fix a few whitespace issues and typos. 2021-07-04 11:49:58 +01:00
Nikita Popov fabc17192e [IRBuilder] Add type argument to CreateMaskedLoad/Gather
Same as other CreateLoad-style APIs, these need an explicit type
argument to support opaque pointers.

Differential Revision: https://reviews.llvm.org/D105395
2021-07-04 12:17:59 +02:00
Christopher Di Bella 95923c0ba2 [llvm][iwyu] explicitly includes <functional> and <utility>
Compiling LLVM with Clang modules and libc++ identified that
`Support/Printable.h` and `ADL/SmallVector.h` were using features that
live in these headers.

Differential Revision: https://reviews.llvm.org/D105402
2021-07-04 06:02:11 +00:00
Christopher Di Bella 478092d331 [clangd][iwyu] explicitly includes `<atomic>`
Compiling clangd with Clang modules and libc++ revealed that
`support/Threading.h` uses `std::atomic` but wasn't including the
correct header.

Differential Revision: https://reviews.llvm.org/D105400
2021-07-04 06:00:39 +00:00
Georgy Komarov c558b1fca7
[analyzer] Fix calculating offset for fields with an empty type
Fix offset calculation routines in padding checker to avoid assertion
errors described in bugzilla issue 50426. The fields that are subojbects
of zero size, marked with [[no_unique_address]] or empty bitfields will
be excluded from padding calculation routines.

Reviewed By: NoQ

Differential Revision: https://reviews.llvm.org/D104097
2021-07-04 06:57:11 +03:00
Simon Pilgrim 89c1c64cc3 [KnownBits] Merge const/non-const KnownBits::extractBits implementations. NFC.
These are identical and can be just const.
2021-07-03 19:00:25 +01:00
Simon Pilgrim cc38f8939d [X86][SSE] Add mulhu/mulhs constant folding tests
These should be folded by D103323
2021-07-03 17:01:59 +01:00
Simon Pilgrim 80dd591610 [SelectionDAG] Replace APInt.lshr().trunc() with APInt.extractBits() where possible. NFC.
This also allows us to use KnownBits::extractBits in one case.
2021-07-03 16:33:00 +01:00
Simon Pilgrim e2e44c3da9 [SelectionDAG] Use KnownBits::insertBits instead of separate APInt::insertBits calls. NFC. 2021-07-03 16:32:59 +01:00
Nikita Popov e91440628e [IRBuilder] Avoid fetching pointer element type in some assertions
Specifically the CreateMaskedStore and CreateMaskedScatter APIs.
The CreateMaskedLoad and CreateMaskedGather APIs will need an
additional type argument.
2021-07-03 12:52:55 +02:00
Andrzej Warzynski 45e5214b43 [flang][driver] Add support for `--version` in the bash wrapper
The bash wrapper script, `flang`, calls `flang-new -fc1` under the hood,
which does not support `--version` (this is consistent with `clang -cc1
--version`). This change is needed for `flang --version` to work as
expected.

Note that `flang --version` (the Flang bash wrapper script for the
compiler driver) gives rather minimal output compared to `flang-new
--version` (the Flang compiler driver). As the wrapper script is just a
temporary solution for us, this should be sufficient.

Differential Revision: https://reviews.llvm.org/D105352
2021-07-03 10:47:41 +01:00
Roman Lebedev fc150cecd7
[SimplifyCFG] simplifyUnreachable(): erase instructions iff they are guaranteed to transfer execution to unreachable
This replaces the current ad-hoc implementation,
by syncing the code from InstCombine's implementation in `InstCombinerImpl::visitUnreachableInst()`,
with one exception that here in SimplifyCFG we are allowed to remove EH instructions.

Effectively, this now allows SimplifyCFG to remove calls (iff they won't throw and will return),
arithmetic/logic operations, etc.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D105374
2021-07-03 10:45:44 +03:00
David Green fbc329efbd [AArch64] Add S/UQXTRN tablegen patterns.
This adds simple patterns for signed and unsigned saturating extract
narrow instructions. They combine a min/max/truncate into a single
instruction, providing that the immediates on the min/max are correct
for the saturation type. This is just handled in tablegen with some
extra patterns.

v2i64->v2i32 is not handled here as the min/max nodes are not legal,
making the lowering quite different.

Differential Revision: https://reviews.llvm.org/D103263
2021-07-03 07:57:19 +01:00
Kai Luo c063946476 [AIX] Adjust CSR order to avoid breaking ABI regarding traceback
Allocate non-volatile registers in order to be compatible with ABI, regarding gpr_save.

Quoted from https://www.ibm.com/docs/en/ssw_aix_72/assembler/assembler_pdf.pdf page55,
> The preferred method of using GPRs is to use the volatile registers first. Next, use the nonvolatile registers
> in descending order, starting with GPR31.

This patch is based on @jsji 's initial draft.

Tested on test-suite and SPEC, found no degradation.

Reviewed By: jsji, ZarkoCA, xingxue

Differential Revision: https://reviews.llvm.org/D100167
2021-07-03 04:45:26 +00:00
Craig Topper af331e8284 [SelectionDAG] Rename memory VT argument for getMaskedGather/getMaskedScatter from VT to MemVT.
Use getMemoryVT() in MGATHER/MSCATTER DAG combines instead of
using the passthru or store value VT for this argument.
2021-07-02 17:37:40 -07:00