Commit Graph

239910 Commits

Author SHA1 Message Date
Devin Coughlin 9ec2cb600b [www] Add analyzer FAQ about not releasing ivars in -dealloc.
llvm-svn: 279183
2016-08-19 01:22:50 +00:00
Lang Hames b65f16c8e5 [RuntimeDyld] Add support for ELF R_ARM_REL32 and R_ARM_GOT_PREL.
Patch by William Dillon. Thanks William!

This patch adds support for the R_ARM_REL32 and R_ARM_GOT_PREL ELF ARM
relocations to RuntimeDyld, which should allow JITing of code that
produces these relocations.

No test case: Unfortunately RuntimeDyldELF's GOT building mechanism (which
uses a separate section for GOT entries) isn't compatible with
RuntimeDyldChecker. The correct fix for this is to fix RuntimeDyldELF's GOT
support (it's fundamentally broken at the moment: separate sections aren't
guaranteed to be in range of a GOT entry load), but that's a non-trivial job.

llvm-svn: 279182
2016-08-19 01:15:39 +00:00
Devin Coughlin 719238b7d3 [analyzer] Weaken assertion in trackNullOrUndefValue()
We should ignore paren casts when making sure that the semantic expression
in a PseudoObjectExpr for an ObjC getter is a message send.

This has no other intended functionality change.

Adding a test for this exposed an interesting issue in another test case
that only manifests under ARC. trackNullOrUndefValue() is not properly
suppressing for nil values that are the result of nil propagation from a nil
receiver when the nil is returned from a function. I've added a FIXME for that
missing suppression.

rdar://problem/27290568

llvm-svn: 279181
2016-08-19 01:05:31 +00:00
Saleem Abdulrasool c2f1e32365 EHABI: cover switch once more
When making WMMX support optional, we uncovered the switch.  Add the missing
entries.  Since the entry is a break leading to a dead path, it should get
optimized out yet retain the switch overage.

llvm-svn: 279180
2016-08-18 23:59:12 +00:00
Vitaly Buka aa654292bd [asan] Optimize store size in FunctionStackPoisoner::poisonRedZones
Summary: Reduce store size to avoid leading and trailing zeros.

Reviewers: kcc, eugenis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23648

llvm-svn: 279178
2016-08-18 23:51:15 +00:00
Andrew Kaylor 81901d658f Include X86CallFrameOptimization in the opt-bisect process.
Differential Revision: https://reviews.llvm.org/D23683

llvm-svn: 279175
2016-08-18 22:49:51 +00:00
Saleem Abdulrasool dab786fb78 AArch64: remove extraneous padding
The structs BarrierOp, PrefetchOp, PSBHintOp are in AArch64AsmParser.cpp
(inside anonymous namespace).  This diff changes the order of fields and
removes the excessive padding (8 bytes).

Patch by Alexander Shaposhnikov!

llvm-svn: 279173
2016-08-18 22:35:06 +00:00
Chris Bieneman 9f1fd7371e [CMake] Add variables for tracking which runtimes are included
This allows sub-projects to have conditionals based on the presence of other projects.

llvm-svn: 279172
2016-08-18 22:18:11 +00:00
Matthias Braun 91f95f0201 CodeGen: Add/Factor out LiveRegUnits class; NFCI
This is a set of register units intended to track register liveness, it
is similar in spirit to LivePhysRegs.
You can also think of this as the liveness tracking parts of the
RegisterScavenger factored out into an own class.

This was proposed in http://llvm.org/PR27609

Differential Revision: http://reviews.llvm.org/D21916

llvm-svn: 279171
2016-08-18 22:11:28 +00:00
Eugene Zelenko a1c76530d9 [Documentation] Fixed style in modernize-use-emplace.rst.
llvm-svn: 279170
2016-08-18 22:11:27 +00:00
Jacques Pienaar bfa5ea0818 Fix link quotes on AArch64's CompilerWriterInfo section.
Reviewers: t.p.northover

Subscribers: t.p.northover, aemerson, rengolin

Differential Revision: https://reviews.llvm.org/D23697

llvm-svn: 279169
2016-08-18 22:10:06 +00:00
Kyle Butt 780b517d6b CodeGen: If Convert blocks that would form a diamond when tail-merged.
The following function currently relies on tail-merging for if
conversion to succeed. The common tail of cond_true and cond_false is
extracted, and this then forms a diamond pattern that can be
successfully if converted.

If this block does not get extracted, either because tail-merging is
disabled or the threshold is higher, we should still recognize this
pattern and if-convert it.

Fixed a regression in the original commit. Need to un-reverse branches after
reversing them, or other conversions go awry.

Regression on self-hosting bots with no obvious explanation. Tidied up range
handling to be more obviously correct, but there was no smoking gun.

define i32 @t2(i32 %a, i32 %b) nounwind {
entry:
        %tmp1434 = icmp eq i32 %a, %b           ; <i1> [#uses=1]
        br i1 %tmp1434, label %bb17, label %bb.outer

bb.outer:               ; preds = %cond_false, %entry
        %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ]
        %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ]
        br label %bb

bb:             ; preds = %cond_true, %bb.outer
        %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ]
        %tmp. = sub i32 0, %b_addr.021.0.ph
        %tmp.40 = mul i32 %indvar, %tmp.
        %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph
        %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph
        br i1 %tmp3, label %cond_true, label %cond_false

cond_true:              ; preds = %bb
        %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph
        %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph
        %indvar.next = add i32 %indvar, 1
        br i1 %tmp1437, label %bb17, label %bb

cond_false:             ; preds = %bb
        %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0
        %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10
        br i1 %tmp14, label %bb17, label %bb.outer

bb17:           ; preds = %cond_false, %cond_true, %entry
        %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ]
        ret i32 %a_addr.026.1
}

Without tail-merging or diamond-tail if conversion:
LBB1_1:                                 @ %bb
                                        @ =>This Inner Loop Header: Depth=1
        cmp     r0, r1
        ble     LBB1_3
@ BB#2:                                 @ %cond_true
                                        @   in Loop: Header=BB1_1 Depth=1
        subs    r0, r0, r1
        cmp     r1, r0
        it      ne
        cmpne   r0, r1
        bgt     LBB1_4
LBB1_3:                                 @ %cond_false
                                        @   in Loop: Header=BB1_1 Depth=1
        subs    r1, r1, r0
        cmp     r1, r0
        bne     LBB1_1
LBB1_4:                                 @ %bb17
        bx      lr

With diamond-tail if conversion, but without tail-merging:
@ BB#0:                                 @ %entry
        cmp     r0, r1
        it      eq
        bxeq    lr
LBB1_1:                                 @ %bb
                                        @ =>This Inner Loop Header: Depth=1
        cmp     r0, r1
        ite     le
        suble   r1, r1, r0
        subgt   r0, r0, r1
        cmp     r1, r0
        bne     LBB1_1
@ BB#2:                                 @ %bb17
        bx      lr

llvm-svn: 279168
2016-08-18 22:09:27 +00:00
Kyle Butt 491afad8f6 IfConversion: Rescan diamonds.
The cost of predicating a diamond is only the instructions that are not shared
between the two branches. Additionally If a predicate clobbering instruction
occurs in the shared portion of the branches (e.g. a cond move), it may still
be possible to if convert the sub-cfg. This change handles these two facts by
rescanning the non-shared portion of a diamond sub-cfg to recalculate both the
predication cost and whether both blocks are pred-clobbering.

llvm-svn: 279167
2016-08-18 22:09:25 +00:00
Kyle Butt d76755ec95 IfConversion: Handle inclusive ranges more carefully.
This may affect calculations for thresholds, but is not a significant change
in behavior.

The problem was that an inclusive range must have an additonal flag to showr
that it is empty, because otherwise begin == end implies that the range has one
element, and it may not be possible to move past on either side.

llvm-svn: 279166
2016-08-18 22:09:23 +00:00
Changpeng Fang 03bdd8f797 AMDGPU: Add clang builtin for ds_swizzle.
Summary:
  int __builtin_amdgcn_ds_swizzle (int a, int imm);
while imm is a constant.

Differential Revision:
  http://reviews.llvm.org/D23682

llvm-svn: 279165
2016-08-18 22:04:54 +00:00
Vassil Vassilev b21ee08e57 PR28794: Don't try to instantiate function templates which are not visible.
Reviewed by Richard Smith.

llvm-svn: 279164
2016-08-18 22:01:25 +00:00
Richard Smith 49cc1ccb00 C++ Modules TS: Add parsing support for module import declaration.
llvm-svn: 279163
2016-08-18 21:59:42 +00:00
Petr Hosek 4071b1bac3 [ELF] Improve error reporting for relocations
We should always include symbol name when reporting relocations
error to simplify debugging of these issues. Without symbol names
users have to manually investigate which of the libraries contain
invalid relocations which can be cumbersome when linking multiple
libraries.

Differential Revision: https://reviews.llvm.org/D23690

llvm-svn: 279162
2016-08-18 21:55:23 +00:00
Hemant Kulkarni e77a0a9a3b llvm-objdump: Add Hexagon printer changes for -S/-l options
Differential Revision: https://reviews.llvm.org/D23521

llvm-svn: 279161
2016-08-18 21:50:13 +00:00
Chris Bieneman 1bb239c091 [CMake] Create convenience targets for runtime projects
Each runtime project has a top-level target that is the name of the runtime (minus the "lib" prefix if applicable). This creates top-level targets mapping to runtime projects.

llvm-svn: 279160
2016-08-18 21:47:18 +00:00
Justin Bogner 882f861cc7 CodeGen: Rename a variable to better fit LLVM style. NFC
llvm-svn: 279159
2016-08-18 21:46:54 +00:00
Zhan Jun Liau cf2f4b3251 [SystemZ] Use valid base/index regs for inline asm
Summary:
Inline asm memory constraints can have the base or index register be assigned
to %r0 right now. Make sure that we assign only ADDR64 registers to the base
and index.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23367

llvm-svn: 279157
2016-08-18 21:44:15 +00:00
Tim Shen 36bde4f81d [Analysis] Change several Analysis pieces to use NodeRef. NFC.
Reviewers: dblaikie, grosser

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D23625

llvm-svn: 279156
2016-08-18 21:41:24 +00:00
Chris Bieneman 997ee2b8cf [CMake] Make llvm-config implicit dependency for subprojects
The subproject interface being used for runtime libraries expects that llvm-config is passed into the subproject for consumption. We currently do this for every subproject, so we should expect that all LLVM ExternalProjects depend on llvm-config for the time being.

Eventually I'd like to see the sub-projects using LLVMConfig.cmake instead of the llvm-config binary, but that will take time to roll out.

llvm-svn: 279155
2016-08-18 21:41:21 +00:00
Saleem Abdulrasool be25c486dc CodeGen: use range based for loop, NFC
llvm-svn: 279154
2016-08-18 21:40:06 +00:00
Chris Bieneman a7c87a9430 [CMake] Minor fix to regex in r279152
The third version component is optional in Xcode's version spew, so we need to make it optional in the regex.

llvm-svn: 279153
2016-08-18 21:36:36 +00:00
Chris Bieneman 11eed999c4 [CMake] Support for generating Xcode 8 compatible toolchains
Xcode 8 requires toolchain compatibility version 2. This allows us to select the correct compatibility version based on the installed version of Xcode.

llvm-svn: 279152
2016-08-18 21:32:48 +00:00
Chris Bieneman 12b134bd4b [CMake] Get libcxx building under LLVM/runtimes
Summary:
The new LLVM runtimes build directory requires some basic conventions across the runtime projects. These changes make libcxx build under the runtimes subdirectory. The general idea of the changes is that the runtimes subdirectory requires some conventions to be consistent across runtime projects.

I expect to have a few more small patches that build on this to tie up check targets and other things useful in development workflows.

Summary of changes in this patch:

* Renamed variable LLVM_CONFIG -> LLVM_CONFIG_PATH
* Renamed variable LIBCXX_BUILT_STANDALONE -> LIBCXX_STANDALONE_BUILD
* Add an include of AddLLVM in the tests subdirectory for add_lit_testsuite.

Reviewers: EricWF

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D23696

llvm-svn: 279151
2016-08-18 21:31:51 +00:00
Sanjay Patel 98cd99dfc6 [InstCombine] add helper function for folds of icmp (shl 1, Y), C; NFCI
Clean up the existing code by:
1. Renaming variables
2. Adding local variables
3. Making it vector-safe

This is still guarded by a ConstantInt check, so no functional change is intended.
But this should be ready to go: if we move the ConstantInt check down, all of
these folds should do the right thing for vector types.

llvm-svn: 279150
2016-08-18 21:28:30 +00:00
Jacques Pienaar 2b25799bcc [lanai] Add ISA document to CompilerWritersInfo
Summary: Add Lanai ISA document to CompilerWritersInfo.

Reviewers: eliben

Subscribers: aemerson, llvm-commits

Differential Revision: https://reviews.llvm.org/D23693

llvm-svn: 279149
2016-08-18 21:25:17 +00:00
Tom Stellard a1619cd9aa AMDGPU/SI: Fix a test in wqm.ll to always use s_cbranch_vcc*
Summary:
We need to use floating-point compares to ensure that s_cbranch_vcc*
instructions are always generated.  With integer compares, future
optimizations could cause s_cbranch_scc* to be generated instead.

Reviewers: arsenm, nhaehnle

Subscribers: llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D23401

llvm-svn: 279148
2016-08-18 21:21:53 +00:00
Cameron Desrochers 6700b4910e Fixed more signed/unsigned mismatch warnings introduced in my change at r279076
llvm-svn: 279145
2016-08-18 20:56:48 +00:00
Kostya Serebryany 32661f9d66 [libFuzzer] add more __attribute__((visibility("default")))
llvm-svn: 279143
2016-08-18 20:52:52 +00:00
Amaury Sechet 763c59dc9a Make cltz and cttz zero undef when the operand cannot be zero in InstCombine
Summary: Also add popcount(n) == bitsize(n)  -> n == -1 transformation.

Reviewers: majnemer, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23134

llvm-svn: 279141
2016-08-18 20:43:50 +00:00
Justin Lebar cb20a09f54 [CUDA] Improve handling of math functions.
Summary:
A bunch of related changes here to our CUDA math headers.

- The second arg to nexttoward is a double (well, technically, long
  double, but we don't have that), not a float.

- Add a forward-declare of llround(float), which is defined in the CUDA
  headers.  We need this for the same reason we need most of the other
  forward-declares: To prevent a constexpr function in our standard
  library from becoming host+device.

- Add nexttowardf implementation.

- Pull "foobarf" functions defined by the CUDA headers in the global
  namespace into namespace std.  This lets you do e.g. std::sinf.

- Add overloads for math functions accepting integer types.  This lets
  you do e.g. std::sin(0) without having an ambiguity between the
  overload that takes a float and the one that takes a double.

With these changes, we pass testcases derived from libc++ for cmath and
math.h.  We can check these testcases in to the test-suite once support
for CUDA lands there.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D23627

llvm-svn: 279140
2016-08-18 20:43:13 +00:00
Sanjay Patel 40e8ca46ad [InstCombine] use m_APInt to allow icmp (trunc X, Y), C folds for splat constant vectors
This is a sibling of:
https://reviews.llvm.org/rL278859
https://reviews.llvm.org/rL278935
https://reviews.llvm.org/rL278945
https://reviews.llvm.org/rL279066
https://reviews.llvm.org/rL279077
https://reviews.llvm.org/rL279101

llvm-svn: 279133
2016-08-18 20:28:54 +00:00
Sanjay Patel 5f4ce4e23d [InstCombine] clean up foldICmpTruncConstant(); NFCI
1. Fix variable names
2. Add local variables to reduce code

llvm-svn: 279132
2016-08-18 20:25:16 +00:00
Michael Kuperstein 2bc3d4d46c [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.

Differential Revision: https://reviews.llvm.org/D23597

llvm-svn: 279129
2016-08-18 20:08:15 +00:00
Yaxun Liu dea5ccb04b Revert [OpenCL] AMDGCN: Fix size_t type
due to regressions in test/CodeGen/exprs.c on certain platforms.

llvm-svn: 279127
2016-08-18 20:01:06 +00:00
Wei Ding 52bb661dec AMDGPU : Fix QSAD and MQSAD instructions' incorrect data type.
Differential Revision: http://reviews.llvm.org/D23689

llvm-svn: 279126
2016-08-18 19:51:14 +00:00
Matthew Simpson 11db6b6b8c [SLP] Initialize VectorizedValue when gathering
We abort building vectorizable trees in some cases (e.g., if the maximum
recursion depth is reached, if the region size is too large, etc.). If this
happens for a reduction, we can be left with a root entry that needs to be
gathered. For these cases, we need make sure we actually set VectorizedValue to
the resulting vector.

This patch ensures we properly set VectorizedValue, and it also ensures the
insertelement sequence generated for the gathers is inserted at the correct
location.

Reference: https://llvm.org/bugs/show_bug.cgi?id=28330
Differential Revison: https://reviews.llvm.org/D23410

llvm-svn: 279125
2016-08-18 19:50:32 +00:00
Matthias Braun 075d0c23d5 RegScavenging: Add scavengeRegisterBackwards()
Re-apply r276044 with off-by-1 instruction fix for the reload placement.

This is a variant of scavengeRegister() that works for
enterBasicBlockEnd()/backward(). The benefit of the backward mode is
that it is not affected by incomplete kill flags.

This patch also changes
PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register
scavenger in backwards mode.

Differential Revision: http://reviews.llvm.org/D21885

llvm-svn: 279124
2016-08-18 19:47:59 +00:00
Zachary Turner 85d0f3140a Fix json compilation database syntax on non-Windows.
llvm-svn: 279122
2016-08-18 19:42:00 +00:00
Yaxun Liu 6305f8a351 [OpenCL] AMDGCN: Fix size_t type
Pointers of certain GPUs in AMDGCN target in private address space is 32 bit but pointers in other address spaces are 64 bit. size_t type should be defined as 64 bit for these GPUs so that it could hold pointers in all address spaces. Also fixed issues in pointer arithmetic codegen by using pointer specific intptr type.

Differential Revision: https://reviews.llvm.org/D23361

llvm-svn: 279121
2016-08-18 19:34:04 +00:00
Zachary Turner 9e60a2ad73 Resubmit "[Tooling] Parse compilation database command lines on Windows."
This patch introduced the ability to decide at runtime whether to parse
JSON compilation database command lines using Gnu syntax or Windows
syntax.  However, there were many existing unit tests written that
hardcoded Gnu-specific paths.  These tests were now failing because
the auto-detection logic was choosing to parse them using Windows
rules.

This resubmission of the patch fixes this by introducing an enum
which defines the syntax mode, which defaults to auto-detect, but
for which the unit tests force Gnu style parsing.

Reviewed By: alexfh
Differential Revision: https://reviews.llvm.org/D23628

llvm-svn: 279120
2016-08-18 19:31:48 +00:00
Simon Atanasyan 978f91ca43 [ELF][MIPS] Support R_MIPS_GOT_HI16 / R_MIPS_GOT_LO16 relocations calculation
llvm-svn: 279119
2016-08-18 19:08:41 +00:00
Simon Atanasyan e933a8e212 [ELF][MIPS] Support R_MIPS_CALL_HI16 / R_MIPS_CALL_LO16 relocations calculation
llvm-svn: 279118
2016-08-18 19:08:36 +00:00
Kyle Butt 64e428147f Branch Folding: Accept explicit threshold for tail merge size.
This is prep work for allowing the threshold to be different during layout,
and to enforce a single threshold between merging and duplicating during
layout. No observable change intended.

llvm-svn: 279117
2016-08-18 18:57:29 +00:00
Reid Kleckner 24c8699057 [MS] Silence -Wextern-init on const selectany variables
In C, 'extern' is typically used to avoid tentative definitions when
declaring variables in headers, but adding an intializer makes it a
defintion. This is somewhat confusing, so GCC and Clang both warn on it.
In C++, 'extern' is often used to give implictly static 'const'
variables external linkage, so don't warn in that case. If selectany is
present, this might be header code intended for C and C++ inclusion, so
apply the C++ rules.

llvm-svn: 279116
2016-08-18 18:45:07 +00:00
Alexander Kornienko 0f85498a0b [clang-tidy docs] Move option descriptions to the Options section
+ random fixes

llvm-svn: 279115
2016-08-18 18:43:47 +00:00