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84768 Commits

Author SHA1 Message Date
Jim Grosbach a1e08fb256 Make if-conversion ignore dbg_value instructions in its analysis. rdar://7797940 
llvm-svn: 105498
 2010-06-04 23:01:26 +00:00
Nate Begeman 7090e5be2b Handle multi-vector returns and args. 
llvm-svn: 105496
 2010-06-04 22:53:30 +00:00
Devang Patel e89b759501 Update docs to reflect new DISubprogram elements. 
llvm-svn: 105495
 2010-06-04 22:49:55 +00:00
Anders Carlsson 76f513f862 When deciding whether reinterpret_cast casts away constness we need to look at array qualifiers. Fixes rdar://problem/8018292. 
llvm-svn: 105494
 2010-06-04 22:47:55 +00:00
Stuart Hastings 7c015988fe Support for nested functions/classes in debug output. Radar 7424645. 
llvm-svn: 105492
 2010-06-04 22:36:03 +00:00
John McCall a3cecb628f Add indexing support for the block and @property type location information 
I just implemented.

llvm-svn: 105491
 2010-06-04 22:33:30 +00:00
Devang Patel 36da24b546 Copy location info for current function argument from dbg.declare if respective store instruction does not have any location info. 
llvm-svn: 105490
 2010-06-04 22:27:30 +00:00
Nate Begeman 6736cc89d0 Initial support for ARM NEON builtins, codegen up next 
llvm-svn: 105489
 2010-06-04 21:36:27 +00:00
Nate Begeman 0d081df3f2 Additional fixes to BuiltinsARM.def generator, on to clang codegen. 
llvm-svn: 105488
 2010-06-04 21:36:00 +00:00
Fariborz Jahanian ea882cd92e Build AST for copy-construction of copied-in 
class object in blocks and carry it to IRGen.

llvm-svn: 105487
 2010-06-04 21:35:44 +00:00
Dale Johannesen 065d6fd537 More tail call removal. 
llvm-svn: 105485
 2010-06-04 21:14:24 +00:00
John McCall 339bb66246 Remember type source information for Objective C property declarations. 
llvm-svn: 105484
 2010-06-04 20:50:08 +00:00
Jim Grosbach 50d229e6b3 Skip dbg_value instructions when scanning instructions in register scavenging. 
llvm-svn: 105481
 2010-06-04 20:18:30 +00:00
Dan Gohman 538b413ccb Fix normalization and de-normalization of non-affine SCEVs. 
llvm-svn: 105480
 2010-06-04 19:16:34 +00:00
Fariborz Jahanian 9643399ef0 Added a field to BlockDeclRefExpr for future use. 
No functionality change yet.

llvm-svn: 105479
 2010-06-04 19:06:53 +00:00
John McCall 8e346702b6 Preserve more information from a block's original function declarator, if one 
was given.  Remove some unnecessary accounting from BlockScopeInfo.  Handle
typedef'ed function types until such time as we decide not.

llvm-svn: 105478
 2010-06-04 19:02:56 +00:00
Daniel Dunbar 7f3d95054b Driver: Change -dwarf-debug-flags option to pass the original command line 
arguments after translation, instead of the -cc1 level arguments.

llvm-svn: 105476
 2010-06-04 18:47:06 +00:00
Daniel Dunbar 6beaf5110f Driver/Darwin: Model dsymutil properly, as a separate action/tool kind which is 
added as the last output step, instead of just hacking it into the link step.
 - Among other things, this fixes dSYM generation when using multiple -arch options.

llvm-svn: 105475
 2010-06-04 18:28:41 +00:00
Daniel Dunbar 8829962030 Driver: Add an explicit dsymutil action. 
llvm-svn: 105474
 2010-06-04 18:28:36 +00:00
Jakob Stoklund Olesen 864827afb0 Keep track of the call instructions whose clobber lists were skipped during fast 
register allocation.

Process all of the clobber lists at the end of the function, marking the
registers as used in MachineRegisterInfo.

This is necessary in case the calls clobber callee-saved registers (sic).

llvm-svn: 105473
 2010-06-04 18:08:29 +00:00
Dale Johannesen d1b9311afa More thoroughly disable tails calls by default. 
8060143, although this doesn't fix the real problem with tail call.

llvm-svn: 105472
 2010-06-04 18:04:24 +00:00
Jim Grosbach 3548803f62 Another fix to prevent debug info from affecting codegen. rdar://7797940 
llvm-svn: 105470
 2010-06-04 17:57:34 +00:00
Fariborz Jahanian 64176c2c97 For C++ copied in objects, use copy constructors in 
setting up block's descriptor. This is on going work to
support c++ specific issues in setting up blocks
various APIs.

llvm-svn: 105469
 2010-06-04 16:10:00 +00:00
Rafael Espindola 92eb2cbbef Add ARM paths for debian. Not enough to bootstrap on a beagle board, but 
moves us further.

llvm-svn: 105468
 2010-06-04 14:28:10 +00:00
Dan Gohman f4e31c8974 Fix an apparent typo. 
llvm-svn: 105467
 2010-06-04 14:16:02 +00:00
John McCall a3ccba0417 Restructure how we interpret block-literal declarators. Correctly handle 
the case where we pick up block arguments from a typedef.  Save the block
signature as it was written, and preserve same through PCH.

llvm-svn: 105466
 2010-06-04 11:21:44 +00:00
Abramo Bagnara 52d6350dd2 Don't insert in lexical context implicit definitions of static member instances. 
llvm-svn: 105465
 2010-06-04 09:35:39 +00:00
Douglas Gregor 2e87ca218f When checking for equality of template parameter lists, a template 
type parameter pack is distinct from a template type parameter.

llvm-svn: 105464
 2010-06-04 08:34:32 +00:00
John McCall b1cd7dac3d Delay checking for mutable const fields until we're checking the field. 
Allows this check to work properly for instantiated fields and removes
an unnecessary GetTypeForDeclarator call.

llvm-svn: 105463
 2010-06-04 08:34:12 +00:00
Douglas Gregor 71b209dea6 Properly disambiguate between an elaborated-type-specifier and a 
type-parameter within a template parameter list. Found by inspection. 

llvm-svn: 105462
 2010-06-04 07:30:15 +00:00
Nate Begeman 878bdccea6 Progress on generating BuiltinsARM.def, still some duplicates to work out. 
llvm-svn: 105461
 2010-06-04 07:11:25 +00:00
John McCall ec6f4e9017 More refactoring. 
llvm-svn: 105458
 2010-06-04 02:29:22 +00:00
Anders Carlsson 15722da2dc Add a short circuit in isVirtuallyDerivedFrom. 
llvm-svn: 105457
 2010-06-04 01:40:08 +00:00
Nate Begeman 1ca8dba557 BuiltinsARM.def emitter, still needs a substantial bit of tweaking to lighten the load on clang. 
llvm-svn: 105456
 2010-06-04 01:26:15 +00:00
Jim Grosbach 4e5e6a8973 more dbg_value adjustments so debug info doesn't affect codegen 
llvm-svn: 105454
 2010-06-04 01:23:30 +00:00
Mon P Wang 622cdd2297 Fixed a bug during widening where we would avoid legalizing a node. When we 
replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes.  Since OpA has been processed, the new uses are
not examined again.  The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.

llvm-svn: 105453
 2010-06-04 01:20:10 +00:00
Jordy Rose 2e22268904 Assignments to reference variables shouldn't kill the variable. 
llvm-svn: 105452
 2010-06-04 01:14:56 +00:00
David Chisnall b190a2c74a Fixed Objective-C type encoding for bitfields for the GNU runtime to match the encoding used by GCC. 
llvm-svn: 105451
 2010-06-04 01:10:52 +00:00
Dale Johannesen b3780b1103 Remove more tail calls. 
llvm-svn: 105450
 2010-06-04 01:01:24 +00:00
Dale Johannesen e7b392dca9 Remove a tail call, and move some CHECKs to the 
functions where they belong.

llvm-svn: 105449
 2010-06-04 01:01:04 +00:00
Anders Carlsson fd788405ac Remove now unused code. 
llvm-svn: 105448
 2010-06-04 00:59:37 +00:00
Anders Carlsson 27860db29e Use CXXRecordDecl::getFinalOverriders to get final overriders. This speeds up vtable layout by moving away from the old final overrider computation code that had O(N^2) complexity in some cases. 
llvm-svn: 105447
 2010-06-04 00:54:04 +00:00
John McCall 4a2429aa5a Remove a couple of unnecessary uses of IsStandardConversion. 
llvm-svn: 105445
 2010-06-04 00:29:51 +00:00
Nate Begeman 03d6e4961c Mangle __builtin_neon_* names appropriately. 
Add skeleton of support for emitting the list of prototypes for BuiltinsARM.def

llvm-svn: 105443
 2010-06-04 00:21:41 +00:00
Dan Gohman ae8bb42f5b No need to special-case structs here; structs are first-class now. 
llvm-svn: 105442
 2010-06-04 00:18:06 +00:00
Jim Grosbach 1bcdf32d22 fix typo 
llvm-svn: 105441
 2010-06-04 00:15:00 +00:00
Dan Gohman 8fdda8a655 This test doesn't need the ssp attribute. 
llvm-svn: 105440
 2010-06-04 00:14:48 +00:00
Bob Wilson d8a9a04739 For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs and 
VECTOR_SHUFFLEs to REG_SEQUENCE instructions.  The standard ISD::BUILD_VECTOR
node corresponds closely to REG_SEQUENCE but I couldn't use it here because
its operands do not get legalized.  That is pretty awful, but I guess it
makes sense for other targets.  Instead, I have added an ARM-specific version
of BUILD_VECTOR that will have its operands properly legalized.
This fixes the rest of Radar 7872877.

llvm-svn: 105439
 2010-06-04 00:04:02 +00:00
Dale Johannesen e288fee959 Remove tail call. A tail call version will follow. 
llvm-svn: 105438
 2010-06-04 00:03:37 +00:00
Bob Wilson a733daf18c Add some missing checks in TwoAddressInstructionPass::CoalesceExtSubRegs. 
Check that all the instructions are in the same basic block, that the
EXTRACT_SUBREGs write to the same subregs that are being extracted, and that
the source and destination registers are in the same regclass.  Some of
these constraints can be relaxed with a bit more work.  Jakob suggested
that the loop that checks for subregs when NewSubIdx != 0 should use the
"nodbg" iterator, so I made that change here, too.

llvm-svn: 105437
 2010-06-03 23:53:58 +00:00