d8c9cb9182
rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
...
changing the interface to allow for future changes.
llvm-svn: 41384
2007-08-25 00:47:38 +00:00
bdea32d812
Poison APFloat::operator==. Replace existing uses with bitwiseIsEqual.
...
This means backing out the preceding change to Constants.cpp, alas.
llvm-svn: 41378
2007-08-24 22:09:56 +00:00
7891d8edf0
Use APFloat internally for ConstantFPSDNode.
...
llvm-svn: 41372
2007-08-24 20:59:15 +00:00
97cdac8d19
Perform correct codegen for eh_dwarf_cfa intrinsic.
...
llvm-svn: 41316
2007-08-23 07:21:06 +00:00
beb80a9832
move this check. ppc outputs .no_dead_strip properly
...
llvm-svn: 41286
2007-08-22 19:33:11 +00:00
54a187ea8b
Minor cleanups to reduce some spurious differences between different
...
scheduler implementations.
llvm-svn: 41191
2007-08-20 19:28:38 +00:00
9c3d20d823
Partial implementation of calling functions with byval arguments:
...
*) The needed information is propagated to the DAG
*) The X86-64 backend detects it and aborts
llvm-svn: 41179
2007-08-20 15:18:24 +00:00
f5a23abf37
Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) depending the types.
...
llvm-svn: 41163
2007-08-18 05:57:05 +00:00
cb6d65e1bf
Avoid issue on 64-bit hosts.
...
llvm-svn: 41143
2007-08-17 18:02:22 +00:00
81db5acab0
Fix GLIBCXX_DEBUG error of comparing two singular iterators
...
llvm-svn: 41139
2007-08-17 15:13:55 +00:00
631ccc6144
If dynamic_stackalloc alignment is > stack alignment, first issue an instruction to align the stack ptr before the decrement.
...
llvm-svn: 41133
2007-08-16 23:50:06 +00:00
95667c532c
- If a dynamic_stackalloc alignment requirement is <= stack alignment, then the alignment argument is ignored.
...
- *Always* round up the size of the allocation to multiples of stack
alignment to ensure the stack ptr is never left in an invalid state after a dynamic_stackalloc.
llvm-svn: 41132
2007-08-16 23:46:29 +00:00
70c2de7bf1
Fix some kill info update bugs; add hidden option -disable-rematerialization to turn off remat for debugging.
...
llvm-svn: 41118
2007-08-16 07:24:22 +00:00
a392cd2fde
Implement FPOWI ExpandOp.
...
Fix PR1287.
llvm-svn: 41112
2007-08-15 22:13:27 +00:00
958cf3d43e
If the source of a move is in spill slot, the reload may be folded to essentially a load from stack slot. It's ok to mark the stack slot value as available for reuse. But it should not be clobbered since the destination of the move is live.
...
llvm-svn: 41109
2007-08-15 20:20:34 +00:00
3f22fffe94
- If a def is dead, do not spill it.
...
- If the defs of a spilled rematerializable MI are dead after the spill store is deleted, delete
the def MI as well.
llvm-svn: 41086
2007-08-14 23:25:37 +00:00
94168a4ed0
Fix for PR1596: AdjustCopiesBackFrom() should conservatively check if any of its sub-registers may overlap with the interval of the copy that's being coalesced.
...
llvm-svn: 41084
2007-08-14 23:19:28 +00:00
6cb9fd7be5
If a MI's def is remat as well as spilled, and the store is later deemed dead, mark the def operand as isDead.
...
llvm-svn: 41083
2007-08-14 20:23:13 +00:00
234386509b
If a spilled value is being reused and the use is a kill, that means there are
...
no more uses within the MBB and the spilled value isn't live out of the MBB.
Then it's safe to delete the spill store.
llvm-svn: 41069
2007-08-14 09:11:18 +00:00
78a8806f4f
If a rematerializable def is not deleted, i.e. it is also spilled, check if the
...
spilled value is available for reuse.
llvm-svn: 41067
2007-08-14 05:42:54 +00:00
74c69f7588
Kill info update bugs.
...
llvm-svn: 41064
2007-08-14 01:56:58 +00:00
33820da1da
Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized.
...
llvm-svn: 41060
2007-08-13 23:45:17 +00:00
5ca98c657d
Kill info update bugs.
...
llvm-svn: 41043
2007-08-13 07:12:23 +00:00
af21e9550e
No need to remove dead range from soon-to-be-dead live interval. Its val# may be out of whack.
...
llvm-svn: 41024
2007-08-12 01:26:19 +00:00
05cc486c7b
Code to maintain kill information during register coalescing.
...
llvm-svn: 41016
2007-08-11 00:59:19 +00:00
e081928f49
Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in LowerSubregs and add more debugging output there.
...
llvm-svn: 41005
2007-08-10 21:11:55 +00:00
a17799a3bd
Fix EXTRACT_ELEMENT, EXTRACT_SUBVECTOR, and EXTRACT_VECTOR_ELT to
...
use an intptr ValueType instead of i32 for the index operand in
getCopyToParts.
llvm-svn: 40987
2007-08-10 14:59:38 +00:00
66011c17d5
propagate struct size and alignment of byval arguments to the DAG
...
llvm-svn: 40986
2007-08-10 14:44:42 +00:00
2b9fe84b07
unbreak the build
...
llvm-svn: 40976
2007-08-09 23:55:17 +00:00
1115a2b412
Bug fix. ~1U marks the val# dead.
...
llvm-svn: 40975
2007-08-09 23:14:39 +00:00
c339e45274
Update per review comments.
...
llvm-svn: 40965
2007-08-09 17:27:48 +00:00
ba1a98a4e0
long double 9 of N. This finishes up the X86-32 bits
...
(constants are still not handled). Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).
llvm-svn: 40958
2007-08-09 01:04:01 +00:00
9d09c5ccda
If a target really needs to custom lower constants, it should be allowed
...
to do so.
llvm-svn: 40955
2007-08-08 23:23:31 +00:00
d771b793fe
Adding kill info to val#.
...
llvm-svn: 40925
2007-08-08 07:03:29 +00:00
103947125c
Clean up and bug fix.
...
llvm-svn: 40921
2007-08-08 05:56:18 +00:00
a8c2f38617
- Each val# can have multiple kills.
...
- Fix some minor bugs related to special markers on val# def. ~0U means
undefined, ~1U means dead val#.
llvm-svn: 40916
2007-08-08 03:00:28 +00:00
c236617ea0
Remove a dead assertion.
...
llvm-svn: 40914
2007-08-08 01:00:21 +00:00
0d0fee269a
- LiveInterval value#'s now have 3 components: def instruction #,
...
kill instruction #, and source register number (iff the value# is defined by a
copy).
- Now def instruction # is set for every value#, not just for copy defined ones.
- Update some outdated code related inactive live ranges.
- Kill info not yet set. That's next patch.
llvm-svn: 40913
2007-08-07 23:49:57 +00:00
99905f16f8
Add a missing forward declaration.
...
llvm-svn: 40896
2007-08-07 16:34:05 +00:00
079ebcfae5
Fix a regression compiling 2005-05-11-Popcount-ffs-fls with the CBE,
...
introduced by chandler's patch.
llvm-svn: 40864
2007-08-06 16:36:18 +00:00
2e5fb9f71e
Implement review feedback. No functionality change.
...
llvm-svn: 40863
2007-08-06 16:33:56 +00:00
446282ae3d
Fix minor doxygen nits.
...
llvm-svn: 40854
2007-08-05 20:06:04 +00:00
6299a45277
shorten this name
...
llvm-svn: 40843
2007-08-05 18:45:33 +00:00
7132e00de7
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
...
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
llvm-svn: 40807
2007-08-04 01:51:18 +00:00
5f6a9da530
More explicit keywords.
...
llvm-svn: 40757
2007-08-02 21:21:54 +00:00
3ffe7187db
don't redefine a parameter
...
llvm-svn: 40748
2007-08-02 18:08:16 +00:00
358c3d1dac
Do not emit copies for physical register output if it's not used.
...
llvm-svn: 40722
2007-08-02 05:29:38 +00:00
5b80ecbcf5
Style police: Expand the tabs to spaces!
...
llvm-svn: 40712
2007-08-02 02:22:46 +00:00
c5549fc3a0
Instead of adding copyfromreg's to handle physical definitions. Now isel can
...
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)
Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)
And let scheduledag emit the move from X86::EAX to a virtual register.
llvm-svn: 40710
2007-08-02 00:28:15 +00:00
d8ded48468
Bugs: missing partial uses and redundant partial defs.
...
llvm-svn: 40688
2007-08-01 20:18:21 +00:00
0db4418a5f
Expand unaligned loads/stores when the target doesn't support them. (PR1548)
...
llvm-svn: 40682
2007-08-01 19:34:21 +00:00
17a5dfe6f7
New CallInst interface to address GLIBCXX_DEBUG errors caused by
...
indexing an empty std::vector.
Updates to all clients.
llvm-svn: 40660
2007-08-01 03:43:44 +00:00
e02b2d7e69
simpleregistercoalescing -> regcoalescing. It's too long for me to handle.
...
llvm-svn: 40654
2007-07-31 22:37:44 +00:00
34e2d22d63
- Allow custom lowering for CTPOP, CTTZ, CTLZ.
...
- Fixed an existing unexpanded tab.
llvm-svn: 40605
2007-07-30 21:00:31 +00:00
4ff9fb14f6
Fix a bug in getCopyFromParts turned up in the testcase for PR1132.
...
llvm-svn: 40598
2007-07-30 19:09:17 +00:00
33d0ea2597
Print a space between the comment character and the basic block name,
...
for prettiness.
llvm-svn: 40593
2007-07-30 15:06:25 +00:00
644f917358
Support for trampolines, except for X86 codegen which is
...
still under discussion.
llvm-svn: 40549
2007-07-27 12:58:54 +00:00
14bbb15f07
Move subreg lowering pass to be right after regalloc, per feedback.
...
llvm-svn: 40548
2007-07-27 07:36:14 +00:00
30f060be80
Fix the alias analysis query in DAGCombiner to not add in two
...
offsets. The SrcValueOffset values are the real offsets from the
SrcValue base pointers.
llvm-svn: 40534
2007-07-26 16:14:06 +00:00
e9d738cefc
Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.
...
llvm-svn: 40521
2007-07-26 08:18:32 +00:00
18603b03e1
Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350
...
llvm-svn: 40520
2007-07-26 08:12:07 +00:00
a8fc0e527b
Add selection DAG nodes for subreg insert/extract. PR1350
...
llvm-svn: 40516
2007-07-26 07:34:40 +00:00
0dbc152d2e
Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding operands.
...
llvm-svn: 40514
2007-07-26 07:00:46 +00:00
3fead96121
Fix infinite recursion for when extract_vector_elt is legal. Unfortunately no public targets use this code-path, so no test.
...
llvm-svn: 40510
2007-07-26 03:33:13 +00:00
86eb3fd97d
EmitAlignment() also emits optional fill value.
...
llvm-svn: 40500
2007-07-25 23:35:07 +00:00
64b64ae591
Minor cleanup:
...
- Split EH and debug infiormation
- Make DwarfWriter more verbose in some cases
llvm-svn: 40481
2007-07-25 00:06:28 +00:00
f0bb12848f
Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask.
...
llvm-svn: 40480
2007-07-24 23:00:27 +00:00
b6a8ae20c7
Fix some uses of dyn_cast to be uses of cast.
...
llvm-svn: 40443
2007-07-23 20:24:29 +00:00
147d9fa57d
Don't assume that only Uses can be kills. Defs are marked as kills initially
...
when there are no uses. This fixes a dangling-pointer bug, where pointers to
deleted instructions were not removed from kills lists. More info here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-July/009749.html
llvm-svn: 40131
2007-07-20 23:17:34 +00:00
9d5df0a5f6
Added -print-emitted-asm to print out JIT generated asm to cerr.
...
llvm-svn: 40123
2007-07-20 21:56:13 +00:00
85ec2af554
As pointed out by g++-4.2, the original code didn't do
...
what it thought it was doing.
llvm-svn: 40044
2007-07-19 07:31:58 +00:00
a8d152a22a
Add comment.
...
llvm-svn: 40022
2007-07-18 23:34:48 +00:00
a7b65c30a3
It's not necessary to do rounding for alloca operations when the requested
...
alignment is equal to the stack alignment.
llvm-svn: 40004
2007-07-18 16:29:46 +00:00
f9ef70560e
Dead code.
...
llvm-svn: 39979
2007-07-17 20:01:19 +00:00
06c60b6032
Fix comments about vectors to use the current wording.
...
llvm-svn: 39921
2007-07-16 14:29:03 +00:00
d20f485866
Fix the build. Patch from Holger Schurig.
...
llvm-svn: 39856
2007-07-14 15:11:14 +00:00
383a324735
Long live the exception handling!
...
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
llvm-svn: 39855
2007-07-14 14:06:15 +00:00
ff72788863
Fix the comment for LegalizeOp to more accurately reflect what it does.
...
llvm-svn: 39827
2007-07-13 20:14:11 +00:00
80f9f077e3
Don't call SimplifyVBinOp for non-vector operations, following earlier review
...
feedback. This theoretically makes the common (scalar) case more efficient.
llvm-svn: 39823
2007-07-13 20:03:40 +00:00
4dc35dbd3e
Modify previous patch per review comments.
...
llvm-svn: 39817
2007-07-13 17:31:29 +00:00
2182f06f2d
Skeleton of post-RA scheduler; doesn't do anything yet.
...
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
llvm-svn: 39816
2007-07-13 17:13:54 +00:00
0263dd1d7f
The type ids making up a filter are unsigned, and
...
should be output as unsigned values. Checked against
gcc.
llvm-svn: 39775
2007-07-12 13:51:39 +00:00
6b6d1f685f
Missed a couple of places where new instructions are added due to spill / restore.
...
llvm-svn: 39748
2007-07-11 19:17:18 +00:00
03b274911f
Exception handling has been implemented.
...
llvm-svn: 39732
2007-07-11 16:59:20 +00:00
d5ea194b6c
If assertions are not enabled, we should return False here.
...
llvm-svn: 38535
2007-07-11 08:47:55 +00:00
74a541024f
No longer need to track last def / use.
...
llvm-svn: 38534
2007-07-11 08:47:44 +00:00
bec7a20c5e
Fix for PR1545: Revamp code that update kill information due to register reuse.
...
llvm-svn: 38525
2007-07-11 05:28:39 +00:00
d9034f717a
Make this work with GLIBCXX_DEBUG.
...
llvm-svn: 38516
2007-07-10 22:00:30 +00:00
60d6f96da3
Change the peep for EXTRACT_VECTOR_ELT of BUILD_PAIR to look for
...
the new CONCAT_VECTORS node type instead, as that's what legalize
uses now. And add a peep for EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT.
llvm-svn: 38503
2007-07-10 18:20:44 +00:00
5e9084207f
If the operand is marked M_OPTIONAL_DEF_OPERAND, then it's a def.
...
llvm-svn: 38496
2007-07-10 17:52:20 +00:00
fbc73099dc
Somehow this wasn't committed last time. M_CLOBBERS_PRED is gone.
...
llvm-svn: 38495
2007-07-10 17:50:43 +00:00
adb3d37c07
Fix a bug in the folding of binary operators to undef.
...
Thanks to Lauro for spotting this!
llvm-svn: 38491
2007-07-10 15:19:29 +00:00
fa91282dbf
Fix the folding of undef in several binary operators to recognize
...
undef in either the left or right operand.
llvm-svn: 38489
2007-07-10 14:20:37 +00:00
ff6f279adf
When a node value is only used by a CopyToReg, use the user's dest. This should not be restricted to nodes that produce only a single value.
...
llvm-svn: 38485
2007-07-10 07:08:32 +00:00
32aad49b24
Move DenseMapKeyInfo<SDOperand> from LegalizeDAG.cpp to SelectionDAGNodes.h
...
llvm-svn: 38484
2007-07-10 06:59:55 +00:00
2af3063337
Preserve volatililty and alignment information when lowering or
...
simplifying loads and stores.
llvm-svn: 38473
2007-07-09 22:18:38 +00:00
f8f531bf69
Change getCopyToParts and getCopyFromParts to always use target-endian
...
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.
llvm-svn: 38471
2007-07-09 20:59:04 +00:00
6decfbf133
Initialize the IndexedModeActions array with memset before
...
updating it with calls to setIndexedLoadAction/setIndexedStoreAction,
which only update a few bits at a time. This avoids ostensible
undefined behavior of operationg on values which may be
trap-representations, and as a practical matter fixes errors from
valgrind, which doesn't track uninitialized memory with bit
granularity.
llvm-svn: 38468
2007-07-09 20:49:44 +00:00
6caf8fdd04
Fix this warning:
...
DAGCombiner.cpp: In member function 'llvm::SDOperand<unnamed>::DAGCombiner::visitOR(llvm::SDNode*)':
DAGCombiner.cpp:1608: warning: passing negative value '-0x00000000000000001' for argument 1 to 'llvm::SDOperand llvm::SelectionDAG::getConstant(uint64_t, llvm::MVT::ValueType, bool)'
oiy.
llvm-svn: 38458
2007-07-09 16:16:34 +00:00
ef3d8362a3
fix typos
...
llvm-svn: 38453
2007-07-09 12:00:59 +00:00
96c1457bff
Teach if-conversion about instructions that were already predicated, e.g. conditional move.
...
llvm-svn: 37964
2007-07-06 23:24:39 +00:00
9d97420473
The exception handling intrinsics return values,
...
so must be lowered to a value, not nothing at all.
Subtle point: I made eh_selector return 0 and
eh_typeid_for return 1. This means that only
cleanups (destructors) will be run as the exception
unwinds [if eh_typeid_for returned 0 then it would
be as if the first catch always matched, and the
corresponding handler would be run], which is
probably want you want in the CBE.
llvm-svn: 37947
2007-07-06 14:46:23 +00:00
c5b1984f57
Indexes into the list of filter ids cannot be output
...
directly: they need to be turned into byte offsets
(often the same, but may not be if there are many
type infos).
llvm-svn: 37942
2007-07-06 12:46:24 +00:00
b567e3ffb0
Add the byval attribute
...
llvm-svn: 37940
2007-07-06 10:57:03 +00:00
003c0b1f90
Remove propagateEHRegister in favour of a more limited
...
fix, that is adequate while PR1508 remains unresolved.
llvm-svn: 37938
2007-07-06 09:18:59 +00:00
81df18a50a
Remove ExtractGlobalVariable - use StripPointerCasts
...
instead.
llvm-svn: 37937
2007-07-06 09:10:03 +00:00
fc7010d962
Workaround of getCopyToRegs and getCopyFromRegs bugs for big-endian machines.
...
llvm-svn: 37935
2007-07-06 01:47:35 +00:00
642be16bbf
Change CalculateHeights and CalculateDepths to be non-recursive.
...
llvm-svn: 37934
2007-07-06 01:37:28 +00:00
a282694acf
Make the debug string for ISD::MERGE_VALUES consistent with the others.
...
llvm-svn: 37922
2007-07-05 20:15:43 +00:00
d258e80583
Add a parameter to getCopyToParts and getCopyFromParts to specify whether
...
endian swapping should be done, and update the code to use it. This fixes
some register ordering issues on big-endian systems, such as PowerPC,
introduced by the recent illegal by-val arguments changes.
llvm-svn: 37921
2007-07-05 20:12:34 +00:00
e16561cd5d
Here is the bulk of the sanitizing.
...
Almost all occurrences of "bytecode" in the sources have been eliminated.
llvm-svn: 37913
2007-07-05 17:07:56 +00:00
4836e3a6f8
Make sure only one copy of a filter is placed in the
...
exception handling table if we encounter it multiple
times. Filters could be folded harder than this, but
that would mean a lot more work for not much gain.
llvm-svn: 37908
2007-07-05 15:15:01 +00:00
bb6ecf0067
Better assertion messages.
...
llvm-svn: 37890
2007-07-05 07:05:38 +00:00
fe80638417
Extend eh.selector to support both catches and filters.
...
Drop the eh.filter intrinsic.
llvm-svn: 37875
2007-07-04 20:52:51 +00:00
06563a8702
Fix several over-aggressive folds for undef nodes in dagcombine, to
...
follow the rules for undef used in instcombine.
llvm-svn: 37851
2007-07-03 14:03:57 +00:00
a2b3c175db
Fix for PR 1505 (and 1489). Rewrite X87 register
...
model to include f32 variants. Some factoring
improvments forthcoming.
llvm-svn: 37847
2007-07-03 00:53:03 +00:00
533dd16a7f
Replace ExpandScalarFormalArgs and ExpandScalarCallArgs with the newly
...
refactored getCopyFromParts and getCopyToParts, which are more general.
This effectively adds support for lowering illegal by-val vector call
arguments.
llvm-svn: 37843
2007-07-02 16:18:06 +00:00
9a70823375
Teach GetNegatedExpression to negate 0-B to B in UnsafeFPMath mode, and
...
visitFSUB to fold 0-B to -B in UnsafeFPMath mode. Also change visitFNEG
to use isNegatibleForFree/GetNegatedExpression instead of doing a subset
of the same thing manually.
This fixes test/CodeGen/X86/negative-sin.ll.
llvm-svn: 37842
2007-07-02 15:48:56 +00:00
fa68d069ad
Only do FNEG xform when the vector type is a floating point type.
...
llvm-svn: 37818
2007-06-29 21:44:35 +00:00
cf2a51e8db
Remove unused variables.
...
llvm-svn: 37816
2007-06-29 21:42:03 +00:00
9458e6a551
Fix a vector FP constant CSE bug.
...
llvm-svn: 37814
2007-06-29 21:36:04 +00:00
4c1e6f3804
Remove unnecessary attributions in comments.
...
llvm-svn: 37799
2007-06-29 03:42:23 +00:00
9468bfd932
Fix reference to cached end iterator invalidated by an erase operation.
...
Uncovered by _GLIBCXX_DEBUG.
llvm-svn: 37795
2007-06-29 02:49:11 +00:00
5b6f755575
Remove the "special tie breaker" because it resulted in inconsistent
...
ordering and thus violated the strict weak ordering requirement of
priority_queue. Uncovered by _GLIBCXX_DEBUG.
llvm-svn: 37794
2007-06-29 02:48:09 +00:00
451d1a6ecd
Fix misue of iterator pointing to erased object. Uncovered by
...
_GLIBCXX_DEBUG.
llvm-svn: 37793
2007-06-29 02:45:24 +00:00
0de7694de6
Fix an assertion failure in legalizing bitcast operators on targets where
...
vectors are split down to single elements as part of legalization.
llvm-svn: 37785
2007-06-29 00:09:08 +00:00
7867793aff
Add new TargetLowering code to provide the final register type that an
...
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.
Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.
llvm-svn: 37781
2007-06-28 23:29:44 +00:00
df0c705d7d
If a livein is not used in the block. It's live through.
...
llvm-svn: 37764
2007-06-27 18:47:28 +00:00
77f541ddfd
Partial fix for PR1502: If a EH register is needed in a successor of landing pad, add it as livein to all the blocks in the paths between the landing pad and the specified block.
...
llvm-svn: 37763
2007-06-27 18:45:32 +00:00
3b62d7265d
Rename ("shrinkify") MVT::isExtendedValueType to MVT::isExtendedVT.
...
llvm-svn: 37758
2007-06-27 16:08:04 +00:00
7139a48057
Use getVectorTypeBreakdown in FunctionLoweringInfo::CreateRegForValue
...
to compute the number and type of registers needed for vector values
instead of computing it manually. This fixes PR1529.
llvm-svn: 37755
2007-06-27 14:34:07 +00:00
f4e86da3a6
Make the comment for ScalarizeVectorOp mention that it is only for use
...
with single-element vectors.
llvm-svn: 37752
2007-06-27 14:06:22 +00:00
95759c0e78
ok, this is something of a dirty hack, but it seems to work. (fixes e.g.
...
the SPASS miscompilation)
llvm-svn: 37750
2007-06-27 09:01:14 +00:00
89183dcc14
ok, this much doesn't seem to bork anything
...
llvm-svn: 37749
2007-06-27 08:31:07 +00:00
a415dcaa2a
revert evan's fixes (and my doofusness) since they had a huge code
...
quality hit. will look at this soon.
llvm-svn: 37748
2007-06-27 08:11:59 +00:00
540d329542
pull evan's fixes - should help the nightly tester (but there are still
...
some issues)
llvm-svn: 37747
2007-06-27 07:07:13 +00:00
e66f822ecc
Replace std::set with SmallPtrSet.
...
llvm-svn: 37746
2007-06-27 05:23:00 +00:00
6cf1371456
Fix an obvious bug. Old code only worked for the entry block.
...
llvm-svn: 37743
2007-06-27 01:16:36 +00:00
4bf87f1f44
Correctly handle implcit def / use operands.
...
llvm-svn: 37740
2007-06-26 21:05:13 +00:00
d8417d9199
Properly handle kills of a physical register which has sub-registers that are read by later instructions.
...
llvm-svn: 37739
2007-06-26 21:03:35 +00:00
f4dc5b26e2
tidy this file up a bit
...
llvm-svn: 37725
2007-06-26 00:21:58 +00:00
77416383e8
A bunch of fixes to the BigBlock allocator improve compile-time by ~20%
...
and code quality by ~2% on my tests.
A big thank you to Roman Levenstein for this patch! See
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070618/050717.html
for more details.
llvm-svn: 37724
2007-06-25 23:46:54 +00:00
a866514528
Generalize MVT::ValueType and associated functions to be able to represent
...
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.
This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.
llvm-svn: 37719
2007-06-25 16:23:39 +00:00
309d3d51b3
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
...
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
llvm-svn: 37704
2007-06-22 14:59:07 +00:00
81a752aa95
check in the BigBlock local register allocator
...
llvm-svn: 37703
2007-06-22 08:27:12 +00:00
e3c4419953
std::set is really really terrible. Switch to SmallPtrSet to reduce compile time. For Duraid's example. The overall isel time is reduced from 0.6255 sec to 0.1876 sec.
...
llvm-svn: 37701
2007-06-22 01:35:51 +00:00
8e8d34b220
Tidy up ValueType names in comments.
...
llvm-svn: 37688
2007-06-21 14:48:26 +00:00
04deef3a49
Rename TargetLowering::getNumElements and friends to
...
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.
llvm-svn: 37687
2007-06-21 14:42:22 +00:00
aa5f5d960d
Xforms:
...
(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
(sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c))
llvm-svn: 37685
2007-06-21 07:39:16 +00:00
a955c02c9b
Avoid if-converting simple block that ends with unconditional branch or fallthrough unless it branches / falls to the 'false' block. Not profitable, may end up increasing code size.
...
llvm-svn: 37660
2007-06-19 21:45:13 +00:00
a7644dd9b9
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
...
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.
llvm-svn: 37656
2007-06-19 14:13:56 +00:00
37228f6ce5
document and hide two options.
...
llvm-svn: 37651
2007-06-19 05:47:49 +00:00
9e82064924
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
...
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
llvm-svn: 37644
2007-06-19 01:48:05 +00:00
a7ca624028
Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
...
llvm-svn: 37643
2007-06-19 01:26:51 +00:00
26be02febf
add isVarArg to CCState
...
llvm-svn: 37640
2007-06-19 00:11:09 +00:00
0598b2d5eb
Fix some fragile code wrt CFG edge updating.
...
llvm-svn: 37634
2007-06-18 22:44:57 +00:00
2afd702c20
Move CorrectExtraCFGEdges() from BranchFolding.cpp to a MachineBasicBlock method.
...
llvm-svn: 37633
2007-06-18 22:43:58 +00:00
e31adc8ab9
make ComputeTopDownOrdering significantly faster and use less stack space
...
by making it non-recursive
llvm-svn: 37629
2007-06-18 21:28:10 +00:00
8c7333266c
Make chain dependencies blue, in addition to being dashed.
...
llvm-svn: 37626
2007-06-18 15:30:16 +00:00
51eb2c3bbe
Properly remove duplicate instructions as result of diamond if-conversion. Other bug fixes.
...
llvm-svn: 37623
2007-06-18 08:37:25 +00:00
3a51c854d0
Really turn if-converter loose:
...
1. Consider all possible ifcvt cases at once. No longer restricted to bottom
up iterative approach.
2. Sort all possible cases based on a cost function. Perform the most profitable
ones first invalidate others that target the same blocks.
3. Fixed a number of bugs related to block duplication.
llvm-svn: 37613
2007-06-16 09:34:52 +00:00
e199f97fa8
Codegen support (stripped out) for the annotate attribute.
...
llvm-svn: 37608
2007-06-15 22:26:58 +00:00
23402fcaef
Not every predicable block can be safely duplicated.
...
llvm-svn: 37607
2007-06-15 21:18:05 +00:00
f852e339b6
Fix CodeGen/X86/inline-asm-x-scalar.ll:test4, by retaining regclass info
...
for tied register constraints.
llvm-svn: 37601
2007-06-15 19:11:01 +00:00
234a90e83e
MachineInstr::isPredicable() is no longer needed.
...
llvm-svn: 37599
2007-06-15 19:06:07 +00:00
92bf2c628c
Workaround for PR1508.
...
llvm-svn: 37597
2007-06-15 19:04:19 +00:00
cd5f5e3ecd
Extra edges are deleted later if needed.
...
llvm-svn: 37593
2007-06-15 17:34:48 +00:00
92fb5453c3
Allow small blocks to be duplicated to enable if-conversion.
...
llvm-svn: 37590
2007-06-15 07:36:12 +00:00
add977670f
No really, clear predcessors states.
...
llvm-svn: 37581
2007-06-14 23:34:09 +00:00
9fc56c079d
If BB is predicated, invalidate its predecessor(s) which would if-convert it. It needs to be re-analyzed.
...
llvm-svn: 37580
2007-06-14 23:13:19 +00:00
5c4413120f
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
...
llvm-svn: 37579
2007-06-14 22:58:02 +00:00
e08f0eefa6
Fix typo.
...
llvm-svn: 37577
2007-06-14 21:26:08 +00:00
4a4a8eb00e
Add a target hook to allow loads from constant pools to be rematerialized, and an
...
implementation for x86.
llvm-svn: 37576
2007-06-14 20:50:44 +00:00
1e6f08b2a2
Fix some stupid bugs that have effectively disabled if-conversion.
...
llvm-svn: 37575
2007-06-14 20:28:52 +00:00
7413736a7e
Only correctly lower exception handing intrinsics if exception handling is
...
turned on. Likewise for scanning of invokes to mark landing pads.
llvm-svn: 37570
2007-06-13 16:53:21 +00:00
26455c4ae0
Introduce new SelectionDAG node opcodes VEXTRACT_SUBVECTOR and
...
VCONCAT_VECTORS. Use these for CopyToReg and CopyFromReg legalizing in
the case that the full register is to be split into subvectors instead
of scalars. This replaces uses of VBIT_CONVERT to present values as
vector-of-vector types in order to make whole subvectors accessible via
BUILD_VECTOR and EXTRACT_VECTOR_ELT.
This is in preparation for adding extended ValueType values, where
having vector-of-vector types is undesirable.
llvm-svn: 37569
2007-06-13 15:12:02 +00:00
cbd51c8b60
When creating CopyFromReg nodes, always use legal types. And use the
...
correct types for the result vector, even though it is currently bitcasted
to a different type immediately.
llvm-svn: 37568
2007-06-13 14:55:16 +00:00
97f7236e70
The fix that was applied for PR1224 stops the compiler
...
crashing but breaks exception handling. The problem
described in PR1224 is that invoke is a terminator that
can produce a value. The value may be needed in other
blocks. The code that writes to registers values needed
in other blocks runs before terminators are lowered (in
this case invoke) so asserted because the value was not
yet available. The fix that was applied was to do invoke
lowering earlier, before writing values to registers.
The problem this causes is that the code to copy values
to registers can be output after the invoke call. If
an exception is raised and control is passed to the
landing pad then this copy-code will never execute. If
the value is needed in some code path reached via the
landing pad then that code will get something bogus.
So revert the original fix and simply skip invoke values
in the general copying to registers code. Instead copy
the invoke value to a register in the invoke lowering code.
llvm-svn: 37567
2007-06-13 05:51:31 +00:00
cbaaff58bf
Typo
...
llvm-svn: 37566
2007-06-13 00:04:00 +00:00
9acfa7b063
Now if-converting all 4 variants of triangles.
...
llvm-svn: 37565
2007-06-12 23:54:05 +00:00
4c2f003971
Fix a typo in bswap lowering.
...
llvm-svn: 37544
2007-06-11 23:16:16 +00:00
4dd31a7b1b
Restructure code to reduce ifcvt compile time cost.
...
llvm-svn: 37543
2007-06-11 22:26:22 +00:00
14b62a553e
Fix the build.
...
llvm-svn: 37537
2007-06-10 00:19:17 +00:00
2117d1f20e
Don't change CFG during analysis stage. Do so during ifcvt and invalidate predecessors accordingly.
...
llvm-svn: 37531
2007-06-09 01:03:43 +00:00
288f1545a6
Carefully remove extraneous CFG edges after each ifcvt.
...
llvm-svn: 37529
2007-06-08 22:01:07 +00:00
df1a42935b
Correct transfer predicate information.
...
llvm-svn: 37524
2007-06-08 19:17:12 +00:00
e93ccc013f
Hidden options to help debugging ifcvt issues.
...
llvm-svn: 37523
2007-06-08 19:10:51 +00:00
02f6e9b621
Factor live variable analysis so it does not do register coalescing
...
simultaneously. Move that pass to SimpleRegisterCoalescing.
This makes it easier to implement alternative register allocation and
coalescing strategies while maintaining reuse of the existing live
interval analysis.
llvm-svn: 37520
2007-06-08 17:18:56 +00:00
7783f82e21
Allow more cmp / bcc to be predicated; clean up triangle ifcvt checking code.
...
llvm-svn: 37518
2007-06-08 09:36:04 +00:00
dc8fc1550e
Use more realistically sized vectors. Reserve capacity if we know in advance
...
how much will be used.
llvm-svn: 37515
2007-06-08 08:59:11 +00:00
86798e5e11
Make throttle a hidden parameter, per review.
...
llvm-svn: 37511
2007-06-08 01:08:52 +00:00
52fcf022f7
Throttle tail merging; handling blocks with large numbers of predecessors
...
is too slow.
llvm-svn: 37509
2007-06-08 00:34:27 +00:00
1236ef7bcc
Only remove the edge from entry to false if false block is merged.
...
llvm-svn: 37503
2007-06-07 22:31:28 +00:00
9a4d987a5f
Do not change the size of function arguments. PR 1489.
...
llvm-svn: 37496
2007-06-07 21:07:15 +00:00
d3f3f0adad
ifcvt a triangle: don't merge ifcvt block with rejoin block if it can fall through to it. If merged, the resulting block is not a candidate for iterative ifcvting since it contains both predicated and non-predicated code.
...
llvm-svn: 37487
2007-06-07 08:13:00 +00:00
be9859eea2
Lots of bug fixes. Now finally in a reasonable state.
...
llvm-svn: 37485
2007-06-07 02:12:15 +00:00
cfb6f40424
Quick patch to fix the build, based on what it appears Evan meant to write.
...
Evan, please check that this is in fact correct.
llvm-svn: 37471
2007-06-06 16:22:00 +00:00
29d1dc6f1a
Fold the exception actions table harder: if two typeid lists start the
...
same, only output one copy of the common part.
llvm-svn: 37470
2007-06-06 15:37:31 +00:00
9030b98aca
Lots of bug fixes.
...
llvm-svn: 37467
2007-06-06 10:16:17 +00:00
61166501a1
Additional fix for PR1422: make sure the landing pad label is placed in the
...
correct machine basic block - do not rely on the eh.exception intrinsic
being in the landing pad: the loop optimizers can move it out.
llvm-svn: 37463
2007-06-06 10:05:18 +00:00
e4ec918be0
If a unconditional branch is added to branch to the false path during ifcvt, the predicated block cannot be iteratively ifcvted.
...
llvm-svn: 37456
2007-06-06 02:08:52 +00:00
b30a89457c
Minor statistics counting bug.
...
llvm-svn: 37451
2007-06-06 01:12:44 +00:00
30565998bb
Fix a couple of typos and be smarter about order of blocks when ifcvt a diamond.
...
llvm-svn: 37449
2007-06-06 00:57:55 +00:00
7948422b78
Fix diamond shape ifcvt bugs.
...
llvm-svn: 37444
2007-06-05 23:46:14 +00:00
c1a0b8ce1d
ReplaceUsesOfBlockWith() can modify the predecessors list.
...
llvm-svn: 37441
2007-06-05 22:03:53 +00:00
3e5bf0827c
Do not ifcvt if either true / false path is a backedge. Not profitable in almost all cases.
...
llvm-svn: 37440
2007-06-05 20:38:42 +00:00
2c1acd6d9e
I had a senior moment.
...
llvm-svn: 37433
2007-06-05 07:05:25 +00:00
6e4babe8cc
If the predicated block requires an early exit, end the block there and add a unconditional branch to false block. AnalyzeBranch() does not understand early exits.
...
llvm-svn: 37430
2007-06-05 01:31:40 +00:00
17aad8164e
Fix some subtle bugs: bug during succeessor copying; incorrectly updating states of ifcvted blocks.
...
llvm-svn: 37429
2007-06-05 00:07:37 +00:00
0558dda319
Tail merging wasn't working for predecessors of landing pads. PR 1496.
...
llvm-svn: 37427
2007-06-04 23:52:54 +00:00
53ce7de03b
Global ctors / dtors alignment shouldn't be hard-coded at 4. e.g. It could be 8 for 64-bit targets.
...
llvm-svn: 37421
2007-06-04 20:39:18 +00:00
91233153bf
Forgot to check for if iterator reached the end.
...
llvm-svn: 37420
2007-06-04 20:33:36 +00:00
b4c2690446
Pass the DAG to SDNode::dump to let it do more detailed dumps in some cases.
...
llvm-svn: 37413
2007-06-04 16:17:33 +00:00
92a7f3a65e
Resolve implicit alignment before computing the FoldingSet information so
...
that the CSE map always contains explicit alignment information. This allows
more loads to be CSE'd when there is a mix of explicit-alignment loads and
implicit-alignment loads.
Also, in SelectionDAG::FindModifiedNodeSlot, add the operands to the
FoldingSetNodeID before the load/store information instead of after, so
that it matches what is done elsewhere.
llvm-svn: 37411
2007-06-04 15:49:41 +00:00
312b723af2
Let IfConverter loose. Allow more aggressive subsumptions; reorder basic blocks to expose more ifcvt opportunities; code clean up and fixes.
...
llvm-svn: 37409
2007-06-04 06:47:22 +00:00
df75785594
Move ReplaceUsesOfBlockWith() out of BranchFolding into a MachineBasicBlock general facility.
...
llvm-svn: 37408
2007-06-04 06:44:01 +00:00
f708f73a1b
The semantics of invoke require that we always jump to the unwind block
...
(landing pad) when an exception unwinds through the call. This doesn't
quite match the way the dwarf unwinder works: by default it only jumps to
the landing pad if the catch or filter specification matches, and otherwise
it keeps on unwinding. There are two ways of specifying to the unwinder
that it should "always" (more on why there are quotes here later) jump to
the landing pad: follow the specification by a 0 typeid, or follow it by
the typeid for the NULL typeinfo. GCC does the first, and this patch makes
LLVM do the same as gcc. However there is a problem: the unwinder performs
optimizations based on C++ semantics (it only expects destructors to be
run if the 0 typeid fires - known as "cleanups"), meaning it assumes that no
exceptions will be raised and that the raised exception will be reraised
at the end of the cleanup code. So if someone writes their own LLVM code
using the exception intrinsics they will get a nasty surprise if they don't
follow these rules. The other possibility of using the typeid corresponding
to NULL (catch-all) causes the unwinder to make no assumptions, so this is
probably what we should use in the long-run. However since we are still
having trouble getting exception handling working properly, for the moment
it seems best to closely imitate GCC.
llvm-svn: 37399
2007-06-02 17:16:06 +00:00
c063f5f362
Integrate exception filter support and exception catch support. This
...
simplifies the code in DwarfWriter, allows for multiple filters and
makes it trivial to specify filters accompanied by cleanups or catch-all
specifications (see next patch). What a deal! Patch blessed by Anton.
llvm-svn: 37398
2007-06-02 16:53:42 +00:00
0a0ae932ca
Make LowerCTPOP() support arbitrary bitwidth integer type.
...
llvm-svn: 37397
2007-06-02 04:10:33 +00:00
6e7cdce773
Fix CorrectExtraCFGEdges to allow for multiple LandingPad targets.
...
llvm-svn: 37394
2007-06-02 00:08:15 +00:00
9746e3a22b
Fancier algorithm in tail-merge comment implemented, so remove comment.
...
llvm-svn: 37393
2007-06-01 23:04:28 +00:00
3c0a13762d
Implement smarter algorithm for choosing which blocks to tail-merge.
...
See test/CodeGen/X86/test-pic-jtbl.ll for a case where it works well;
shaves another 10K off our favorite benchmark. I was hesitant about
this because of compile speed, but seems to do OK on a bootstrap.
llvm-svn: 37392
2007-06-01 23:02:45 +00:00
4dcf1e8582
Correctly mark early-exit on the false path.
...
llvm-svn: 37387
2007-06-01 20:29:21 +00:00
706421e712
Since TypeInfos are passed as i8 pointers, a NULL TypeInfo should be passed
...
as a null i8 pointer not as a 0 i32.
llvm-svn: 37383
2007-06-01 08:18:30 +00:00
6a2cf070cc
Ifcvt triangle: don't ifcvt 'true' BB if it has other predecessors; don't merge 'false' BB if it has other predecessors.
...
llvm-svn: 37382
2007-06-01 07:41:07 +00:00
95c7917d92
Remove a bogus check. Even terminators in a ifcvt need to be predicated. Unconditional branches can usually be converted to conditional ones.
...
llvm-svn: 37380
2007-06-01 00:55:26 +00:00
20e05997f5
Allow multiple ifcvt candidates to share children blocks; add some debugging code.
...
llvm-svn: 37379
2007-06-01 00:12:12 +00:00
1a401e68a8
Arrange for only 1 of multiple branches to landing pad to be kept.
...
Do not remove empty landing pads (EH table needs to be updated)
llvm-svn: 37375
2007-05-31 21:54:00 +00:00
e6ccb6c5ed
Fix a typo.
...
llvm-svn: 37374
2007-05-31 20:53:33 +00:00
3e3ff30aa2
Fix the asmprinter so that a globalvalue can specify an explicit alignment
...
smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed. This fixes some objc protocol
failures Devang tracked down.
llvm-svn: 37373
2007-05-31 18:57:45 +00:00
5b0757a401
Fix PR1424.
...
When a function has FP, the register scavenging spill slot offset already
was calculated.
llvm-svn: 37371
2007-05-31 18:27:58 +00:00
905a8f4940
Change traversal order to bottom up in preparation for more aggressive if-conversion.
...
llvm-svn: 37365
2007-05-30 19:49:19 +00:00
397c4d9ef6
Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473.
...
llvm-svn: 37362
2007-05-30 16:30:06 +00:00
d14ad078c6
Changed per review comment.
...
llvm-svn: 37355
2007-05-30 00:32:01 +00:00
a69ebdbebc
Make stable_sort in tail merging actually be stable (it never was, but didn't
...
matter until my last change). Reenable tail merging by default.
llvm-svn: 37354
2007-05-29 23:47:50 +00:00
20f7d30f92
Don't merge in tail block of a diamond if it has more than one predecessors after if-conversion.
...
llvm-svn: 37353
2007-05-29 23:37:20 +00:00
c2237ce217
If there is an empty block between a source and its successor block, it still requires a unconditional branch.
...
llvm-svn: 37344
2007-05-29 22:31:16 +00:00
5983bdbb2c
Add missing const qualifiers.
...
llvm-svn: 37341
2007-05-29 18:35:22 +00:00
d7dc1ed64c
Correct the logic in LowerPartSet which cleared the bits from 0 to low-1.
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llvm-svn: 37331
2007-05-26 03:43:13 +00:00
4698083b96
tighten up recursion depth again
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llvm-svn: 37330
2007-05-25 02:19:06 +00:00
13f5f7df95
Silly boog.
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llvm-svn: 37328
2007-05-25 00:59:01 +00:00
1409b6a59b
Blocks that cond-br and uncond-br/fallthrough to same block should have
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only one successor.
llvm-svn: 37324
2007-05-24 18:31:55 +00:00
1af8c870c7
Fix for PR1444: do not create two successors to the same block.
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Temporarily, this breaks CodeGen/Generic/2006-02-12-InsertLibraryCall.ll
by exposing an unrelated latent problem; working on that.
llvm-svn: 37323
2007-05-24 17:39:32 +00:00
30978078bf
Minor comment cleanups.
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llvm-svn: 37321
2007-05-24 14:36:04 +00:00
703e0f8608
Add explicit qualification for namespace MVT members.
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llvm-svn: 37320
2007-05-24 14:33:05 +00:00
a4d187b8ce
Fix a typo that caused combiner to create mal-formed pre-indexed store where value store is the same as the base pointer.
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llvm-svn: 37318
2007-05-24 02:35:39 +00:00
f4a77d2481
Two tail merging improvements:
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When considering blocks with more than 2 predecessors, merge the block with
the largest number of matching insns, rather than the first block found.
Considering that 1 matching insn is enough to show a win for candidates that
already end with a branch.
llvm-svn: 37315
2007-05-23 21:07:20 +00:00
3b327826db
Mark all calls as "could throw", when exceptions are enabled. Emit necessary LP info too. This fixes PR1439
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llvm-svn: 37311
2007-05-23 11:08:31 +00:00
6509c0673f
prevent exponential recursion in isNegatibleForFree
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llvm-svn: 37310
2007-05-23 07:35:22 +00:00
d0e669199b
Preliminary iterative if-conversion support.
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llvm-svn: 37309
2007-05-23 07:23:16 +00:00
f9cbdc676c
name change requested by review of previous patch
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llvm-svn: 37289
2007-05-22 18:31:04 +00:00
0ae7eb5e7c
Silence a warning.
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llvm-svn: 37288
2007-05-22 18:13:40 +00:00
82810c8a13
Make tail merging the default, except on powerPC. There was no prior art
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for a target-dependent default with a command-line override; this way
should be generally usable.
llvm-svn: 37285
2007-05-22 17:14:46 +00:00
e26c0916a3
If-convert early exit blocks (returns, etc.); bug fixes, etc.
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llvm-svn: 37270
2007-05-21 22:22:58 +00:00
34e82a4508
Only emit one entry in the exception action table for each action, even if
...
it occurs for multiple landing pads.
llvm-svn: 37267
2007-05-21 18:50:28 +00:00
1fa8276e70
same patch as the previous one, but the symmetric case
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llvm-svn: 37249
2007-05-19 00:46:51 +00:00
b08cbbd737
Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (in
...
this case, the xform introduces an extra operation). This compiles
PowerPC/compare-duplicate.ll into:
_test:
subf r2, r3, r4
cmplw cr0, r2, r3
bne cr0, LBB1_2 ;F
instead of:
_test:
slwi r2, r3, 1
subf r3, r3, r4
cmplw cr0, r4, r2
bne cr0, LBB1_2 ;F
This is target independent of course.
llvm-svn: 37246
2007-05-19 00:43:44 +00:00
018cffbca4
Clean up.
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llvm-svn: 37237
2007-05-18 19:32:08 +00:00
faaf716540
Change to depth-first traversal.
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llvm-svn: 37236
2007-05-18 19:26:33 +00:00
dafda82755
Document an inefficiency in tail merging.
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llvm-svn: 37235
2007-05-18 18:46:40 +00:00
b539df3389
Qualify calls to getTypeForValueType with MVT:: too.
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llvm-svn: 37233
2007-05-18 18:41:29 +00:00
2e82cefd24
Some restructuring in preparation for most aggressive if-conversion.
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llvm-svn: 37231
2007-05-18 18:14:37 +00:00
1796f1f8e9
Qualify several calls to functions in the MVT namespace, for consistency.
...
llvm-svn: 37230
2007-05-18 17:52:13 +00:00
f25d3a5d73
Watch out for blocks that end with a return.
...
llvm-svn: 37227
2007-05-18 17:06:53 +00:00
478b805956
If true / false blocks fallthrough before ifcvt, add unconditional branches to ifcvt'd block.
...
llvm-svn: 37200
2007-05-18 01:55:58 +00:00
f8956178af
Remove some unneeded branches. (spotted by Evan, thanks)
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llvm-svn: 37198
2007-05-18 01:28:58 +00:00
0f745da4fe
Make use of target specific block size limits; bug fixes.
...
llvm-svn: 37195
2007-05-18 00:20:58 +00:00
a92b2b38ff
Move isSuccessor() offline, change it to use std::find.
...
llvm-svn: 37190
2007-05-17 23:58:53 +00:00
0184f88deb
disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for
...
i128 integers. The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.
llvm-svn: 37169
2007-05-17 18:19:23 +00:00
2135bc08d6
add expand support for ADDC/SUBC/ADDE/SUBE so we can codegen 128-bit add/sub on 32-bit (or less) targets
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llvm-svn: 37168
2007-05-17 18:15:41 +00:00
429178d727
Add target hook to specify block size limit for if-conversion.
...
llvm-svn: 37134
2007-05-16 23:45:53 +00:00
7a6c175e7a
Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores.
...
llvm-svn: 37130
2007-05-16 22:45:30 +00:00
af71610429
isBlockPredicable() always ignore terminal instructions; add comments.
...
llvm-svn: 37126
2007-05-16 21:54:37 +00:00
5ea933a009
Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr.
...
llvm-svn: 37121
2007-05-16 20:56:08 +00:00
59ae77486c
Output exception call-sites in address order, as required by the unwinding
...
runtime.
llvm-svn: 37104
2007-05-16 12:12:23 +00:00
48fb92f75d
Use a ptr set instead of a linear search to unique TokenFactor operands.
...
This fixes PR1423
llvm-svn: 37102
2007-05-16 06:37:59 +00:00
35fc2119b0
Devang points out that we need an assertion here.
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llvm-svn: 37097
2007-05-16 05:11:10 +00:00
288f133c71
Bug fix: should check ABI alignment, not pref. alignment.
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llvm-svn: 37094
2007-05-16 02:04:50 +00:00
f5e53a58db
Initial commit of (very basic) if converter.
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llvm-svn: 37092
2007-05-16 02:00:57 +00:00
420a85d0cf
Remove extra CFG edges before doing these passes; it makes them happier.
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llvm-svn: 37089
2007-05-15 21:19:17 +00:00
3f142cbca2
Fix an infinite recursion in GetNegatedExpression.
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llvm-svn: 37086
2007-05-15 17:05:43 +00:00
750e8c5d4d
The index into the actions table is a ULEB128 not a SLEB128.
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llvm-svn: 37084
2007-05-15 13:54:14 +00:00
daed139420
Un-brain-dead-ify the lowering of part set for the reverse case.
...
llvm-svn: 37071
2007-05-15 02:26:52 +00:00
c7596efdad
Fix some subtle issues handling immediate values. This fixes
...
test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
llvm-svn: 37069
2007-05-15 01:33:58 +00:00
4d728b0419
Added getNumExplicitOperands and findFirstPredOperand.
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llvm-svn: 37064
2007-05-15 01:26:09 +00:00
e49c974a7c
implement a simple fneg optimization/propagation thing. This compiles:
...
CodeGen/PowerPC/fneg.ll into:
_t4:
fmul f0, f3, f4
fmadd f1, f1, f2, f0
blr
instead of:
_t4:
fneg f0, f3
fmul f0, f0, f4
fmsub f1, f1, f2, f0
blr
llvm-svn: 37054
2007-05-14 22:04:50 +00:00
e1595b6859
Only worry about intervening kill if there are more than one live ranges in the interval.
...
llvm-svn: 37052
2007-05-14 21:23:51 +00:00
c690cba7d9
Fix for PR1406:
...
v1 =
r2 = move v1
= op r2<kill>
...
r2 = move v1
= op r2<kill>
Clear the first r2 kill if v1 and r2 are joined.
llvm-svn: 37050
2007-05-14 21:10:05 +00:00
fc2377d4ed
When marking a register as being implicitly defined, make sure to clear its partial use info as well.
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llvm-svn: 37046
2007-05-14 20:39:18 +00:00
764ae2a21b
Give names to the final result values of the part_set computations. This
...
just aids in readability and debugability of the output. No functional change.
llvm-svn: 37037
2007-05-14 17:21:17 +00:00
1ee0c8d563
Emit function debug frames in one atom. This will prevent us from generating incorrect assembler in case of both
...
debug information & exception information presented.
llvm-svn: 37019
2007-05-13 17:30:11 +00:00
bbaf55448b
Emit multiple common EH frames for multiple (including blank) personality
...
functions. This partly fixes PR1414: now we're restricted only to one
personality function per eh frame, not per module. Further work on
"multiple personalities" topic needs representative example.
llvm-svn: 37018
2007-05-13 15:42:26 +00:00
13da17843c
More DWARF-related things cleanup:
...
1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.
llvm-svn: 37015
2007-05-12 22:36:25 +00:00
bf283708f7
Get the size of auto arrays right, regardless of its changing size.
...
llvm-svn: 37006
2007-05-12 11:07:40 +00:00
79a71ec3ad
Fix http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070507/049516.html
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llvm-svn: 36998
2007-05-11 23:14:43 +00:00
67286b1266
Perform correct actions numbers/sizes computation
...
llvm-svn: 36988
2007-05-11 08:47:35 +00:00
00d02442b0
Fix action No calculation in multiple-invoke-one-LP mode
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llvm-svn: 36987
2007-05-11 08:23:57 +00:00
cc8f571bc8
Do not generate branches to entry block. This fixes several test suite
...
failures on PPC (can happen only when prologue code is null)
llvm-svn: 36979
2007-05-10 23:59:23 +00:00
ee02c7d2fb
Ooops. Some debugging stuff :)
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llvm-svn: 36978
2007-05-10 22:38:46 +00:00
96142de3f0
Allow multiple invokes per landing pad. This (probably) fixes PR1410.
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llvm-svn: 36977
2007-05-10 22:34:59 +00:00
Chris Lattner