Commit Graph

4185 Commits

Author SHA1 Message Date
Duncan Sands d9834b29dd If the value types are equal then this routine
asserts in later checks rather than producing
the ordinary load it is supposed to.  Avoid all
such hassles by directly returning an ordinary
load in this case.

llvm-svn: 43174
2007-10-19 13:05:40 +00:00
Rafael Espindola 846c19dd70 Add support for byval function whose argument is not 32 bit aligned.
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset.  I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)

llvm-svn: 43172
2007-10-19 10:41:11 +00:00
Chris Lattner e5a6448533 Implement a few new operations.
llvm-svn: 43171
2007-10-19 04:46:45 +00:00
Chris Lattner e31365eecc Implement expansion of SINT_TO_FP and UINT_TO_FP operands.
llvm-svn: 43170
2007-10-19 04:32:47 +00:00
Chris Lattner 9081d08083 implement support for custom expansion of any node type, in one place.
llvm-svn: 43169
2007-10-19 04:14:36 +00:00
Chris Lattner d01b8ea4a5 Make use of TLI.ExpandOperation, remove softfloat stuff.
llvm-svn: 43167
2007-10-19 03:58:25 +00:00
Chris Lattner 3c7ee41c78 add expand support for bit_convert result, even allowing custom expansion.
llvm-svn: 43166
2007-10-19 03:33:14 +00:00
Chris Lattner 579db81f1c add a new target hook.
llvm-svn: 43165
2007-10-19 03:31:45 +00:00
Bill Wendling de16ad1446 Negative indices aren't allowed here.
llvm-svn: 43161
2007-10-19 01:10:49 +00:00
Dale Johannesen 10432e5a67 More ppcf128 issues (maybe the last)?
llvm-svn: 43160
2007-10-19 00:59:18 +00:00
Bill Wendling 070aca5d25 Pointer arithmetic should be done with the index the same size as the pointer.
llvm-svn: 43120
2007-10-18 08:32:37 +00:00
Duncan Sands cb7aca0dcb Support for ADDC/SUBC.
llvm-svn: 43119
2007-10-18 08:22:16 +00:00
Evan Cheng e6a41c066a Really fix PR1734. Carefully track which register uses are sub-register uses by
traversing inverse register coalescing map.

llvm-svn: 43118
2007-10-18 07:49:59 +00:00
Dan Gohman 8f518b9875 Add support for ISD::SELECT in SplitVectorOp.
llvm-svn: 43072
2007-10-17 14:48:28 +00:00
Duncan Sands d42c812f4a Return Expand from getOperationAction for all extended
types.  This is needed for SIGN_EXTEND_INREG at least.
It is not clear if this is correct for other operations.
On the other hand, for the various load/store actions
it seems to correct to return the type action, as is
currently done.
Also, it seems that SelectionDAG::getValueType can be
called for extended value types; introduce a map for
holding these, since we don't really want to extend
the vector to be 2^32 pointers long!
Generalize DAGTypeLegalizer::PromoteResult_TRUNCATE
and DAGTypeLegalizer::PromoteResult_INT_EXTEND to handle
the various funky possibilities that apints introduce,
for example that you can promote to a type that needs
to be expanded.

llvm-svn: 43071
2007-10-17 13:49:58 +00:00
Evan Cheng 0dde6e5761 Apply Chris' suggestions.
llvm-svn: 43069
2007-10-17 06:53:44 +00:00
Evan Cheng c8b5397000 One more extract_subreg coalescing bug fix.
llvm-svn: 43065
2007-10-17 05:29:37 +00:00
Evan Cheng 9b0a44a2ce Fix MergeValueInAsValue(). It allows overlapping live ranges but should replace
their value numbers with the specified value number.

llvm-svn: 43062
2007-10-17 02:13:29 +00:00
Evan Cheng a6fd8bc97e Clean up code that calculate MBB live-in's.
llvm-svn: 43061
2007-10-17 02:12:22 +00:00
Evan Cheng 8b8c7c9927 Clean up code that calculate MBB live-in's.
llvm-svn: 43060
2007-10-17 02:10:22 +00:00
Dale Johannesen e5facd51cb Disable attempts to constant fold PPC f128.
Remove the assumption that this will happen from
various places.

llvm-svn: 43053
2007-10-16 23:38:29 +00:00
Evan Cheng 8f644cef0f Some clean up.
llvm-svn: 43043
2007-10-16 21:09:14 +00:00
Evan Cheng fab7ca89d5 Fix PR1734.
llvm-svn: 43035
2007-10-16 19:29:47 +00:00
Duncan Sands bbbfbe95f7 Initial infrastructure for arbitrary precision integer
codegen support.  This should have no effect on codegen
for other types.  Debatable bits: (1) the use (abuse?)
of a set in SDNode::getValueTypeList; (2) the length of
getTypeToTransformTo, which maybe should be refactored
with a non-inline part for extended value types.

llvm-svn: 43030
2007-10-16 09:56:48 +00:00
Duncan Sands 052c843559 Fixes due to lack of type-safety for ValueType: (1) ValueType
being passed instead of an opcode; (2) ValueType being passed
for isVolatile (!) in getLoad.

llvm-svn: 43028
2007-10-16 09:07:20 +00:00
Evan Cheng ecf62cb763 Code clean up.
llvm-svn: 43026
2007-10-16 08:04:24 +00:00
Chris Lattner cece03dd89 implement promotion of select and select_cc, allowing MallocBench/gs to
work with type promotion on x86.

llvm-svn: 43025
2007-10-16 03:00:22 +00:00
Dan Gohman 9aa4fc5cd6 Teach IntrinsicLowering.cpp about the sin, cos, and pow intrinsics.
llvm-svn: 43020
2007-10-15 22:07:31 +00:00
Evan Cheng 04c44712d3 Make CalcLatency() non-recursive.
llvm-svn: 43017
2007-10-15 21:33:22 +00:00
Evan Cheng a5abba65b6 Fix PR1729: watch out for val# with no def.
llvm-svn: 42996
2007-10-15 18:33:50 +00:00
Chris Lattner d6f7d44eae Move CreateStackTemporary out to SelectionDAG
llvm-svn: 42995
2007-10-15 17:48:57 +00:00
Chris Lattner 9eb7a829e6 add a new CreateStackTemporary helper method.
llvm-svn: 42994
2007-10-15 17:47:20 +00:00
Chris Lattner 9d5b131e70 implement promotion of BR_CC operands, fixing bisort on ppc.
llvm-svn: 42992
2007-10-15 17:16:12 +00:00
Chris Lattner 8555e69def updates from duncan
llvm-svn: 42991
2007-10-15 16:46:29 +00:00
Duncan Sands f6977d9842 Fix some typos. Call getTypeToTransformTo rather than
getTypeToExpandTo.  The difference is that
getTypeToExpandTo gives the final result of expansion
(eg: i128 -> i32 on a 32 bit machine) while
getTypeToTransformTo does just one step (i128 -> i64).

llvm-svn: 42982
2007-10-15 13:30:18 +00:00
Chris Lattner 3cfb56d489 One mundane change: Change ReplaceAllUsesOfValueWith to *optionally*
take a deleted nodes vector, instead of requiring it.

One more significant change:  Implement the start of a legalizer that
just works on types.  This legalizer is designed to run before the 
operation legalizer and ensure just that the input dag is transformed
into an output dag whose operand and result types are all legal, even
if the operations on those types are not.

This design/impl has the following advantages:

1. When finished, this will *significantly* reduce the amount of code in
   LegalizeDAG.cpp.  It will remove all the code related to promotion and
   expansion as well as splitting and scalarizing vectors.
2. The new code is very simple, idiomatic, and modular: unlike 
   LegalizeDAG.cpp, it has no 3000 line long functions. :)
3. The implementation is completely iterative instead of recursive, good
   for hacking on large dags without blowing out your stack.
4. The implementation updates nodes in place when possible instead of 
   deallocating and reallocating the entire graph that points to some 
   mutated node.
5. The code nicely separates out handling of operations with invalid 
   results from operations with invalid operands, making some cases
   simpler and easier to understand.
6. The new -debug-only=legalize-types option is very very handy :), 
   allowing you to easily understand what legalize types is doing.

This is not yet done.  Until the ifdef added to SelectionDAGISel.cpp is
enabled, this does nothing.  However, this code is sufficient to legalize
all of the code in 186.crafty, olden and freebench on an x86 machine.  The
biggest issues are:

1. Vectors aren't implemented at all yet
2. SoftFP is a mess, I need to talk to Evan about it.
3. No lowering to libcalls is implemented yet.
4. Various operations are missing etc.
5. There are FIXME's for stuff I hax0r'd out, like softfp.

Hey, at least it is a step in the right direction :).  If you'd like to help,
just enable the #ifdef in SelectionDAGISel.cpp and compile code with it.  If
this explodes it will tell you what needs to be implemented.  Help is 
certainly appreciated.

Once this goes in, we can do three things:

1. Add a new pass of dag combine between the "type legalizer" and "operation
   legalizer" passes.  This will let us catch some long-standing isel issues
   that we miss because operation legalization often obfuscates the dag with
   target-specific nodes.
2. We can rip out all of the type legalization code from LegalizeDAG.cpp,
   making it much smaller and simpler.  When that happens we can then 
   reimplement the core functionality left in it in a much more efficient and
   non-recursive way.
3. Once the whole legalizer is non-recursive, we can implement whole-function
   selectiondags maybe...

llvm-svn: 42981
2007-10-15 06:10:22 +00:00
Chris Lattner b193517eed One xform performed by LegalizeDAG is transformation of "store of fp" to "store of int".
Make two changes:
1) only xform "store of f32" if i32 is a legal type for the target.
2) only xform "store of f64" if either i64 or i32 are legal for the target.
3) if i64 isn't legal, manually lower to 2 stores of i32 instead of letting a
   later pass of legalize do it.  This is ugly, but helps future changes I'm 
   about to commit.

llvm-svn: 42980
2007-10-15 05:46:06 +00:00
Chris Lattner 90e0b271df Add a (disabled by default) way to view the ID of a node.
llvm-svn: 42978
2007-10-15 05:32:43 +00:00
Chris Lattner fbbe570994 remove misleading comment.
llvm-svn: 42970
2007-10-14 20:35:12 +00:00
Chris Lattner ebe491ea9c If a target doesn't have HasMULHU or HasUMUL_LOHI, ExpandOp would return
without lo/hi set.  Fall through to making a libcall instead.

llvm-svn: 42969
2007-10-14 18:35:05 +00:00
Evan Cheng 8d6da9142c When coalescing an EXTRACT_SUBREG and the dst register is a physical register,
the source register will be coalesced to the super register of the LHS. Properly
merge in the live ranges of the resulting coalesced interval that were part of
the original source interval to the live interval of the super-register.

llvm-svn: 42961
2007-10-14 10:08:34 +00:00
Evan Cheng cdf3609130 Revert 42908 for now.
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
Dale Johannesen 19db093b35 Disable some compile-time optimizations on PPC
long double.

llvm-svn: 42958
2007-10-14 01:56:47 +00:00
Chris Lattner f47e30627a Enhance the truncstore optimization code to handle shifted
values and propagate demanded bits through them in simple cases.

This allows this code:
void foo(char *P) {
   strcpy(P, "abc");
}
to compile to:

_foo:
        ldrb r3, [r1]
        ldrb r2, [r1, #+1]
        ldrb r12, [r1, #+2]!
        ldrb r1, [r1, #+1]
        strb r1, [r0, #+3]
        strb r2, [r0, #+1]
        strb r12, [r0, #+2]
        strb r3, [r0]
        bx lr

instead of:

_foo:
        ldrb r3, [r1, #+3]
        ldrb r2, [r1, #+2]
        orr r3, r2, r3, lsl #8
        ldrb r2, [r1, #+1]
        ldrb r1, [r1]
        orr r2, r1, r2, lsl #8
        orr r3, r2, r3, lsl #16
        strb r3, [r0]
        mov r2, r3, lsr #24
        strb r2, [r0, #+3]
        mov r2, r3, lsr #16
        strb r2, [r0, #+2]
        mov r3, r3, lsr #8
        strb r3, [r0, #+1]
        bx lr

testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll

This also helps occasionally for X86 and other cases not involving 
unaligned load/stores.

llvm-svn: 42954
2007-10-13 06:58:48 +00:00
Chris Lattner 5e6fe054a2 Add a simple optimization to simplify the input to
truncate and truncstore instructions, based on the 
knowledge that they don't demand the top bits.

llvm-svn: 42952
2007-10-13 06:35:54 +00:00
Evan Cheng b63076504e Local spiller optimization:
Turn this:
movswl  %ax, %eax
movl    %eax, -36(%ebp)
xorl    %edi, -36(%ebp)
into
movswl  %ax, %eax
xorl    %edi, %eax
movl    %eax, -36(%ebp)
by unfolding the load / store xorl into an xorl and a store when we know the
value in the spill slot is available in a register. This doesn't change the
number of instructions but reduce the number of times memory is accessed.

Also unfold some load folding instructions and reuse the value when similar
situation presents itself.

llvm-svn: 42947
2007-10-13 02:50:24 +00:00
Evan Cheng 9490e0d078 Optionally create a MachineInstr without default implicit operands.
llvm-svn: 42945
2007-10-13 02:23:01 +00:00
Arnold Schwaighofer 1f0da1fefb Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.

llvm-svn: 42934
2007-10-12 21:30:57 +00:00
Dale Johannesen 61c574fc51 ppc long double. Implement fabs and fneg.
llvm-svn: 42924
2007-10-12 19:02:17 +00:00
Dale Johannesen a1a4a9ebfa Implement i64->ppcf128 conversions.
llvm-svn: 42919
2007-10-12 17:52:03 +00:00
Evan Cheng 1410b8512c Did mean to leave this in. INSERT_SUBREG isn't being coalesced yet.
llvm-svn: 42916
2007-10-12 17:16:50 +00:00
Dan Gohman dc35bd79ca Change the names used for internal labels to use the current
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908
2007-10-12 14:53:36 +00:00
Dan Gohman e3583817ac Fix some corner cases with vectors in copyToRegs and copyFromRegs.
llvm-svn: 42907
2007-10-12 14:33:11 +00:00
Dan Gohman 4f056f3c10 Add support to SplitVectorOp for powi, where the second operand
is a scalar integer.

llvm-svn: 42906
2007-10-12 14:13:46 +00:00
Evan Cheng 11330f7526 Restrict EXTRACT_SUBREG coalescing to avoid negative performance impact.
llvm-svn: 42903
2007-10-12 09:15:53 +00:00
Evan Cheng aa2d6ef81d EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899
2007-10-12 08:50:34 +00:00
Evan Cheng 89d5916921 Some clean up.
llvm-svn: 42898
2007-10-12 08:45:27 +00:00
Dale Johannesen 05ff9e8cda PPC long double. Implement a couple more conversions.
llvm-svn: 42888
2007-10-12 01:37:08 +00:00
Dan Gohman be37007e64 Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so
may be overloaded with vector types. And add a testcase for codegen for
these.

llvm-svn: 42885
2007-10-12 00:01:22 +00:00
Dan Gohman 2a7de41682 Codegen support for vector intrinsics.
Factor out the code that expands the "nasty scalar code" for unrolling
vectors into a separate routine, teach it how to handle mixed
vector/scalar operands, as seen in powi, and use it for several operators,
including sin, cos, powi, and pow.

Add support in SplitVectorOp for fpow, fpowi and for several unary
operators.

llvm-svn: 42884
2007-10-11 23:57:53 +00:00
Dale Johannesen 6472eb63c2 Implement ppc long double->uint conversion.
Make ppc long double constants print.

llvm-svn: 42882
2007-10-11 23:32:15 +00:00
Dan Gohman fd66486950 Add runtime library names for pow.
llvm-svn: 42880
2007-10-11 23:09:10 +00:00
Dan Gohman daee002438 Add an ISD::FPOW node type.
llvm-svn: 42879
2007-10-11 23:06:37 +00:00
Arnold Schwaighofer 9ccea99165 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden

llvm-svn: 42870
2007-10-11 19:40:01 +00:00
Dale Johannesen 007aa378ad Next PPC long double bits. First cut at constants.
No compile-time support for constant operations yet,
just format transformations.  Make readers and
writers work.  Split constants into 2 doubles in
Legalize.

llvm-svn: 42865
2007-10-11 18:07:22 +00:00
Duncan Sands 56ab90d3ad Correct swapped arguments to getConstant.
llvm-svn: 42824
2007-10-10 09:54:50 +00:00
Dale Johannesen 666323eacd Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).

llvm-svn: 42822
2007-10-10 01:01:31 +00:00
Evan Cheng a9830a04eb Bad choice of variable name.
llvm-svn: 42821
2007-10-10 00:11:40 +00:00
Evan Cheng ad55a6079a Fix an extremely stupid bug that prevented first round of coalescing (physical registers only) from happening.
llvm-svn: 42820
2007-10-09 23:36:27 +00:00
Dan Gohman 5942e5a5fb Call getFunctionNumber() instead of referencing FunctionNumber directly,
for consistency.

llvm-svn: 42769
2007-10-08 21:27:12 +00:00
Dan Gohman a160361c85 Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.

llvm-svn: 42762
2007-10-08 18:33:35 +00:00
Dan Gohman 5c6d0c3b99 DAGCombiner support for UDIVREM/SDIVREM and UMUL_LOHI/SMUL_LOHI.
Check if one of the two results unneeded so see if a simpler operator
could bs used. Also check to see if each of the two computations could be
simplified if they were split into separate operators. Factor out the code
that calls visit() so that it can be used for this purpose.

llvm-svn: 42759
2007-10-08 17:57:15 +00:00
Dan Gohman b08c8bfe41 Add convenience overloads of SelectionDAG::getNode that take a SDVTList
and individual SDOperand operands.

llvm-svn: 42753
2007-10-08 15:49:58 +00:00
Dan Gohman fadf40a655 In -debug mode, dump SelectionDAGs both before and after the
optimization passes.

llvm-svn: 42749
2007-10-08 15:12:17 +00:00
Evan Cheng 21a58a72c5 Kill cycle of an live range is always the last use index + 1.
llvm-svn: 42742
2007-10-08 06:59:30 +00:00
Neil Booth 5f00973393 convertFromInteger, as originally written, expected sign-extended
input.  APInt unfortunately zero-extends signed integers, so Dale
modified the function to expect zero-extended input.  Make this
assumption explicit in the function name.

llvm-svn: 42732
2007-10-07 11:45:55 +00:00
Evan Cheng 0de312dd7d Reapply 42677.
llvm-svn: 42692
2007-10-06 08:19:55 +00:00
Chris Lattner 82217bd155 revert evan's patch until the header is committed
llvm-svn: 42686
2007-10-06 06:08:17 +00:00
Evan Cheng f4b5d491df Added DAG xforms. e.g.
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) 
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.

llvm-svn: 42677
2007-10-06 02:46:29 +00:00
Dale Johannesen f864ac96d8 Next powerpc long double bits. Comparisons work,
although not well, and shortening FP converts.

llvm-svn: 42672
2007-10-06 01:24:11 +00:00
Dale Johannesen c0154c06d6 First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.

llvm-svn: 42644
2007-10-05 20:04:43 +00:00
Dan Gohman 12334acbfb Legalize support for MUL_LOHI and DIVREM.
llvm-svn: 42636
2007-10-05 14:17:22 +00:00
Dan Gohman 2682bb6df2 Fix a typo in a comment.
llvm-svn: 42635
2007-10-05 14:11:58 +00:00
Dan Gohman 1a77dfba15 Provide names for MUL_LOHI and DIVREM operators.
llvm-svn: 42634
2007-10-05 14:11:04 +00:00
Evan Cheng 84d0ebc10a Chain producing nodes cannot be moved, not chain reading nodes.
llvm-svn: 42627
2007-10-05 01:42:35 +00:00
Evan Cheng 991cf47221 Oops. Didn't mean to leave this in.
llvm-svn: 42626
2007-10-05 01:39:40 +00:00
Evan Cheng 79e9713b11 If a node that defines a physical register that is expensive to copy. The
scheduler will try a number of tricks in order to avoid generating the
copies. This may not be possible in case the node produces a chain value
that prevent movement. Try unfolding the load from the node before to allow
it to be moved / cloned.

llvm-svn: 42625
2007-10-05 01:39:18 +00:00
Evan Cheng 4852303bdb Add a variant of getTargetNode() that takes a vector of MVT::ValueType.
llvm-svn: 42620
2007-10-05 01:10:49 +00:00
Evan Cheng fd11ef4665 Silence a warning.
llvm-svn: 42619
2007-10-05 01:09:32 +00:00
Dan Gohman c731c97fac Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().

llvm-svn: 42585
2007-10-03 19:26:29 +00:00
Dale Johannesen 4d4e77af8e Rewrite sqrt and powi to use anyfloat. By popular demand.
llvm-svn: 42537
2007-10-02 17:43:59 +00:00
Dale Johannesen b6c05b1f90 Fix stride computations for long double arrays.
llvm-svn: 42508
2007-10-01 23:08:35 +00:00
Dan Gohman 9765cc3bbb Move the code that emits the .file directives so that it runs after the
SourceFiles list is fully filled in so that it sees all of the files.

llvm-svn: 42506
2007-10-01 22:40:20 +00:00
Evan Cheng a3a67596f6 Remove simple scheduler.
llvm-svn: 42499
2007-10-01 20:44:07 +00:00
Dale Johannesen c0855f8a88 remove dup comment
llvm-svn: 42486
2007-09-30 19:08:12 +00:00
Dale Johannesen 9150652b21 Constant fold int-to-long-double conversions;
use APFloat for int-to-float/double; use
round-to-nearest for these (implementation-defined,
seems to match gcc).

llvm-svn: 42484
2007-09-30 18:19:03 +00:00
Gordon Henriksen f5aa229ede This is done already.
llvm-svn: 42467
2007-09-29 02:23:08 +00:00
Gordon Henriksen 37ca83d4e9 Collector is the base class for garbage collection code generators.
This version enhances the previous patch to add root initialization
as discussed here:

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070910/053455.html

Collector gives its subclasses control over generic algorithms:

  unsigned NeededSafePoints; //< Bitmask of required safe points.
  bool CustomReadBarriers;   //< Default is to insert loads.
  bool CustomWriteBarriers;  //< Default is to insert stores.
  bool CustomRoots;          //< Default is to pass through to backend.
  bool InitRoots;            //< If set, roots are nulled during lowering.

It also has callbacks which collectors can hook:

  /// If any of the actions are set to Custom, this is expected to
  /// be overriden to create a transform to lower those actions to
  /// LLVM IR.
  virtual Pass *createCustomLoweringPass() const;

  /// beginAssembly/finishAssembly - Emit module metadata as
  /// assembly code.
  virtual void beginAssembly(Module &M, std::ostream &OS,
                             AsmPrinter &AP,
                             const TargetAsmInfo &TAI) const;
  virtual void finishAssembly(Module &M,
                              CollectorModuleMetadata &CMM,
                              std::ostream &OS, AsmPrinter &AP,
                              const TargetAsmInfo &TAI) const;  

Various other independent algorithms could be implemented, but were
not necessary for the initial two collectors. Some examples are
listed here:

http://llvm.org/docs/GarbageCollection.html#collector-algos

llvm-svn: 42466
2007-09-29 02:13:43 +00:00
Dan Gohman a90183e7d1 Teach SplitVectorOp how to split INSERT_VECTOR_ELT.
llvm-svn: 42457
2007-09-28 23:53:40 +00:00
Evan Cheng a5e595d23a If two instructions are both two-address code, favors (schedule closer to
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.

llvm-svn: 42453
2007-09-28 22:32:30 +00:00