Commit Graph

4185 Commits

Author SHA1 Message Date
Evan Cheng 5c1b044899 If an interval is being undone clear its preference as well since the source interval may have been undone as well.
llvm-svn: 43670
2007-11-04 08:32:21 +00:00
Evan Cheng 66298e226f There are times when the coalescer would not coalesce away a copy but the copy
can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.

The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
   legal) so the copy can be eliminated.

This eliminates 443 extra moves from 403.gcc.

llvm-svn: 43662
2007-11-03 07:20:12 +00:00
Dan Gohman d7917b6248 Add std:: to sort calls.
llvm-svn: 43652
2007-11-02 22:24:01 +00:00
Dan Gohman c981d72d1a Change illegal uses of ++ to uses of STLExtra.h's next function.
llvm-svn: 43651
2007-11-02 22:22:02 +00:00
Evan Cheng f851163c53 One more extract_subreg coalescing bug.
llvm-svn: 43644
2007-11-02 17:35:08 +00:00
Duncan Sands 04059dd351 Fix a thinko.
llvm-svn: 43639
2007-11-02 15:18:06 +00:00
Duncan Sands 44b8721de8 Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment.  This gives a primitive type for
which getTypeSize differed from getABITypeSize.  For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).

This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition).  Instead there is:

(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type.  For a primitive type, this is the minimum number
of bits.  For an i36 this is 36 bits.  For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.

(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it).  For an
i36 this is 40 bits, for an x86 long double it is 80 bits.  This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes).  There doesn't seem to be anything
corresponding to this in gcc.

(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment.  For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS.  This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes).  This is
TYPE_SIZE in gcc.

Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize.  This means that the size of an array
is the length times the getABITypeSize.  It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize.  Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case.  So alloca's and mallocs should use getABITypeSize.  Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.

Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.

In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases).  I will get around to auditing these too at some point,
but I could do with some help.

Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize.  I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers.  If someone wants to pack these types more
tightly they can always use a packed struct.

llvm-svn: 43620
2007-11-01 20:53:16 +00:00
Evan Cheng fe1ac52836 - Coalesce extract_subreg when both intervals are relatively small.
- Some code clean up.

llvm-svn: 43606
2007-11-01 06:22:48 +00:00
Duncan Sands 3b4668a5d8 Promotion of sdiv/srem/udiv/urem.
llvm-svn: 43551
2007-10-31 08:57:43 +00:00
Duncan Sands 21ca939683 Add a newline at the end of the file.
llvm-svn: 43550
2007-10-31 08:49:24 +00:00
Owen Anderson 0b59fa0605 Add the skeleton of a better PHI elimination pass.
llvm-svn: 43542
2007-10-31 03:37:57 +00:00
Owen Anderson 9b8f34f2ac Some fixes to get MachineDomTree working better.
llvm-svn: 43541
2007-10-31 03:30:14 +00:00
Dale Johannesen b066c1f216 Make i64=expand_vector_elt(v2i64) work in 32-bit mode.
llvm-svn: 43535
2007-10-31 00:32:36 +00:00
Evan Cheng 0747bc1df6 Typo.
llvm-svn: 43511
2007-10-30 20:11:21 +00:00
Duncan Sands 9ad5465005 Add support for expanding trunc stores. Consider
storing an i170 on a 32 bit machine.  This is first
promoted to a trunc-i170 store of an i256.  On a
little-endian machine this expands to a store of
an i128 and a trunc-i42 store of an i128.  The
trunc-i42 store is further expanded to a trunc-i42
store of an i64, then to a store of an i32 and a
trunc-i10 store of an i32.  At this point the operand
type is legal (i32) and expansion stops (legalization
of the trunc-i10 needs to be handled in LegalizeDAG.cpp).
On big-endian machines the high bits are stored first,
and some bit-fiddling is needed in order to generate
aligned stores.

llvm-svn: 43499
2007-10-30 12:50:39 +00:00
Duncan Sands 341f093bb1 If a call to getTruncStore is for a normal store,
offload to getStore rather than trying to handle
both cases at once (the assertions for example
assume the store really is truncating).

llvm-svn: 43498
2007-10-30 12:40:58 +00:00
Dan Gohman ae95d72a52 Fix a DAGCombiner abort on a bitcast from a scalar to a vector.
llvm-svn: 43470
2007-10-29 20:44:42 +00:00
Evan Cheng e106e2f142 Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).

llvm-svn: 43465
2007-10-29 19:58:20 +00:00
Dan Gohman 1961c28d46 Add explicit keywords.
llvm-svn: 43464
2007-10-29 19:52:04 +00:00
Duncan Sands 1826deda68 The guaranteed alignment of ptr+offset is only the minimum of
of offset and the alignment of ptr if these are both powers of
2.  While the ptr alignment is guaranteed to be a power of 2,
there is no reason to think that offset is.  For example, if
offset is 12 (the size of a long double on x86-32 linux) and
the alignment of ptr is 8, then the alignment of ptr+offset
will in general be 4, not 8.  Introduce a function MinAlign,
lifted from gcc, for computing the minimum guaranteed alignment.
I've tried to fix up everywhere under lib/CodeGen/SelectionDAG/.
I also changed some places that weren't wrong (because both values
were a power of 2), as a defensive change against people copying
and pasting the code.
Hopefully someone who cares about alignment will review the rest
of LLVM and fix up the remaining places.  Since I'm on x86 I'm
not very motivated to do this myself...

llvm-svn: 43421
2007-10-28 12:59:45 +00:00
Bill Wendling 6d15b32c15 - Remove the hacky code that forces a memcpy. Alignment is taken care of in the
FE.
- Explicitly pass in the alignment of the load & store.
- XFAIL 2007-10-23-UnalignedMemcpy.ll because llc has a bug that crashes on
  unaligned pointers.

llvm-svn: 43398
2007-10-26 20:24:42 +00:00
Bill Wendling f73340efb9 Changed XXX to FIXME, and added comment to the README file
llvm-svn: 43359
2007-10-25 19:49:32 +00:00
Bill Wendling 5f7ed00d44 Added comment explaining why we are doing this check.
llvm-svn: 43353
2007-10-25 18:23:45 +00:00
Duncan Sands d385f0759c Small formatting changes. Add a sanity check.
Use NVT rather than looking it up, since we have
it to hand.

llvm-svn: 43341
2007-10-25 12:35:51 +00:00
Duncan Sands a8f4ba6eb9 Promote SETCC operands.
llvm-svn: 43340
2007-10-25 12:32:31 +00:00
Duncan Sands cf0da03312 Correctly extract the ValueType from a VTSDNode.
llvm-svn: 43339
2007-10-25 12:30:51 +00:00
Dale Johannesen a4a972e32d Another expansion for i64 multiply, suitable for PPC.
llvm-svn: 43314
2007-10-24 22:26:08 +00:00
Bill Wendling 38ccabcae9 Fix comment and use the "Size" variable that's already provided.
llvm-svn: 43271
2007-10-23 23:36:57 +00:00
Bill Wendling e3b859298a If there's an unaligned memcpy to/from the stack, don't lower it. Just call the
memcpy library function instead.

llvm-svn: 43270
2007-10-23 23:32:40 +00:00
Bill Wendling 6f149c0571 This broke lots. Reverting.
llvm-svn: 43264
2007-10-23 22:04:26 +00:00
Bill Wendling 8971440e56 Lowering a memcpy to the stack is killing PPC. The ARM and X86 backends already
have their own custom memcpy lowering code. This code needs to be factored out
into a target-independent lowering method with hooks to the backend. In the
meantime, just call memcpy if we're trying to copy onto a stack.

llvm-svn: 43262
2007-10-23 21:30:25 +00:00
Evan Cheng 5d7032bb08 It's possible to commute instrctions with more than 3 operands.
llvm-svn: 43256
2007-10-23 20:14:40 +00:00
Evan Cheng 847d42a85c isSubRegOf() is a dup of isSubRegister.
llvm-svn: 43249
2007-10-23 06:51:50 +00:00
Evan Cheng 5163a8f53e Add missing paratheses.
llvm-svn: 43227
2007-10-22 19:42:28 +00:00
Duncan Sands 941db4da0a Support for expanding extending loads of integers with
funky bit-widths.

llvm-svn: 43225
2007-10-22 19:00:05 +00:00
Duncan Sands 8fc995069b Fix up the logic for result expanding the various extension
operations so they work right for integers with funky
bit-widths.  For example, consider extending i48 to i64
on a 32 bit machine.  The i64 result is expanded to 2 x i32.
We know that the i48 operand will be promoted to i64, then
also expanded to 2 x i32.  If we had the expanded promoted
operand to hand, then expanding the result would be trivial.
Unfortunately at this stage we can only get hold of the
promoted operand.  So instead we kind of hand-expand, doing
explicit shifting and truncating to get the top and bottom
halves of the i64 operand into 2 x i32, which are then used
to expand the result.  This is harmless, because when the
promoted operand is finally expanded all this bit fiddling
turns into trivial operations which are eliminated either
by the expansion code itself or the DAG combiner.

llvm-svn: 43223
2007-10-22 18:26:21 +00:00
Evan Cheng 8557603781 - Only perform the unfolding optimization when the folding in question is modref.
- Remove a bogus assertion.

llvm-svn: 43211
2007-10-22 03:01:44 +00:00
Chris Lattner 36f06c80e6 Add promote operand support for [su]int_to_fp.
llvm-svn: 43204
2007-10-20 22:57:56 +00:00
Chris Lattner 2ba4b148f3 Add result promotion of FP_TO_*INT, fixing CodeGen/X86/trunc-to-bool.ll
with the new legalizer.

llvm-svn: 43199
2007-10-20 04:32:38 +00:00
Chris Lattner 1c87f0c620 simplify some code.
llvm-svn: 43198
2007-10-20 04:09:48 +00:00
Chris Lattner 2bcac640b7 Implement promote and expand for operands of memcpy and friends.
This fixes CodeGen/X86/mem*.ll.

llvm-svn: 43197
2007-10-20 04:07:07 +00:00
Evan Cheng f12967124c Added missing curly braces which renders the if clause useless in debug build.
llvm-svn: 43196
2007-10-20 04:01:47 +00:00
Dale Johannesen 771188cf60 Fix a few places vector operations were not getting
the operand's type from the right place.

llvm-svn: 43195
2007-10-20 00:07:52 +00:00
Evan Cheng 35ff79370b Local spiller optimization:
Turn a store folding instruction into a load folding instruction. e.g.
     xorl  %edi, %eax
     movl  %eax, -32(%ebp)
     movl  -36(%ebp), %eax
     orl   %eax, -32(%ebp)
=>
     xorl  %edi, %eax
     orl   -36(%ebp), %eax
     mov   %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.

llvm-svn: 43192
2007-10-19 21:23:22 +00:00
Bill Wendling ac5c93040f Don't branch fold inline asm statements.
llvm-svn: 43191
2007-10-19 21:09:55 +00:00
Duncan Sands a87c9e4b75 Add support for a few more nodes.
llvm-svn: 43190
2007-10-19 20:29:48 +00:00
Dale Johannesen 6802d0c96f Redo "last ppc long double fix" as Chris wants.
llvm-svn: 43189
2007-10-19 20:29:00 +00:00
Chris Lattner 064c31ebac Fix a really nasty vector miscompilation bill recently introduced.
llvm-svn: 43181
2007-10-19 16:47:35 +00:00
Chris Lattner 3ea519e56d rename ExpandOperation to ExpandOperationResult, as suggested
by Duncan

llvm-svn: 43177
2007-10-19 15:28:47 +00:00
Duncan Sands a9953e4d0a Support for expanding ADDE and SUBE.
llvm-svn: 43175
2007-10-19 13:06:17 +00:00