741a9c7bf6
Use new EVT::vAny type to combine Neon intrinsics for VPADD.
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llvm-svn: 78632
2009-08-11 01:15:26 +00:00
d9aedcae23
Use FileCheck.
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llvm-svn: 78614
2009-08-10 23:14:14 +00:00
bdf1a1d1a2
Use FileCheck... its good for you...
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llvm-svn: 78613
2009-08-10 23:06:57 +00:00
9e7c7e748f
Fix test.
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llvm-svn: 78611
2009-08-10 22:58:08 +00:00
108b522912
Fix test.
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llvm-svn: 78606
2009-08-10 22:31:04 +00:00
85b5b027f7
Use NEON for single-precision int<->FP conversions.
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llvm-svn: 78604
2009-08-10 22:17:39 +00:00
676d115ce5
Add nounwind keywords.
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llvm-svn: 78568
2009-08-10 16:48:40 +00:00
cb307a27bf
Make the big switch: Change MCSectionMachO to represent a section *semantically*
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instead of syntactically as a string. This means that it keeps track of the
segment, section, flags, etc directly and asmprints them in the right format.
This also includes parsing and validation support for llvm-mc and
"attribute(section)", so we should now start getting errors about invalid
section attributes from the compiler instead of the assembler on darwin.
Still todo:
1) Uniquing of darwin mcsections
2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h]
3) there are a few FIXMEs, for example what is the syntax to get the
S_GB_ZEROFILL segment type?
llvm-svn: 78547
2009-08-10 01:39:42 +00:00
7fc63417d7
Add tests for Neon VZIP and VUZP instructions.
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llvm-svn: 78529
2009-08-09 06:48:29 +00:00
f60c8807e8
Add a test for Neon VTRN instructions.
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llvm-svn: 78528
2009-08-09 06:30:46 +00:00
97262e01d5
Convert more Neon tests to use FileCheck.
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llvm-svn: 78433
2009-08-07 23:45:02 +00:00
742db6a6d4
Make NEON single-precision FP support the default for cortex-a8 (again).
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llvm-svn: 78430
2009-08-07 23:32:33 +00:00
23b28cb824
2 more vdup.32 cases
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llvm-svn: 78419
2009-08-07 22:36:50 +00:00
0127031c20
Implement Neon VST[234] operations.
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llvm-svn: 78330
2009-08-06 18:47:44 +00:00
e3ec5b6d76
Fix incorrect intrinsic declarations.
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llvm-svn: 78329
2009-08-06 18:46:26 +00:00
3389c2f7d0
Add tests for new NEON vld instructions.
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llvm-svn: 78264
2009-08-06 00:38:31 +00:00
dd611f44cb
Convert more Neon tests to FileCheck.
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llvm-svn: 78261
2009-08-05 23:51:20 +00:00
22ef75155e
Missed pieces for ARM HardFP ABI.
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Patch by Sandeep Patel!
llvm-svn: 78225
2009-08-05 19:04:42 +00:00
6092c8d231
Convert more Neon tests to use FileCheck.
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llvm-svn: 78111
2009-08-04 22:01:41 +00:00
2b60721464
Convert a few Neon tests to use FileCheck.
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llvm-svn: 78108
2009-08-04 21:33:22 +00:00
0e0b5405f5
Clean up the handling of two-address operands in RegScavenger.
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This fixes PR4528.
llvm-svn: 78107
2009-08-04 21:30:30 +00:00
30bf625ac2
Add NEON single-precision FP support for fabs and fneg.
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llvm-svn: 78101
2009-08-04 20:39:05 +00:00
a3839bc6c0
Match common pattern for FNMAC. Add NEON SP support.
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llvm-svn: 78085
2009-08-04 18:44:29 +00:00
a2824d5700
Improve tests.
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llvm-svn: 78083
2009-08-04 18:11:59 +00:00
3b9c52c5c1
Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
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llvm-svn: 78081
2009-08-04 17:53:06 +00:00
206ee96bd6
Fix PR4528. This scavenger assertion is too strict. The two-address value is
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killed by another operand.
There is probably a better fix. Either 1) scavenger can look at other operands, or
2) livevariables can be smarter about kill markers. Patches welcome.
llvm-svn: 78072
2009-08-04 16:52:44 +00:00
f307e0bd6d
Lower CONCAT_VECTOR during legalization instead of matching it during isel.
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Add a testcase.
llvm-svn: 77992
2009-08-03 20:36:38 +00:00
5d8ace0902
Fix Bug 4657: register scavenger asserts with subreg lowering
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When LowerSubregsInstructionPass::LowerInsert eliminates an INSERT_SUBREG
instriction because it is an identity copy, make sure that the same registers
are alive before and after the elimination.
When the super-register is marked <undef> this requires inserting an
IMPLICIT_DEF instruction to make sure the super register is live.
Fix a related bug where a kill flag on the inserted sub-register was not transferred properly.
Finally, clear the undef flag in MachineInstr::addRegisterKilled. Undef implies dead and kill implies live, so they cant both be valid.
llvm-svn: 77989
2009-08-03 20:08:18 +00:00
c4d6f83f20
switch to filecheck format
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llvm-svn: 77841
2009-08-02 00:32:26 +00:00
1f58eed638
Add VFP3 D registers to the DPR register class.
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llvm-svn: 77521
2009-07-29 23:03:41 +00:00
cf19885a32
Change Neon VLDn intrinsics to return multiple values instead of really
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wide vectors. Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct. Adjust tests accordingly.
llvm-svn: 77468
2009-07-29 16:39:22 +00:00
8a37bbebfd
Add support for ARM Neon VREV instructions.
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Patch by Anton Korzh, with some modifications from me.
llvm-svn: 77101
2009-07-26 00:39:34 +00:00
e270d4a4dd
Use getTargetConstant instead of getConstant since it's meant as an constant operand.
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llvm-svn: 76803
2009-07-22 22:03:29 +00:00
d2d52d1906
Ignore undef uses.
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llvm-svn: 76799
2009-07-22 21:51:42 +00:00
0d8b0cf3b8
Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1.
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llvm-svn: 76520
2009-07-21 00:31:12 +00:00
a2b8c3f98f
Forgot this test earlier.
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llvm-svn: 76485
2009-07-20 21:46:42 +00:00
55452c2bea
fix an arm codegen bug (the same as PR4482 on ppc) where available_externally
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symbols were not getting stubs. While I'm at it, add a big testcase for
stub generation to make sure I don't break anything.
llvm-svn: 75737
2009-07-15 04:12:33 +00:00
223ac25930
Remove a bogus assertion.
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llvm-svn: 75206
2009-07-10 00:23:48 +00:00
9ce44e2521
Handle 'a' modifier on inline assembly operands.
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This is part of the fix for pr4521.
llvm-svn: 75201
2009-07-09 23:54:51 +00:00
dab7b06de9
Improved tracking of value number kills. VN kills are now represented
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as an (index,bool) pair. The bool flag records whether the kill is a
PHI kill or not. This code will be used to enable splitting of live
intervals containing PHI-kills.
A slight change to live interval weights introduced an extra spill
into lsr-code-insertion (outside the critical sections). The test
condition has been updated to reflect this.
llvm-svn: 75097
2009-07-09 03:57:02 +00:00
1d298fd75b
Implement NEON vst1 instruction.
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llvm-svn: 75037
2009-07-08 20:32:02 +00:00
f731a2df6b
Implement NEON vld1 instructions.
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llvm-svn: 75019
2009-07-08 18:11:30 +00:00
dc84b31d94
Change these tests to use [fi]cmp+sext instead of v[fi]cmp. No
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functionality change.
llvm-svn: 74979
2009-07-08 00:46:57 +00:00
40398233b7
Add bfc to armv6t2.
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llvm-svn: 74868
2009-07-06 22:23:46 +00:00
e63b0e6f79
Added ARM::mls for armv6t2.
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llvm-svn: 74866
2009-07-06 22:05:45 +00:00
0e8bde5910
Add thumb2 sign / zero extend with rotate instructions.
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llvm-svn: 74755
2009-07-03 01:43:10 +00:00
04f72fc955
CommuteChangesDestination() should check if to-be-commuted instruction defines any register. Also teaches the default commuteInstruction() to commute instruction without definitions (e.g. X86::test / ARM::tsp).
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llvm-svn: 74602
2009-07-01 08:29:08 +00:00
2a5efe14a7
Remove special handling of implicit_def. Fix a couple more bugs in liveintervalanalysis and coalescer handling of implicit_def.
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Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def.
llvm-svn: 74601
2009-07-01 08:19:36 +00:00
d379e896ff
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
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llvm-svn: 74580
2009-07-01 01:59:31 +00:00
dcf1f59305
Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.).
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llvm-svn: 74519
2009-06-30 09:19:42 +00:00
Bob Wilson