Commit Graph

175211 Commits

Author SHA1 Message Date
Jingyue Wu 76cbea6b6d Fixed a test in r209670
The test was outdated with r209537.

llvm-svn: 209671
2014-05-27 18:12:55 +00:00
Jingyue Wu 80a738dc62 Distribute sext/zext to the operands of and/or/xor
This is an enhancement to SeparateConstOffsetFromGEP. With this patch, we can
extract a constant offset from "s/zext and/or/xor A, B".

Added a new test @ext_or to verify this enhancement.

Refactoring the code, I also extracted some common logic to function
Distributable. 

llvm-svn: 209670
2014-05-27 18:00:00 +00:00
David Blaikie 66c3077470 DebugInfo: Fix argument ordering in test by adding argument numbering.
This old test didn't have the argument numbering that's now squirelled
away in the high bits of the line number in the DW_TAG_arg_variable
metadata.

Add the numbering and update the test to ensure arguments are in-order.

llvm-svn: 209669
2014-05-27 17:57:14 +00:00
Renato Golin a627a103d0 Fix pr19841, bb are also unnamed
llvm-svn: 209668
2014-05-27 17:01:21 +00:00
Filipe Cabecinhas e8d6a1e82f Post-commit fixes for r209643
Detected by Daniel Jasper, Ilia Filippov, and Andrea Di Biagio
Fixed the argument order to select (the mask semantics to blendv* are the
inverse of select) and fixed the tests
Added parenthesis to the assert condition
Ran clang-format

llvm-svn: 209667
2014-05-27 16:54:33 +00:00
Renato Golin 345c9cc5f4 Fix pr19841.cpp on release mode
llvm-svn: 209666
2014-05-27 16:51:36 +00:00
Tim Northover 9a6217b650 AArch64: add test for NZCV cross-copy save.
llvm-svn: 209665
2014-05-27 16:50:09 +00:00
Tim Northover de9402d345 AArch64: add AArch64-specific test for 'c' and 'n'.
llvm-svn: 209664
2014-05-27 16:50:03 +00:00
Renato Golin e7b3d5dcb4 Revert small change to EmitDeclRefLValue
That small change, although it looked harmless, it made emitting the LValue
on the PHI node without the proper cast. Reverting it fixes PR19841.

llvm-svn: 209663
2014-05-27 16:46:27 +00:00
Bill Schmidt 71dddd51d9 [PATCH] Correct type used for VADD_SPLAT optimization on PowerPC
In PPCISelLowering.cpp: PPCTargetLowering::LowerBUILD_VECTOR(), there
is an optimization for certain patterns to generate one or two vector
splats followed by a vector add or subtract.  This operation is
represented by a VADD_SPLAT in the selection DAG.  Prior to this
patch, it was possible for the VADD_SPLAT to be assigned the wrong
data type, causing incorrect code generation.  This patch corrects the
problem.

Specifically, the code previously assigned the value type of the
BUILD_VECTOR node to the newly generated VADD_SPLAT node.  This is
correct much of the time, but not always.  The problem is that the
call to isConstantSplat() may return a SplatBitSize that is not the
same as the number of bits in the original element vector type.  The
correct type to assign is a vector type with the same element bit size
as SplatBitSize.

The included test case shows an example of this, where the
BUILD_VECTOR node has a type of v16i8.  The vector to be built is {0,
16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16}.  isConstantSplat
detects that we can generate a splat of 16 for type v8i16, which is
the type we must assign to the VADD_SPLAT node.  If we do not, we
generate a vspltisb of 8 and a vaddubm, which generates the incorrect
result {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
16}.  The correct code generation is a vspltish of 8 and a vadduhm.

This patch also corrected code generation for
CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll, which had been marked
as an XFAIL, so we can remove the XFAIL from the test case.

llvm-svn: 209662
2014-05-27 15:57:51 +00:00
NAKAMURA Takumi 74bae981a5 ASTMatchers.h: Appease msc17.
llvm-svn: 209661
2014-05-27 15:13:51 +00:00
Alexander Musman 8bd31e69a4 Parsing/Sema for OMPCollapseClause.
Actual usage in Sema for collapsing loops will in some future patch.

llvm-svn: 209660
2014-05-27 15:12:19 +00:00
Zoran Jovanovic b355e8f604 [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16
Differential Revision: http://reviews.llvm.org/D3860

llvm-svn: 209659
2014-05-27 14:58:51 +00:00
Evgeniy Stepanov de9467593a [tsan] Fix tsango build.
llvm-svn: 209658
2014-05-27 14:18:43 +00:00
Evgeniy Stepanov 360c911872 [asan] Disable dlopen interceptor on Android.
It can not work, as libdl is always first in the lookup order,
even ahead of LD_PRELOAD-ed libraries.

llvm-svn: 209657
2014-05-27 14:14:03 +00:00
Amara Emerson ceeb1c4830 [ARM] Emit correct build attributes for the relocation models.
Patch by Asiri Rathnayake.

llvm-svn: 209656
2014-05-27 13:30:21 +00:00
Zoran Jovanovic 10e06da031 [mips][mips64r6] Add relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2
Differential Revision: http://reviews.llvm.org/D3824

llvm-svn: 209655
2014-05-27 12:55:40 +00:00
Evgeniy Stepanov 47b1a95f1c [asancov] Emit an initializer passing number of coverage code locations in each module.
llvm-svn: 209654
2014-05-27 12:39:31 +00:00
Evgeniy Stepanov 567e516015 [asancov] Write coverage directly to a memory-mapped file.
This way does not require a __sanitizer_cov_dump() call. That's
important on Android, where apps can be killed at arbitrary time.

We write raw PCs to disk instead of module offsets; we also write
memory layout to a separate file. This increases dump size by the
factor of 2 on 64-bit systems.

llvm-svn: 209653
2014-05-27 12:37:52 +00:00
Manuel Klimek a2c2a4faa0 Make equalsNode work with pointers to subtypes.
llvm-svn: 209652
2014-05-27 12:31:10 +00:00
Tim Northover 1bed9afd30 AArch64: implement copies to/from NZCV as a last ditch effort.
A test in test/Generic creates a DAG where the NZCV output of an ADCS is used
by multiple nodes. This makes LLVM want to save a copy of NZCV for later, which
it couldn't do before.

This should be the last fix required for the aarch64 buildbot.

llvm-svn: 209651
2014-05-27 12:16:02 +00:00
Tim Northover 4f1909f1da ARM: teach AAPCS-VFP to deal with Cortex-M4.
Cortex-M4 only has single-precision floating point support, so any LLVM
"double" type will have been split into 2 i32s by now. Fortunately, the
consecutive-register framework turns out to be precisely what's needed to
reconstruct the double and follow AAPCS-VFP correctly!

rdar://problem/17012966

llvm-svn: 209650
2014-05-27 10:43:38 +00:00
Manuel Klimek 909b5c94c0 Adds child traversal matchers for IfStmt's then and else branches.
llvm-svn: 209649
2014-05-27 10:04:12 +00:00
Daniel Jasper 73458c95ac Fix bad assert.
llvm-svn: 209648
2014-05-27 09:55:37 +00:00
Manuel Klimek 2af0a91cc4 Allow hasBody on CXXForRangeStmt nodes and update the docs.
llvm-svn: 209647
2014-05-27 07:45:18 +00:00
Tim Northover 4719041db7 AArch64: support 'c' and 'n' inline asm modifiers.
These are tested by test/CodeGen/Generic, so we should probably know
how to deal with them. Fortunately generic code does it if asked.

llvm-svn: 209646
2014-05-27 07:37:21 +00:00
Dinesh Dwivedi c0e6703360 Adding testcase for PR18886.
Differential Revision: http://reviews.llvm.org/D3837

llvm-svn: 209645
2014-05-27 06:44:25 +00:00
Simon Atanasyan 1c04babce3 [Mips] Handle relocations against __gnu_local_gp symbol.
llvm-svn: 209644
2014-05-27 05:23:16 +00:00
Filipe Cabecinhas 82ac07c283 Convert some X86 blendv* intrinsics into IR.
Summary:
Implemented an InstCombine transformation that takes a blendv* intrinsic
call and translates it into an IR select, if the mask is constant.

This will eventually get lowered into blends with immediates if possible,
or pblendvb (with an option to further optimize if we can transform the
pblendvb into a blend+immediate instruction, depending on the selector).
It will also enable optimizations by the IR passes, which give up on
sight of the intrinsic.

Both the transformation and the lowering of its result to asm got shiny
new tests.

The transformation is a bit convoluted because of blendvp[sd]'s
definition:

Its mask is a floating point value! This forces us to convert it and get
the highest bit. I suppose this happened because the mask has type
__m128 in Intel's intrinsic and v4sf (for blendps) in gcc's builtin.

I will send an email to llvm-dev to discuss if we want to change this or
not.

Reviewers: grosbach, delena, nadav

Differential Revision: http://reviews.llvm.org/D3859

llvm-svn: 209643
2014-05-27 03:42:20 +00:00
Craig Topper 0dbb783c7b [C++11] Use 'nullptr'. StaticAnalyzer edition.
llvm-svn: 209642
2014-05-27 02:45:47 +00:00
Greg Fitzgerald 7b15cf8884 On AArch64, use clone() instead of fork()
Patch by Gideon Billings.

Differential Revision: http://reviews.llvm.org/D3903

llvm-svn: 209641
2014-05-26 23:44:55 +00:00
Rafael Espindola 3bc64d54a9 Fix link.
llvm-svn: 209640
2014-05-26 21:30:40 +00:00
Rafael Espindola 19913ee160 Use existing helper function.
No functionality change.

llvm-svn: 209639
2014-05-26 19:57:55 +00:00
Rafael Espindola ac69cee6a2 [PPC] Use alias symbols in address computation.
This seems to match what gcc does for ppc and what every other llvm
backend does.

llvm-svn: 209638
2014-05-26 19:08:19 +00:00
Tim Northover 68ae503de9 AArch64: force i1 to be zero-extended at an ABI boundary.
This commit is debatable. There are two possible approaches, neither
of which is really satisfactory:

1. Use "@foo(i1 zeroext)" to mean an extension to 32-bits on Darwin,
   and 8 bits otherwise.
2. Redefine "@foo(i1)" to mean that the i1 is extended by the caller
   to 8 bits. This goes against the spirit of "zeroext" I think, but
   it's a bit of a vague construct anyway (by definition you're going
   to extend to the amount required by the ABI, that's why it's the
   ABI!).

This implements option 2. The DAG machinery really isn't setup for the
first (there's a fairly strong assumption that "zeroext" goes to at
least the smallest register size), and even if it was the resulting
DAG looks like it would be inferior in many cases.

Theoretically we could add AssertZext nodes in the consumers of
ABI-passed values too now, but this actually seems to make the code
worse in practice by making truncation proceed in two steps. The code
produced is equally valid if we continue to assume only the low bit is
defined.

Should fix PR19850

llvm-svn: 209637
2014-05-26 17:22:07 +00:00
Tim Northover 47e003c65d AArch64: simplify calling conventions slightly.
We can eliminate the custom C++ code in favour of some TableGen to
check the same things. Functionality should be identical, except for a
buffer overrun that was present in the C++ code and meant webkit
failed if any small argument needed to be passed on the stack.

llvm-svn: 209636
2014-05-26 17:21:53 +00:00
Aaron Ballman 5a1ef6b411 Rejecting the mutable specifier on a freestanding type declaration, instead of supporting it as a "extension" (which serves no purpose). Un-XFAILing the test for mutable specifiers.
llvm-svn: 209635
2014-05-26 17:03:54 +00:00
Michael Zolotukhin 265dfa411c Some cleanup for r209568.
llvm-svn: 209634
2014-05-26 14:49:46 +00:00
Ed Maste 1ae28dd793 Add stdlib.h for malloc and friends
llvm-svn: 209633
2014-05-26 14:07:26 +00:00
Ed Maste 8c43ed45ef Remove include of obsolete stropts.h header
The header is for POSIX streams functionality, and does not exist on
FreeBSD, OS X, or contemporary Linux distributions.

llvm-svn: 209632
2014-05-26 14:04:29 +00:00
Ed Maste 4c433e5206 Use MIUtilSystemLinux on FreeBSD as well
We should later rename this file (probably MIUtilSystemPOSIX), but
more clean-up is still needed here, and we can wait until we better
understand how this code may be shared between FreeBSD, Linux, and OS X.

llvm-svn: 209631
2014-05-26 13:57:15 +00:00
Ed Maste d60480f7b6 Add missing header
Presumably included by header leakage on other platforms.

llvm-svn: 209630
2014-05-26 13:48:38 +00:00
Timur Iskhodzhanov d67df369cf [ASan tests] Use ASAN_OPTIONS in a portable way
llvm-svn: 209629
2014-05-26 13:44:57 +00:00
Rafael Espindola acef6c776b Convert a few loops to use ranges.
llvm-svn: 209628
2014-05-26 13:38:51 +00:00
Tilmann Scheller cc3ebc8a98 [AArch64] Add store + add folding regression tests for the load/store optimization pass.
Add tests for the following transform:

 str X, [x0, #32]
  ...
 add x0, x0, #32
  ->
 str X, [x0, #32]!

with X being either w1, x1, s0, d0 or q0.

llvm-svn: 209627
2014-05-26 13:36:47 +00:00
Daniel Jasper 60553be5fd clang-format: Split up moveStateToNextToken.
No functional changes intended.

llvm-svn: 209626
2014-05-26 13:10:39 +00:00
Sergey Matveev a531058d2b [MSan] Implement __sanitizer_print_stack_trace().
llvm-svn: 209625
2014-05-26 13:08:08 +00:00
Tilmann Scheller 112ada831f [AArch64] Add more regression tests for the load/store optimization pass.
Cover the following cases:

  ldr X, [x0, #32]
   ...
  add x0, x0, #32
   ->
  ldr X, [x0, #32]!

with X being either w1, x1, s0, d0 or q0.

llvm-svn: 209624
2014-05-26 12:15:51 +00:00
Kostya Serebryany 4d237a8503 [asan] decrease asan-instrumentation-with-call-threshold from 10000 to 7000, see PR17409
llvm-svn: 209623
2014-05-26 11:57:16 +00:00
Timur Iskhodzhanov 9011eb81cf [ASan/Win tests] Remove the extra 'cat' in front of FileCheck now that it's clear we should use GnuWin32 rather than Cygwin on the PATH on Windows (see PR19744)
llvm-svn: 209622
2014-05-26 11:54:20 +00:00