Commit Graph

78125 Commits

Author SHA1 Message Date
Craig Topper 649d1c5eec Fix PR11370 for real. Prevents converting 256-bit FP instruction to AVX2 256-bit integer instructions when AVX2 isn't enabled.
llvm-svn: 144629
2011-11-15 06:39:01 +00:00
Evan Cheng 7098c4e5f4 Set SeenStore to true to prevent loads from being moved; also eliminates a non-deterministic behavior.
llvm-svn: 144628
2011-11-15 06:26:51 +00:00
Chandler Carruth 9b548a7fcf Rather than trying to use the loop block sequence *or* the function
block sequence when recovering from unanalyzable control flow
constructs, *always* use the function sequence. I'm not sure why I ever
went down the path of trying to use the loop sequence, it is
fundamentally not the correct sequence to use. We're trying to preserve
the incoming layout in the cases of unreasonable control flow, and that
is only encoded at the function level. We already have a filter to
select *exactly* the sub-set of blocks within the function that we're
trying to form into a chain.

The resulting code layout is also significantly better because of this.
In several places we were ending up with completely unreasonable control
flow constructs due to the ordering chosen by the loop structure for its
internal storage. This change removes a completely wasteful vector of
basic blocks, saving memory allocation in the common case even though it
costs us CPU in the fairly rare case of unnatural loops. Finally, it
fixes the latest crasher reduced out of GCC's single source. Thanks
again to Benjamin Kramer for the reduction, my bugpoint skills failed at
it.

llvm-svn: 144627
2011-11-15 06:26:43 +00:00
Craig Topper 05baa85f58 Properly qualify AVX2 specific parts of execution dependency table. Also enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370.
llvm-svn: 144622
2011-11-15 05:55:35 +00:00
NAKAMURA Takumi f01faac473 include/llvm/Support/Compiler.h: Invalidate LLVM_ATTRIBUTE_WEAK on cygming for now.
It triggers generating insane executables with both binutils-2.19.1(msysgit) and 2.22.51.20111013(cygwin).

llvm-svn: 144621
2011-11-15 05:24:26 +00:00
Jakob Stoklund Olesen 9c0de9bb6b Really fix test.
llvm-svn: 144613
2011-11-15 03:17:01 +00:00
Jakob Stoklund Olesen 14b66375a9 Allow for depencendy-breaking instructions before cvt*.
This should unbreak clang-x86_64-darwin10-RA, but I can't actually
reproduce the failure.

llvm-svn: 144611
2011-11-15 02:29:48 +00:00
Evan Cheng 7ca4b6eb5c Add vmov.f32 to materialize f32 immediate splats which cannot be handled by
integer variants. rdar://10437054

llvm-svn: 144608
2011-11-15 02:12:34 +00:00
Jim Grosbach 29cdcda80d ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions.
rdar://10435076

llvm-svn: 144606
2011-11-15 01:46:57 +00:00
Nick Lewycky 6804d27048 Move WEAK marking to the declaration.
llvm-svn: 144603
2011-11-15 01:23:22 +00:00
Jakob Stoklund Olesen f8ad336bc4 Break false dependencies before partial register updates.
Two new TargetInstrInfo hooks lets the target tell ExecutionDepsFix
about instructions with partial register updates causing false unwanted
dependencies.

The ExecutionDepsFix pass will break the false dependencies if the
updated register was written in the previoius N instructions.

The small loop added to sse-domains.ll runs twice as fast with
dependency-breaking instructions inserted.

llvm-svn: 144602
2011-11-15 01:15:30 +00:00
Jakob Stoklund Olesen 543bef6ead Track register ages more accurately.
Keep track of the last instruction to define each register individually
instead of per DomainValue.  This lets us track more accurately when a
register was last written.

Also track register ages across basic blocks.  When entering a new
basic block, use the least stale predecessor def as a worst case
estimate for register age.

The register age is used to arbitrate between conflicting domains. The
most recently defined register wins.

llvm-svn: 144601
2011-11-15 01:15:25 +00:00
Devang Patel aa284c564f Add ObjCPropertyDebugInfo.html
llvm-svn: 144600
2011-11-15 01:14:37 +00:00
Devang Patel 41eac807ee Document debug info support for objective-c properties.
llvm-svn: 144599
2011-11-15 01:11:58 +00:00
Jim Grosbach 7b03fbd25c Tidy up. Formatting.
llvm-svn: 144598
2011-11-15 01:05:12 +00:00
Nick Lewycky b2489b7484 Fix linking for some users who already have tsan enabled code and are trying to
link it against llvm code, by making our definitions weak. "Some users."

llvm-svn: 144596
2011-11-15 00:14:04 +00:00
Jim Grosbach a498af2b1d ARM parsing datatype suffix variants for non-writeback VST1 instructions.
rdar://10435076

llvm-svn: 144593
2011-11-14 23:43:46 +00:00
Jim Grosbach 72838a0345 ARM parsing datatype suffix variants for non-writeback VLD1 instructions.
rdar://10435076

llvm-svn: 144592
2011-11-14 23:32:59 +00:00
Jim Grosbach 750de7a399 Add explanatory comment.
llvm-svn: 144589
2011-11-14 23:21:09 +00:00
Jim Grosbach 9c2d9d597b Split out the plain '.{8|16|32|64}' suffix handling.
Make it easier to deal with aliases for instructions that do require a suffix
but accept more specific variants of the same size.

llvm-svn: 144588
2011-11-14 23:20:14 +00:00
Jim Grosbach 3d6c0e0bb2 ARM parsing optional datatype suffix for VAND/VEOR/VORR instructions.
rdar://10435076

llvm-svn: 144587
2011-11-14 23:11:19 +00:00
Chad Rosier 057b6d3476 Supporting inline memmove isn't going to be worthwhile. The only way to avoid
violating a dependency is to emit all loads prior to stores.  This would likely
cause a great deal of spillage offsetting any potential gains.

llvm-svn: 144585
2011-11-14 23:04:09 +00:00
Jim Grosbach 3e2c6f380c ARM VLDR/VSTR instructions don't need a size suffix.
Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.

llvm-svn: 144583
2011-11-14 23:03:21 +00:00
Nick Lewycky 7013a19e8a Refactor capture tracking (which already had a couple flags for whether returns
and stores capture) to permit the caller to see each capture point and decide
whether to continue looking.

Use this inside memdep to do an analysis that basicaa won't do. This lets us
solve another devirtualization case, fixing PR8908!

llvm-svn: 144580
2011-11-14 22:49:42 +00:00
Chad Rosier 4e88fbebde Add newline to end of file. Thanks, Eli.
llvm-svn: 144579
2011-11-14 22:48:33 +00:00
Chad Rosier ab7223e99a Add support for inlining small memcpys.
rdar://10412592

llvm-svn: 144578
2011-11-14 22:46:17 +00:00
Chad Rosier 45110fdf8d Fix a performance regression from r144565. Positive offsets were being lowered
into registers, rather then encoded directly in the load/store.

llvm-svn: 144576
2011-11-14 22:34:48 +00:00
Jim Grosbach 7996b15724 ARM assembly parsing type suffix options for VLDR/VSTR.
rdar://10435076

llvm-svn: 144575
2011-11-14 22:28:39 +00:00
Nick Lewycky e5dc7550a5 Fix Windows build, don't try to #include <pthread.h> when we know it's not
available.

llvm-svn: 144574
2011-11-14 22:10:23 +00:00
Evan Cheng f2fc508d4d Avoid dereferencing off the beginning of lists.
llvm-svn: 144569
2011-11-14 21:11:15 +00:00
Evan Cheng 28ffb7e444 At -O0, multiple uses of a virtual registers in the same BB are being marked
"kill". This looks like a bug upstream. Since that's going to take some time
to understand, loosen the assertion and disable the optimization when
multiple kills are seen.

llvm-svn: 144568
2011-11-14 21:02:09 +00:00
Nick Lewycky fe856110aa Add support for tsan annotations (thread sanitizer, a valgrind-based tool).
These annotations are disabled entirely when either ENABLE_THREADS is off, or
building a release build. When enabled, they add calls to functions with no
statements to ManagedStatic's getters.

Use these annotations to inform tsan that the race used inside ManagedStatic
initialization is actually benign. Thanks to Kostya Serebryany for helping
write this patch!

llvm-svn: 144567
2011-11-14 20:50:16 +00:00
Evan Cheng fb13d32b3f Add a missing pattern for X86ISD::MOVLPD. rdar://10436044
llvm-svn: 144566
2011-11-14 20:35:52 +00:00
Chad Rosier adfd200bcb Add support for Thumb load/stores with negative offsets.
rdar://10412592

llvm-svn: 144565
2011-11-14 20:22:27 +00:00
Benjamin Kramer 319904cc7e Unbreak Release builds.
llvm-svn: 144560
2011-11-14 19:51:48 +00:00
Evan Cheng 30f44ad785 Teach two-address pass to re-schedule two-address instructions (or the kill
instructions of the two-address operands) in order to avoid inserting copies.
This fixes the few regressions introduced when the two-address hack was
disabled (without regressing the improvements).
rdar://10422688

llvm-svn: 144559
2011-11-14 19:48:55 +00:00
Pete Cooper 890e02e854 Changed SSE4/AVX <2 x i64> extract and insert ops to be Custom lowered
Constant idx case is still done in tablegen but other cases are then expanded

Fixes <rdar://problem/10435460>

llvm-svn: 144557
2011-11-14 19:38:42 +00:00
Benjamin Kramer 42d098e1b4 Fold ConstantVector::isAllOnesValue into Constant::isAllOnesValue and simplify it.
llvm-svn: 144555
2011-11-14 19:12:20 +00:00
Akira Hatanaka f93b3f46f8 32-to-64-bit extended load.
llvm-svn: 144554
2011-11-14 19:06:14 +00:00
Akira Hatanaka 0b8bc00424 AnalyzeCallOperands function for N32/64.
N32/64 places all variable arguments in integer registers (or on stack),
regardless of their types, but follows calling convention of non-vaarg function
when it handles fixed arguments.

llvm-svn: 144553
2011-11-14 19:02:54 +00:00
Akira Hatanaka 52359363f2 Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64.
llvm-svn: 144552
2011-11-14 19:01:09 +00:00
Justin Holewinski 33a519021c PTX: Let LLVM use loads/stores for all mem* intrinsics, instead of relying on custom implementations.
llvm-svn: 144551
2011-11-14 18:58:20 +00:00
Wesley Peck 1c29a83acc Add release notes for the MicroBlaze backend.
llvm-svn: 144550
2011-11-14 18:56:41 +00:00
Akira Hatanaka d673cfe027 Remove variable that keeps the size of area used to save byval or variable
argument registers on the callee's stack frame, along with functions that set
and get it.
    
It is not necessary to add the size of this area when computing stack size in
emitPrologue, since it has already been accounted for in
PEI::calculateFrameObjectOffsets.

llvm-svn: 144549
2011-11-14 18:56:20 +00:00
Jakob Stoklund Olesen 7e6004a3c1 Fix early-clobber handling in shrinkToUses.
I broke this in r144515, it affected most ARM testers.

<rdar://problem/10441389>

llvm-svn: 144547
2011-11-14 18:45:38 +00:00
Bob Wilson 8d1c7dbdff Disable generation of compact unwind encodings. <rdar://problem/10441578>
This still seems to be causing some failures.  It needs more testing before
it gets enabled again.

llvm-svn: 144543
2011-11-14 18:21:07 +00:00
Jakob Stoklund Olesen 7e07b388ac Delete stale comment.
llvm-svn: 144542
2011-11-14 18:03:05 +00:00
Jim Grosbach ee201faeac Tidy up. 80 column.
llvm-svn: 144538
2011-11-14 17:52:47 +00:00
Benjamin Kramer 0ffbcc959d Make headers standalone.
llvm-svn: 144537
2011-11-14 17:45:03 +00:00
Benjamin Kramer d00e94e882 Make headers standalone, move a virtual method out of line.
llvm-svn: 144536
2011-11-14 17:22:45 +00:00
Daniel Dunbar a5772b9278 build/Make: Switch over to using llvm-config-2 for dependencies one more (hopefully last) time, now that it also builds as a build tool.
llvm-svn: 144535
2011-11-14 17:17:45 +00:00
Chandler Carruth fd9b4d9813 It helps to deallocate memory as well as allocate it. =] This actually
cleans up all the chains allocated during the processing of each
function so that for very large inputs we don't just grow memory usage
without bound.

llvm-svn: 144533
2011-11-14 10:57:23 +00:00
Chandler Carruth 0a31d149ea Remove an over-eager assert that was firing on one of the ARM regression
tests when I forcibly enabled block placement.

It is apparantly possible for an unanalyzable block to fallthrough to
a non-loop block. I don't actually beleive this is correct, I believe
that 'canFallThrough' is returning true needlessly for the code
construct, and I've left a bit of a FIXME on the verification code to
try to track down why this is coming up.

Anyways, removing the assert doesn't degrade the correctness of the algorithm.

llvm-svn: 144532
2011-11-14 10:55:53 +00:00
Chandler Carruth 0af6a0bb69 Begin chipping away at one of the biggest quadratic-ish behaviors in
this pass. We're leaving already merged blocks on the worklist, and
scanning them again and again only to determine each time through that
indeed they aren't viable. We can instead remove them once we're going
to have to scan the worklist. This is the easy way to implement removing
them. If this remains on the profile (as I somewhat suspect it will), we
can get a lot more clever here, as the worklist's order is essentially
irrelevant. We can use swapping and fold the two loops to reduce
overhead even when there are many blocks on the worklist but only a few
of them are removed.

llvm-svn: 144531
2011-11-14 09:46:33 +00:00
Chandler Carruth 84cd44c750 Under the hood, MBPI is doing a linear scan of every successor every
time it is queried to compute the probability of a single successor.
This makes computing the probability of every successor of a block in
sequence... really really slow. ;] This switches to a linear walk of the
successors rather than a quadratic one. One of several quadratic
behaviors slowing this pass down.

I'm not really thrilled with moving the sum code into the public
interface of MBPI, but I don't (at the moment) have ideas for a better
interface. My direction I'm thinking in for a better interface is to
have MBPI actually retain much more state and make *all* of these
queries cheap. That's a lot of work, and would require invasive changes.
Until then, this seems like the least bad (ie, least quadratic)
solution. Suggestions welcome.

llvm-svn: 144530
2011-11-14 09:12:57 +00:00
Tobias Grosser 8bee91ffc6 Add clang_complete to release notes
llvm-svn: 144529
2011-11-14 09:09:26 +00:00
Tobias Grosser cfa35956c3 Add Polly to release notes
llvm-svn: 144528
2011-11-14 09:09:23 +00:00
Chandler Carruth a9e71faa0f Reuse the logic in getEdgeProbability within getHotSucc in order to
correctly handle blocks whose successor weights sum to more than
UINT32_MAX. This is slightly less efficient, but the entire thing is
already linear on the number of successors. Calling it within any hot
routine is a mistake, and indeed no one is calling it. It also
simplifies the code.

llvm-svn: 144527
2011-11-14 08:55:59 +00:00
Chandler Carruth ed5aa547bc Fix an overflow bug in MachineBranchProbabilityInfo. This pass relied on
the sum of the edge weights not overflowing uint32, and crashed when
they did. This is generally safe as BranchProbabilityInfo tries to
provide this guarantee. However, the CFG can get modified during codegen
in a way that grows the *sum* of the edge weights. This doesn't seem
unreasonable (imagine just adding more blocks all with the default
weight of 16), but it is hard to come up with a case that actually
triggers 32-bit overflow. Fortuately, the single-source GCC build is
good at this. The solution isn't very pretty, but its no worse than the
previous code. We're already summing all of the edge weights on each
query, we can sum them, check for an overflow, compute a scale, and sum
them again.

I've included a *greatly* reduced test case out of the GCC source that
triggers it. It's a pretty lame test, as it clearly is just barely
triggering the overflow. I'd like to have something that is much more
definitive, but I don't understand the fundamental pattern that triggers
an explosion in the edge weight sums.

The buggy code is duplicated within this file. I'll colapse them into
a single implementation in a subsequent commit.

llvm-svn: 144526
2011-11-14 08:50:16 +00:00
Craig Topper 182b00a2e0 Add AVX2 version of instructions to load folding tables. Also add a bunch of missing SSE/AVX instructions.
llvm-svn: 144525
2011-11-14 08:07:55 +00:00
Chandler Carruth 2432d81ee4 Add a cautionary note to this API. It was not at all obvious to me how
expensive the most useful interface to this analysis is.

Fun story -- it's also not correct. That's getting fixed in another
patch.

llvm-svn: 144523
2011-11-14 06:51:49 +00:00
Craig Topper a331515c82 Add neverHasSideEffects, mayLoad, and mayStore to many patternless SSE/AVX instructions. Remove MMX check from LowerVECTOR_SHUFFLE since MMX vector types won't go through it anyway.
llvm-svn: 144522
2011-11-14 06:46:21 +00:00
Chad Rosier 2a1df883d0 Add support for ARM halfword load/stores and signed byte loads with negative
offsets.
rdar://10412592

llvm-svn: 144518
2011-11-14 04:09:28 +00:00
Jakob Stoklund Olesen d7bcf43dc2 Use getVNInfoBefore() when it makes sense.
llvm-svn: 144517
2011-11-14 01:39:36 +00:00
Chandler Carruth 1071cfa4ae Teach machine block placement to cope with unnatural loops. These don't
get loop info structures associated with them, and so we need some way
to make forward progress selecting and placing basic blocks. The
technique used here is pretty brutal -- it just scans the list of blocks
looking for the first unplaced candidate. It keeps placing blocks like
this until the CFG becomes tractable.

The cost is somewhat unfortunate, it requires allocating a vector of all
basic block pointers eagerly. I have some ideas about how to simplify
and optimize this, but I'm trying to get the logic correct first.

Thanks to Benjamin Kramer for the reduced test case out of GCC. Sadly
there are other bugs that GCC is tickling that I'm reducing and working
on now.

llvm-svn: 144516
2011-11-14 00:00:35 +00:00
Jakob Stoklund Olesen 697979028f Use kill slots instead of the previous slot in shrinkToUses.
It's more natural to use the actual end points.

llvm-svn: 144515
2011-11-13 23:53:25 +00:00
Chandler Carruth c4a2cb34bb Cleanup some 80-columns violations and poor formatting. These snuck by
when I was reading through the code for style.

llvm-svn: 144513
2011-11-13 22:50:09 +00:00
Jakob Stoklund Olesen d8f2405e73 Terminate all dead defs at the dead slot instead of the 'next' slot.
This makes no difference for normal defs, but early clobber dead defs
now look like:

  [Slot_EarlyClobber; Slot_Dead)

instead of:

  [Slot_EarlyClobber; Slot_Register).

Live ranges for normal dead defs look like:

  [Slot_Register; Slot_Dead)

as before.

llvm-svn: 144512
2011-11-13 22:42:13 +00:00
Craig Topper 424ca7bbf5 Fix comment for LegalizeTypeAction enum.
llvm-svn: 144511
2011-11-13 22:11:24 +00:00
Jakob Stoklund Olesen ce7cc08f3a Simplify early clobber slots a bit.
llvm-svn: 144507
2011-11-13 22:05:42 +00:00
Chandler Carruth 8e1d906734 Enhance the assertion mechanisms in place to make it easier to catch
when we fail to place all the blocks of a loop. Currently this is
happening for unnatural loops, and this logic helps more immediately
point to the problem.

llvm-svn: 144504
2011-11-13 21:39:51 +00:00
Jakob Stoklund Olesen 90b5e565b6 Rename SlotIndexes to match how they are used.
The old naming scheme (load/use/def/store) can be traced back to an old
linear scan article, but the names don't match how slots are actually
used.

The load and store slots are not needed after the deferred spill code
insertion framework was deleted.

The use and def slots don't make any sense because we are using
half-open intervals as is customary in C code, but the names suggest
closed intervals.  In reality, these slots were used to distinguish
early-clobber defs from normal defs.

The new naming scheme also has 4 slots, but the names match how the
slots are really used.  This is a purely mechanical renaming, but some
of the code makes a lot more sense now.

llvm-svn: 144503
2011-11-13 20:45:27 +00:00
Craig Topper b8bcb473e2 Add BLSI, BLSMSK, and BLSR to getTargetNodeName.
llvm-svn: 144502
2011-11-13 17:31:07 +00:00
Chandler Carruth 0bb42c0f86 Teach MBP to force-merge layout successors for blocks with unanalyzable
branches that also may involve fallthrough. In the case of blocks with
no fallthrough, we can still re-order the blocks profitably. For example
instruction decoding will in some cases continue past an indirect jump,
making laying out its most likely successor there profitable.

Note, no test case. I don't know how to write a test case that exercises
this logic, but it matches the described desired semantics in
discussions with Jakob and others. If anyone has a nice example of IR
that will trigger this, that would be lovely.

Also note, there are still assertion failures in real world code with
this. I'm digging into those next, now that I know this isn't the cause.

llvm-svn: 144499
2011-11-13 12:17:28 +00:00
Chandler Carruth f9213fe721 Hoist another gross nested loop into a helper method.
llvm-svn: 144498
2011-11-13 11:42:26 +00:00
Chandler Carruth eb4ec3aea5 Add a missing doxygen comment for a helper method.
llvm-svn: 144497
2011-11-13 11:34:55 +00:00
Chandler Carruth b336172f90 Hoist a nested loop into its own method.
llvm-svn: 144496
2011-11-13 11:34:53 +00:00
Chandler Carruth 8d15078927 Rewrite #3 of machine block placement. This is based somewhat on the
second algorithm, but only loosely. It is more heavily based on the last
discussion I had with Andy. It continues to walk from the inner-most
loop outward, but there is a key difference. With this algorithm we
ensure that as we visit each loop, the entire loop is merged into
a single chain. At the end, the entire function is treated as a "loop",
and merged into a single chain. This chain forms the desired sequence of
blocks within the function. Switching to a single algorithm removes my
biggest problem with the previous approaches -- they had different
behavior depending on which system triggered the layout. Now there is
exactly one algorithm and one basis for the decision making.

The other key difference is how the chain is formed. This is based
heavily on the idea Andy mentioned of keeping a worklist of blocks that
are viable layout successors based on the CFG. Having this set allows us
to consistently select the best layout successor for each block. It is
expensive though.

The code here remains very rough. There is a lot that needs to be done
to clean up the code, and to make the runtime cost of this pass much
lower. Very much WIP, but this was a giant chunk of code and I'd rather
folks see it sooner than later. Everything remains behind a flag of
course.

I've added a couple of tests to exercise the issues that this iteration
was motivated by: loop structure preservation. I've also fixed one test
that was exhibiting the broken behavior of the previous version.

llvm-svn: 144495
2011-11-13 11:20:44 +00:00
Chad Rosier 1198d894d0 The order in which the predicate is added differs between Thumb and ARM mode. Fix predicate when in ARM mode and restore SelectIntrinsicCall.
llvm-svn: 144494
2011-11-13 09:44:21 +00:00
Chad Rosier a476e391f1 Temporarily disable SelectIntrinsicCall when in ARM mode. This is causing failures.
llvm-svn: 144492
2011-11-13 05:14:43 +00:00
Chad Rosier 5196efdf36 Fix comments.
llvm-svn: 144490
2011-11-13 04:25:02 +00:00
Chad Rosier c8cfd3a8fb Add support for emitting both signed- and zero-extend loads. Fix
SimplifyAddress to handle either a 12-bit unsigned offset or the ARM +/-imm8
offsets (addressing mode 3).  This enables a load followed by an integer 
extend to be folded into a single load.

For example:
ldrb r1, [r0]       ldrb r1, [r0]
uxtb r2, r1     =>
mov  r3, r2         mov  r3, r1

llvm-svn: 144488
2011-11-13 02:23:59 +00:00
NAKAMURA Takumi 4784df7161 Prune more RALinScan. RALinScan was also here!
llvm-svn: 144487
2011-11-13 01:33:10 +00:00
Jakob Stoklund Olesen c601d8c762 More dead code elimination in VirtRegMap.
This thing is looking a lot like a virtual register map now.

llvm-svn: 144486
2011-11-13 01:23:34 +00:00
Jakob Stoklund Olesen 28df7ef8c9 Stop tracking spill slot uses in VirtRegMap.
Nobody cared, StackSlotColoring scans the instructions to find used stack
slots.

llvm-svn: 144485
2011-11-13 01:23:30 +00:00
Jakob Stoklund Olesen 92255f27f1 Remove dead code and data from VirtRegMap.
Most of this stuff was supporting the old deferred spill code insertion
mechanism.  Modern spillers just edit machine code in place.

llvm-svn: 144484
2011-11-13 01:02:04 +00:00
Jakob Stoklund Olesen 38b3f312ca Stop tracking unused registers in VirtRegMap.
The information was only used by the register allocator in
StackSlotColoring.

llvm-svn: 144482
2011-11-13 00:39:45 +00:00
Jakob Stoklund Olesen 6ddb767fb5 Remove the -color-ss-with-regs option.
It was off by default.

The new register allocators don't have the problems that made it
necessary to reallocate registers during stack slot coloring.

llvm-svn: 144481
2011-11-13 00:31:23 +00:00
Jakob Stoklund Olesen 5343da6497 Delete VirtRegRewriter.
And there was much rejoicing.

llvm-svn: 144480
2011-11-13 00:16:01 +00:00
Jakob Stoklund Olesen 03f73ab76f Switch PBQP to VRM's trivial rewriter.
The very complicated VirtRegRewriter is going away.

llvm-svn: 144479
2011-11-13 00:02:24 +00:00
Jakob Stoklund Olesen f61a6fe221 Delete the old spilling framework from LiveIntervalAnalysis.
This is dead code, all register allocators use InlineSpiller.

llvm-svn: 144478
2011-11-12 23:57:05 +00:00
Jakob Stoklund Olesen 7ef502f6d1 Delete the 'standard' spiller with used the old spilling framework.
The current register allocators all use the inline spiller.

llvm-svn: 144477
2011-11-12 23:29:02 +00:00
Jakob Stoklund Olesen 11bb63a756 Switch PBQP to the modern InlineSpiller framework.
It is worth noting that the old spiller would split live ranges around
basic blocks. The new spiller doesn't do that.

PBQP should do its own live range splitting with
SplitEditor::splitSingleBlock() if desired.  See
RAGreedy::tryBlockSplit().

llvm-svn: 144476
2011-11-12 23:17:52 +00:00
Jakob Stoklund Olesen e7e50e6f45 Delete the linear scan register allocator.
RegAllocGreedy has been the default for six months now.

Deleting RegAllocLinearScan makes it possible to also delete
VirtRegRewriter and clean up the spiller code.

llvm-svn: 144475
2011-11-12 22:39:45 +00:00
Jakob Stoklund Olesen ce4ef9f8d5 Remove histogram tests.
Counting the number of occurences of each opcode is not a useful test.

llvm-svn: 144474
2011-11-12 22:39:40 +00:00
Jakob Stoklund Olesen 0eac531bc2 RAGreedy is better about hinting now.
Or maybe we are just getting lucky.

llvm-svn: 144473
2011-11-12 22:39:37 +00:00
Jakob Stoklund Olesen 8ec1a92afd Linear scan is going away.
llvm-svn: 144472
2011-11-12 22:39:34 +00:00
Jakob Stoklund Olesen 654d60888e XFAIL test that depends on linear scan to remove dead code.
Filed PR11364 to track the problem.  Should the register allocator
eliminate dead code?

llvm-svn: 144471
2011-11-12 22:39:30 +00:00
Jakob Stoklund Olesen fa3a8ee6e2 Remove obsolete test.
This test was committed with a bugfix to RemoveCopyByCommutingDef, but
that optimization is no longer triggered by this test.

llvm-svn: 144470
2011-11-12 22:39:27 +00:00
Jakob Stoklund Olesen 80b3d299a9 Remove obsolete test.
This test is for a very specific LocalRewriter bug.  LocalRewriter is
going away.

llvm-svn: 144469
2011-11-12 22:39:24 +00:00
Jakob Stoklund Olesen 0c7d9d90ef Remove obsolete test.
I don't think this test does what is was supposed to do, and
LocalRewriter is going away anyway.

llvm-svn: 144463
2011-11-12 20:37:57 +00:00
Jakob Stoklund Olesen 126f9779c3 Eliminate more linear scan tests.
llvm-svn: 144462
2011-11-12 20:35:26 +00:00
Jakob Stoklund Olesen 9d090daa33 Switch a couple -O0 tests to RABasic.
llvm-svn: 144461
2011-11-12 20:11:04 +00:00
Jakob Stoklund Olesen 4deff7bc1d Switch a few tests off linearscan.
llvm-svn: 144460
2011-11-12 19:53:52 +00:00
Jakob Stoklund Olesen 6ac6aa782d Delete old test of a VirtRegRewriter feature.
This test doesn't expose the issue with RAGreedy.

I filed PR11363 to track the missing InlineSpiller feature.

llvm-svn: 144459
2011-11-12 19:53:48 +00:00
Jakob Stoklund Olesen 74d091b395 Remove old test that doesn't make sense.
The test is checking that the output doesn't contains any 'mov '
strings. It does contain movl, though.

llvm-svn: 144458
2011-11-12 19:53:45 +00:00
Craig Topper 3dc75f9e3b Add more AVX2 shift lowering support. Move AVX2 variable shift to use patterns instead of custom lowering code.
llvm-svn: 144457
2011-11-12 09:58:49 +00:00
Nick Lewycky d48ab84556 Don't try to loop on iterators that are potentially invalidated inside the loop. Fixes PR11361!
llvm-svn: 144454
2011-11-12 03:09:12 +00:00
Akira Hatanaka 77733535eb Fix typo.
llvm-svn: 144453
2011-11-12 02:38:12 +00:00
Akira Hatanaka 19891f843c Implement Mips64's handling of byval arguments in LowerCall.
llvm-svn: 144452
2011-11-12 02:34:50 +00:00
Sean Callanan 0772ae1b53 Fixed the MCJIT so that it can emit not only instance
methods but also class methods for Objective-C.

Clang emits Objective-C method names with '\1' at the
beginning, and the JIT has pre-existing logic to try
prepending a '\1' when searching a module for an
instance method (that is, a method whose name begins
with '-').  I simply extended it to do the same thing
when it encountered a class method (a method whose
name begins with '+').

llvm-svn: 144451
2011-11-12 02:31:32 +00:00
Akira Hatanaka fb9bae34da Implement Mips64's handling of byval arguments in LowerFormalArguments.
llvm-svn: 144449
2011-11-12 02:29:58 +00:00
Akira Hatanaka 5ed07c03f4 64-bit arbitrary immediate pattern.
llvm-svn: 144448
2011-11-12 02:25:00 +00:00
Akira Hatanaka 202f6400ef Function for handling byval arguments.
llvm-svn: 144447
2011-11-12 02:20:46 +00:00
Daniel Dunbar 415ecbc34a LLVMBuild: Add info for gtest.
llvm-svn: 144445
2011-11-12 02:11:04 +00:00
Daniel Dunbar 52823cc91c build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies.
- The hope is that we have a tool/test to verify these are accurate (and tight) soon.

llvm-svn: 144444
2011-11-12 02:10:57 +00:00
Eli Friedman ecb453805d Make sure scalarrepl picks the correct alloca when it rewrites a bitcast. Fixes PR11353.
llvm-svn: 144442
2011-11-12 02:07:50 +00:00
Rafael Espindola e7cc8bff82 The dwarf standard says that the only differences between a out-of-line
instance and a concrete inlined instance are the use of DW_TAG_subprogram
instead of DW_TAG_inlined_subroutine and the who owns the tree.

We were also omitting DW_AT_inline from the abstract roots. To fix this,
make sure we mark abstract instance roots with DW_AT_inline even when
we have only out-of-line instances referring to them with DW_AT_abstract_origin.

FileCheck is not a very good tool for tests like this, maybe we should add
a -verify mode to llvm-dwarfdump.

llvm-svn: 144441
2011-11-12 01:57:54 +00:00
Jim Grosbach 3a3d8e82bc ARM refactor simple immediate asm operand render methods.
These immediate operands all use the same simple logic for rendering to
MCInst, so have them share the method for doing so.

llvm-svn: 144439
2011-11-12 00:58:43 +00:00
Eli Friedman 9d448e4a42 Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
llvm-svn: 144438
2011-11-12 00:35:34 +00:00
Jim Grosbach 8ca13deecf Re-apply 144430, this time with the associated isel and disassmbler bits.
Original commit msg: 'ARM assembly parsing for VST1 two-register encoding.'

llvm-svn: 144437
2011-11-12 00:31:53 +00:00
Daniel Dunbar 48032f9cde build/Make: Define a TARGET_NATIVE_ARCH variable to be a bit more precise than
ARCH, which gets tested in many more contexts.

llvm-svn: 144434
2011-11-12 00:18:02 +00:00
Eli Friedman 1347715644 Some cleanup and bulletproofing for node replacement in LegalizeDAG. To maintain LegalizeDAG invariants, whenever we a node is replaced, we must attempt to delete it, and if it still
has uses after it is replaced (which can happen in rare cases due to CSE), we must revisit it.

llvm-svn: 144432
2011-11-11 23:58:27 +00:00
Jim Grosbach 155763b630 Oops. Missed the isel half of this. revert while I sort that out.
llvm-svn: 144431
2011-11-11 23:51:31 +00:00
Jim Grosbach 28f721a2b4 ARM assembly parsing for VST1 two-register encoding.
llvm-svn: 144430
2011-11-11 23:45:47 +00:00
Jim Grosbach 609d113874 ARM optional size suffix for VLDR/VSTR syntax.
llvm-svn: 144427
2011-11-11 23:34:43 +00:00
Chad Rosier a7ebc5617d Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.
llvm-svn: 144426
2011-11-11 23:31:03 +00:00
Chad Rosier ab1a4a2301 Loosen test by using REs. Approved by Devang.
llvm-svn: 144425
2011-11-11 23:25:38 +00:00
Daniel Dunbar 7f89f4c91c CMake: Fix CMake build for new Mips tblgen file.
llvm-svn: 144423
2011-11-11 23:12:56 +00:00
Jim Grosbach 12952fef71 ARM vldm and vstm VFP instructions can take a data type suffix.
It's ignored by the assembler when present, but is legal syntax. Other
instructions have something similar, but for some mnemonics it's
only sometimes not significant, so this quick check in the parser will
need refactored into something more robust soon-ish. This gets some
basics working in the meantime.

Partial for rdar://10435264

llvm-svn: 144422
2011-11-11 23:08:10 +00:00
Daniel Dunbar dbcfb9987c build/Make: Change llvm-config-2 to be compiled as a build tool.
llvm-svn: 144421
2011-11-11 22:59:49 +00:00
Daniel Dunbar b102d5cb66 llvm-config-2: Detect when we are running out of a BuildTools development tree, so that we can always provide library/include information for the real build directory.
llvm-svn: 144420
2011-11-11 22:59:47 +00:00
Daniel Dunbar 94f3c5402d cross-build/Make: Update cross build to properly forward ARCH and
TARGETS_TO_BUILD variables to build tools submake, and also tweak echo command
to indicate when we are compiling/etc build tools.

llvm-svn: 144419
2011-11-11 22:59:45 +00:00
Daniel Dunbar 823256b3a9 build/Make: Eliminate BUILD_COMPONENT variable, which is unused.
llvm-svn: 144418
2011-11-11 22:59:42 +00:00
Daniel Dunbar 57fb3ae997 LLVMBuild: Add description files for the LLVM tools.
llvm-svn: 144417
2011-11-11 22:59:39 +00:00
Daniel Dunbar 2f39f72703 LLVMBuild: Alphabetize required_libraries lists.
llvm-svn: 144416
2011-11-11 22:59:23 +00:00
Daniel Dunbar b8a9c43d07 Target/LLVMBuild: Order components alphabetically.
llvm-svn: 144415
2011-11-11 22:59:16 +00:00
Bruno Cardoso Lopes c85e3ff334 Mips MC object code emission improvements:
"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter

llvm-svn: 144414
2011-11-11 22:58:42 +00:00
Eric Christopher 1094ded6f3 Add an option '--enable-libcpp' that will have the compiler pass on
options to use libc++ as the default c++ library.

llvm-svn: 144413
2011-11-11 22:51:42 +00:00
Jim Grosbach b68eeb3852 Nuke no longer accurate comment.
llvm-svn: 144411
2011-11-11 22:30:06 +00:00
Andrew Trick 28c1d18434 Preserve MachineMemOperands in ARMLoadStoreOptimizer.
Fixes PR8113.

llvm-svn: 144409
2011-11-11 22:18:09 +00:00
Jim Grosbach 85a2343b01 ARM allow Q registers in vldm/vstm register lists.
rdar://9672822

llvm-svn: 144407
2011-11-11 21:27:40 +00:00
Daniel Dunbar 5dcd025036 build/Make: Switch back to llvm-config for now, I foolishly forgot to think
about cross compiles.

llvm-svn: 144406
2011-11-11 20:41:06 +00:00
Nicolas Geoffray 26c328d734 Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint.
llvm-svn: 144399
2011-11-11 18:32:52 +00:00
Devang Patel a90cb76489 Move X86 specific test in X86 directory.
llvm-svn: 144395
2011-11-11 18:13:19 +00:00
Devang Patel a39794b029 Move X86 specific test in X86 directory.
llvm-svn: 144394
2011-11-11 18:10:38 +00:00
Bob Wilson c391f7ff64 Remove FIXME comment that should have been removed with r144351.
llvm-svn: 144392
2011-11-11 17:34:14 +00:00
Dan Bailey 089cc53232 allow non-device function calls in PTX when natively handling device-side printf
llvm-svn: 144388
2011-11-11 14:45:12 +00:00
Dan Bailey 80cd65bfa9 add rules in tabgen for PTX COPY_ADDRESS of frameindex
llvm-svn: 144387
2011-11-11 14:45:06 +00:00
Benjamin Kramer f554228d82 Clients are responsible for initializing the targets, remove it from the disassembler API.
This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the 
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness 
should be unaffected.

llvm-svn: 144385
2011-11-11 13:20:40 +00:00
Benjamin Kramer 48b5bbffed Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.
llvm-svn: 144384
2011-11-11 12:39:41 +00:00
Benjamin Kramer 1cc805c058 Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler.
llvm-svn: 144383
2011-11-11 12:39:35 +00:00
Craig Topper ea28a34c43 Add lowering for AVX2 shift instructions.
llvm-svn: 144380
2011-11-11 07:39:23 +00:00
Chad Rosier e19b0a9eb8 Rename variables to avoid confusion. No functionallity change intended.
llvm-svn: 144377
2011-11-11 06:27:41 +00:00
Chad Rosier 7ddd63ce4e Add support for using immediates with select instructions.
rdar://10412592

llvm-svn: 144376
2011-11-11 06:20:39 +00:00
Akira Hatanaka 4a63d1c0f0 Do not try to detect DAG combine patterns for integer multiply-add/sub if value
type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.

llvm-svn: 144373
2011-11-11 04:18:21 +00:00
Akira Hatanaka 21cbc25bbb 64-bit atomic instructions.
llvm-svn: 144372
2011-11-11 04:14:30 +00:00
Akira Hatanaka 9189d7127f Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.
llvm-svn: 144371
2011-11-11 04:11:56 +00:00
Akira Hatanaka 4bdfec57ba Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.
llvm-svn: 144370
2011-11-11 04:06:38 +00:00
Akira Hatanaka 0009dc2088 64-bit versions of jal, jalr and bal.
llvm-svn: 144368
2011-11-11 04:03:54 +00:00
Akira Hatanaka 11521863da Emit Mips64's sequence of instructions that set global register in prologue.
llvm-svn: 144367
2011-11-11 04:00:29 +00:00
Akira Hatanaka aa1f4c7986 Fix printing of MCSymbolRegExpr. Needs three closing parentheses for
VK_Mips_GPOFF_HI/LO.

llvm-svn: 144366
2011-11-11 03:58:36 +00:00
Eli Friedman c4a001478c Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
llvm-svn: 144361
2011-11-11 03:16:38 +00:00
Eric Christopher 0a917b7ad4 Initialize variable.
llvm-svn: 144360
2011-11-11 03:16:32 +00:00
Chad Rosier 023ede5649 When loading a value, treat an i1 as an i8.
llvm-svn: 144356
2011-11-11 02:38:59 +00:00
Eric Christopher c12c211c44 If we have a DIE with an AT_specification use that instead of the normal
addr DIE when adding to the dwarf accelerator tables.

llvm-svn: 144354
2011-11-11 01:55:22 +00:00
Eli Friedman 0a309292c4 Get rid of an optimization in SCCP which appears to have many issues. Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which
lead to it trying to re-mark a value marked as a constant with a different value.  It also appears to trigger very rarely.

Fixes PR11357.

llvm-svn: 144352
2011-11-11 01:16:15 +00:00
Bill Wendling 70976ad9c2 Reenable compact unwinding now that <rdar://problem/10430076> is fixed.
llvm-svn: 144351
2011-11-11 01:03:50 +00:00
Bill Wendling 8df8204554 If we have to reset the calculation of the compact encoding, then also reset the
"saved register" index.
<rdar://problem/10430076>

llvm-svn: 144350
2011-11-11 00:59:14 +00:00
Chad Rosier 2a3503e061 Add support for using MVN to materialize negative constants.
rdar://10412592

llvm-svn: 144348
2011-11-11 00:36:21 +00:00
Bill Wendling f311655e3f Disable compact unwind generation until I can solve the codegen problems.
llvm-svn: 144346
2011-11-11 00:28:42 +00:00
Daniel Dunbar f258ad81c0 llvm-build: Add --configure-target-def-file option.
- Can be used to generate the substitution values we currently use for the various target related .def files.

llvm-svn: 144345
2011-11-11 00:24:00 +00:00
Daniel Dunbar 6d617b48c7 LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
llvm-svn: 144344
2011-11-11 00:23:56 +00:00
Jim Grosbach d9a9be269c Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.
rdar://10429490

llvm-svn: 144338
2011-11-10 23:58:34 +00:00
Jim Grosbach afad053141 ARM let processInstruction() tranforms chain.
llvm-svn: 144337
2011-11-10 23:42:14 +00:00
Nicolas Geoffray 5e515797b6 Add blurb for VMKit.
llvm-svn: 144336
2011-11-10 23:37:56 +00:00
Daniel Dunbar a2193ab418 build/Make: llvm-config-2 needs to use EXEEXT, since it is an actual executable
now.

llvm-svn: 144335
2011-11-10 23:33:20 +00:00
Daniel Dunbar eb3179e57a Fix typo.
llvm-svn: 144334
2011-11-10 23:33:18 +00:00
Jim Grosbach 9bded9dc24 Thumb2 parsing for push/pop w/ hi registers in the reglist.
rdar://10130228.

llvm-svn: 144331
2011-11-10 23:17:11 +00:00
Jim Grosbach a113eb0205 Thumb1 diagnostics for reglist on PUSH/POP fix.
Was not checking the first register in the register list.

llvm-svn: 144329
2011-11-10 23:01:27 +00:00
Daniel Dunbar 105c7edf7c git: Add tools/lldb to the ignore list.
llvm-svn: 144328
2011-11-10 22:55:50 +00:00
Rafael Espindola 79278365d3 Check in getOrCreateSubprogramDIE if a declaration exists and if so output
it first.

This is a more general fix to pr11300.

llvm-svn: 144324
2011-11-10 22:34:29 +00:00
Daniel Dunbar 86660ab0b0 build/Make: Try to switch over to llvm-config-2 again, now that I've cleaned up
some more of the explicit dependencies. I'm staging things more slowly this time
in case there is more unanticipated fallout.

llvm-svn: 144323
2011-11-10 22:11:04 +00:00
Jim Grosbach 5a5ce63742 Thumb MUL assembly parsing for 3-operand form.
Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.

rdar://10428630

llvm-svn: 144322
2011-11-10 22:10:12 +00:00
Daniel Dunbar 085f6f2af1 build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler
that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.

llvm-svn: 144321
2011-11-10 22:00:37 +00:00
Daniel Dunbar b27317f7dd build/MCDisassembler: Fix required libraries list of MCDisassembler to use
all-targets instead of an explicit list.

llvm-svn: 144320
2011-11-10 22:00:34 +00:00
Eric Christopher 66b37db641 Make types and namespaces take multiple DIEs for the accelerator tables
as well.

llvm-svn: 144319
2011-11-10 21:47:55 +00:00
Chris Lattner 9304ea4306 Remove a really ancient line from the default 'make clean' rule that attempts
to delete core files.  This causes a warning in clang/lib/StaticAnalyzer on
case insensitive filesystems, since it contains a "Core" directory.  Since this
is pointless anyway, just zap it.

llvm-svn: 144317
2011-11-10 21:12:28 +00:00
Chad Rosier d1762e00e2 When in ARM mode, LDRH/STRH require special handling of negative offsets.
For correctness, disable this for now.
rdar://10418009

llvm-svn: 144316
2011-11-10 21:09:49 +00:00
Jim Grosbach 42ba6286b6 ARM .thumb_func directive for quoted symbol names.
Use the getIdentifier() method of the token, not getString(), otherwise
we keep the quotes as part of the symbol name, which we don't want.

rdar://10428015

llvm-svn: 144315
2011-11-10 20:48:53 +00:00
Tony Linthicum 3a9d77f4c1 test commit undo
llvm-svn: 144314
2011-11-10 20:39:51 +00:00
Tony Linthicum 1aff5b237b test commit redux
llvm-svn: 144313
2011-11-10 20:23:28 +00:00
Pete Cooper a4237c380e Fixed bug in DeadStoreElimination commit r144239
Size of data being pointed to wasn't always being checked so some small writes were killing big writes

Fixes <rdar://problem/10426753>

llvm-svn: 144312
2011-11-10 20:22:08 +00:00
Chris Lattner 6d3eeec068 random notes, llvm-gcc is gone, fix a few broken tags.
llvm-svn: 144311
2011-11-10 20:15:40 +00:00
Daniel Dunbar 933b43f188 Revert r144300 "llvm-config: Replace with C++ version (was llvm-config-2).",
which didn't appear ready for prime time.

llvm-svn: 144309
2011-11-10 19:59:35 +00:00
Tony Linthicum b9848b2115 undo test commit
llvm-svn: 144308
2011-11-10 19:58:22 +00:00
Tony Linthicum f0f05dfaf6 test commit
llvm-svn: 144307
2011-11-10 19:58:03 +00:00
Eric Christopher e288793e44 Move type handling to make sure we get all created types that aren't
forward decls and have names into the dwarf accelerator types table.

llvm-svn: 144306
2011-11-10 19:52:58 +00:00
Eric Christopher d9843b34e6 Rework adding function names to the dwarf accelerator tables, allow
multiple dies per function and support C++ basenames.

llvm-svn: 144304
2011-11-10 19:25:34 +00:00
Owen Anderson c5c49466a1 Add additional checking to ensure that MachineMemOperands are never set to null, which can happen in weird circumstances where target intrinsic hooks are implemented incorrectly.
llvm-svn: 144303
2011-11-10 19:25:09 +00:00
Jim Grosbach c14871cc67 ARM assembly parsing for LSR/LSL/ROR(immediate).
More of rdar://9704684

llvm-svn: 144301
2011-11-10 19:18:01 +00:00
Daniel Dunbar 166c804893 llvm-config: Replace with C++ version (was llvm-config-2).
llvm-svn: 144300
2011-11-10 18:49:59 +00:00
Daniel Dunbar f5b9658a25 llvm-config-2: Use USEDLIBS directly instead of LINK_COMPONENTS, which will
require this tool to resolve (currently).

llvm-svn: 144299
2011-11-10 18:49:50 +00:00
Duncan Sands a294c549ca Release notes for DragonEgg.
llvm-svn: 144298
2011-11-10 18:44:29 +00:00
Jim Grosbach 61db5a59f7 ARM assembly parsing for ASR(immediate).
Start of rdar://9704684

llvm-svn: 144293
2011-11-10 16:44:55 +00:00
Daniel Dunbar b538095011 build: Rename CBackend and CppBackend libraries to have CodeGen suffix, for
consistency with other targets.

llvm-svn: 144292
2011-11-10 15:35:14 +00:00
Daniel Dunbar fe999b4799 llvm-config-2: Fix thinko in maintenance of visited component set.
llvm-svn: 144291
2011-11-10 14:53:23 +00:00
NAKAMURA Takumi 270354100a test/CodeGen/X86/lsr-loop-exit-cond.ll: Try to appease linux and freebsd bots to specify explicit -mtriple=x86_64-darwin.
I guess it expects -relocation-model=pic.

llvm-svn: 144290
2011-11-10 14:18:59 +00:00
Evan Cheng d33b2d6b7a Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
instruction lower optimization" in the pre-RA scheduler.

The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.

Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.

llvm-svn: 144267
2011-11-10 07:43:16 +00:00
Nadav Rotem 0a2f797dec AVX2: Add variable shift from memory.
Note: These patterns only works in some cases because
many times the load sd node is bitcasted from a load
node of a different type.

llvm-svn: 144266
2011-11-10 06:54:20 +00:00
Chad Rosier 3fbd094ad9 For immediate encodings of icmp, zero or sign extend first. Then
determine if the value is negative and flip the sign accordingly.
rdar://10422026

llvm-svn: 144258
2011-11-10 01:30:39 +00:00
Daniel Dunbar 807c6e4e5f build/Make & CMake: Pass the appropriate --native-target and --enable-targets
options to llvm-build, so the all-targets etc. components are defined properly.

llvm-svn: 144255
2011-11-10 01:16:48 +00:00
Daniel Dunbar 233c9304a8 llvm-build: Add --native-target and --enable-targets options, and add logic to
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
 - We still require these components to be in the project (currently in
   lib/Target) so that we have a place to document them and hopefully make it
   more obvious that they are "magic".

llvm-svn: 144253
2011-11-10 00:50:07 +00:00
Daniel Dunbar 79fa1e8891 llvm-build: Split out the validation logic.
llvm-svn: 144252
2011-11-10 00:49:58 +00:00
Daniel Dunbar 1c04e14447 llvm-build: Change CBackend and CppBackend to not use library_name. This will
change the generated library .a file name once we fully switch over, but
simplifies how we treat these targets without requiring more special casing
(since their library group name and the codegen library name currently map to
the same "llvm-config" style component name).

llvm-svn: 144251
2011-11-10 00:49:55 +00:00
Daniel Dunbar 82219ad4dc llvm-build: Add an explicit component type to represent targets.
- Gives us a place to hang target specific metadata (like whether the target has a JIT).

llvm-svn: 144250
2011-11-10 00:49:51 +00:00
Daniel Dunbar c83a459937 llvm-build: Tidy up options.
llvm-svn: 144249
2011-11-10 00:49:42 +00:00
Jakob Stoklund Olesen eef48b6938 Strip old implicit operands after foldMemoryOperand.
The TII.foldMemoryOperand hook preserves implicit operands from the
original instruction.  This is not what we want when those implicit
operands refer to the register being spilled.

Implicit operands referring to other registers are preserved.

This fixes PR11347.

llvm-svn: 144247
2011-11-10 00:17:03 +00:00
Owen Anderson 133ccfcc22 Remove this from the CMake build since I erased the file.
llvm-svn: 144245
2011-11-10 00:07:22 +00:00
Jim Grosbach a48485a37f Tidy up.
llvm-svn: 144244
2011-11-10 00:02:33 +00:00
Owen Anderson efc349af6c Remove the old-style ARM disassembler, which is no longer used.
llvm-svn: 144243
2011-11-09 23:56:06 +00:00
Jim Grosbach 25bc090170 Thumb2 assembly parsing STMDB w/ optional .w suffix.
rdar://10422955

llvm-svn: 144242
2011-11-09 23:44:23 +00:00
Eli Friedman 2d4055b683 Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
llvm-svn: 144241
2011-11-09 23:36:02 +00:00
Pete Cooper 856977cb15 DeadStoreElimination can now trim the size of a store if the end of the store is dead.
Currently checks alignment and killing stores on a power of 2 boundary as this is likely
to trim the size of the earlier store without breaking large vector stores into scalar ones.

Fixes <rdar://problem/10140300>

llvm-svn: 144239
2011-11-09 23:07:35 +00:00
Nick Lewycky 47eebcfd66 Fix typo in comment.
llvm-svn: 144236
2011-11-09 22:45:04 +00:00
Eli Friedman 53218b6fcc Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
llvm-svn: 144216
2011-11-09 22:25:12 +00:00
Chad Rosier 2f27fab6ed The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12.
rdar://10418009

llvm-svn: 144213
2011-11-09 21:30:12 +00:00
Nadav Rotem 1938482bfa AVX2: Add patterns for variable shift operations
llvm-svn: 144212
2011-11-09 21:22:13 +00:00
Devang Patel 2f70bcdb94 Remove unnecessary include.
llvm-svn: 144211
2011-11-09 21:11:02 +00:00
Chad Rosier c22f6518b2 Use REs to remove dependencies on the register allocation order.
llvm-svn: 144209
2011-11-09 20:06:13 +00:00
Bill Wendling 302d7ce0ab Reformat the quote and tag the math stuff with <tt> tags.
llvm-svn: 144204
2011-11-09 19:33:56 +00:00
Daniel Dunbar 5d9ae5ca23 llvm-config: Drop 'backend' pseudo-component. We don't support/qualify the CBE
enough to have this be useful.

llvm-svn: 144202
2011-11-09 19:23:15 +00:00
Daniel Dunbar 7b44212e3c llvm-config-2: Switch to using real library dependency table.
- Also, fix a refacto that left extra "all" component in list (this is now
   defined in the groups explicitly)
 - Reapply of r143879 now that Make should see needed deps.

llvm-svn: 144201
2011-11-09 19:14:51 +00:00
Eric Christopher 0c7c931dbf Fix typo.
llvm-svn: 144198
2011-11-09 18:53:37 +00:00
Daniel Dunbar 83b700977e build/Make: Fix some missing dependencies on the llvm-build generation step.
llvm-svn: 144197
2011-11-09 18:48:22 +00:00
Benjamin Kramer 966ed1b698 Add comments.
llvm-svn: 144194
2011-11-09 18:16:11 +00:00
Duncan Sands 635e4efca0 Speculatively revert commit 144124 (djg) in the hope that the 32 bit
dragonegg self-host buildbot will recover (it is complaining about object
files differing between different build stages).  Original commit message:

Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.

llvm-svn: 144188
2011-11-09 14:20:48 +00:00
Nadav Rotem 79135d844d Add AVX2 support for vselect of v32i8
llvm-svn: 144187
2011-11-09 13:21:28 +00:00
Benjamin Kramer 6312682b46 Simplify code. No functionality change.
llvm-svn: 144186
2011-11-09 13:19:15 +00:00
Benjamin Kramer 148db36263 Take advantage of the zero byte in StringMap when emitting dwarf stringpool entries.
llvm-svn: 144184
2011-11-09 12:12:04 +00:00
Wojciech Matyjewicz 0c48772aaa Minor fixes in Makefiles for the OCaml bindings:
1. Interface files (.mli) are installed before compiled interface
   files (.cmi) to preserve timestamp relation.
2. install-meta should use $(OcamlDir) instead of $(ObjDir).
3. Declared some targets as .PHONY.

Patch by Christophe Raffalli.

llvm-svn: 144183
2011-11-09 12:00:39 +00:00
Craig Topper f87a2bef51 Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions.
llvm-svn: 144179
2011-11-09 09:37:21 +00:00
NAKAMURA Takumi 862130c61a unittests/MultiJITTest.cpp: Tweak how to check symbol value for Win32 --enable-shared.
getPointerToNamedFunction might be indirect jump on Win32 --enable-shared.
FF 25 <disp32>: jmp *(pointer to IAT)

llvm-svn: 144178
2011-11-09 08:30:43 +00:00
Craig Topper c9eb09d3b8 Add instruction selection for AVX2 integer comparisons.
llvm-svn: 144176
2011-11-09 08:06:13 +00:00
Craig Topper 8c8a431057 Add AVX2 instruction lowering for add, sub, and mul.
llvm-svn: 144174
2011-11-09 07:28:55 +00:00
Nick Lewycky 0485d51a76 Don't forget to check FlagNW when determining whether an AddRecExpr will wrap
or not. Patch by Brendon Cahoon!

llvm-svn: 144173
2011-11-09 07:11:37 +00:00
Devang Patel fa4520968b Remove extra ';'
llvm-svn: 144172
2011-11-09 06:20:49 +00:00
Eric Christopher 5223a57533 Remove the pubnames section, no one consumes it.
llvm-svn: 144169
2011-11-09 05:24:07 +00:00
Eli Friedman b3c8febd1e Enhance verifyLoop so that it can reliably verify that every block in a loop is reachable from the loop header.
llvm-svn: 144166
2011-11-09 04:16:01 +00:00
John McCall a6db70b049 Use isa<> instead of dyn_cast<> as suggested by Nick.
Should've read the patch a bit closer, sorry.

llvm-svn: 144164
2011-11-09 03:26:50 +00:00