Commit Graph

55 Commits

Author SHA1 Message Date
Dimitry Andric 7dbbb5d3a4 compiler-rt: Use FreeBSD's elf_aux_info to detect AArch64 HW features
Using the out-of-line LSE atomics helpers for AArch64 on FreeBSD also
requires adding support for initializing __aarch64_have_lse_atomics
correctly. On Linux this is done with getauxval(3), on FreeBSD with
elf_aux_info(3), which has a slightly different interface.

Differential Revision: https://reviews.llvm.org/D109330
2021-11-20 12:12:03 +01:00
Freddy Ye d268c20070 [X86] Support auto-detect for tigerlake and alderlake
Differential Revision: https://reviews.llvm.org/D107245
2021-08-02 11:01:01 +08:00
Freddy Ye b28ec3fd18 [compiler-rt][X86] fix build fail after "[X86] Support -march=rocketlake"
This copy error will cause a failed builder on sanitizer-x86_64-linux
2021-04-13 14:33:12 +08:00
Freddy Ye 3fc1fe8db8 [X86] Support -march=rocketlake
Reviewed By: skan, craig.topper, MaskRay

Differential Revision: https://reviews.llvm.org/D100085
2021-04-13 09:48:13 +08:00
Benjamin Kramer 2a136a7a9c [X86] Autodetect znver3 2020-12-05 19:08:20 +01:00
Pavel Iliin a4ac434c47 [AArch64] Compiler-rt interface for out-of-line atomics.
Out-of-line helper functions to support LSE deployment added.
This is a port of libgcc implementation:
https://gcc.gnu.org/git/?p=gcc.git;h=33befddcb849235353dc263db1c7d07dc15c9faa

Differential Revision: https://reviews.llvm.org/D91156
2020-12-02 20:07:12 +00:00
Benjamin Kramer 39a0d6889d [X86] Add a stub for Intel's alderlake.
No scheduling, no autodetection.
2020-10-24 19:01:22 +02:00
Freddy Ye e02d081f2b [X86] Support -march=sapphirerapids
Support -march=sapphirerapids for x86.
Compare with Icelake Server, it includes 14 more new features. They are
amxtile, amxint8, amxbf16, avx512bf16, avx512vp2intersect, cldemote,
enqcmd, movdir64b, movdiri, ptwrite, serialize, shstk, tsxldtrk, waitpkg.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D86503
2020-08-25 14:21:21 +08:00
Craig Topper df9a9bb7be [X86] Correct the implementation of the testFeature macro in getIntelProcessorTypeAndSubtype to do a proper bit test.
Instead of ANDing with a one hot mask representing the bit to
be tested, we were ANDing with just the bit number. This tests
multiple bits none of them the correct one.

This caused skylake-avx512, cascadelake and cooperlake to all
be misdetected. Based on experiments with the Intel SDE, it seems
that all of these CPUs are being detected as being cooperlake.
This is bad since its the newest CPU of the 3.
2020-08-20 23:50:45 -07:00
Craig Topper b92c2bb6a2 [X86] Add CPU name strings to getIntelProcessorTypeAndSubtype and getAMDProcessorTypeAndSubtype in compiler-rt.
These aren't used in compiler-rt, but I plan to make a similar
change to the equivalent code in Host.cpp where the mapping from
type/subtype is an unnecessary complication. Having the CPU strings
here will help keep the code somewhat synchronized.
2020-07-12 12:59:25 -07:00
Craig Topper 23654d9e7a Recommit "[X86] Calculate the needed size of the feature arrays in _cpu_indicator_init and getHostCPUName using the size of the feature enum."
Hopefully this version will fix the previously buildbot failure
2020-06-22 13:32:03 -07:00
Craig Topper bebea4221d Revert "[X86] Calculate the needed size of the feature arrays in _cpu_indicator_init and getHostCPUName using the size of the feature enum."
Seems to breaking build.

This reverts commit 5ac144fe64.
2020-06-22 12:20:40 -07:00
Craig Topper 5ac144fe64 [X86] Calculate the needed size of the feature arrays in _cpu_indicator_init and getHostCPUName using the size of the feature enum.
Move 0 initialization up to the caller so we don't need to know
the size.
2020-06-22 11:46:20 -07:00
Craig Topper 90406d62e5 [X86] Add cooperlake and tigerlake to the enum in cpu_model.c
I forgot to do this when I added then to _cpu_indicator_init.
2020-06-21 16:20:26 -07:00
Craig Topper 0e6c9316d4 [X86] Add cooperlake detection to _cpu_indicator_init.
libgcc has this enum encoding defined for a while, but their
detection code is missing. I've raised a bug with them so that
should get fixed soon.
2020-06-21 13:02:33 -07:00
Craig Topper 35f7d58328 [X86] Set the cpu_vendor in __cpu_indicator_init to VENDOR_OTHER if cpuid isn't supported on the CPU.
We need to set the cpu_vendor to a non-zero value to indicate
that we already called __cpu_indicator_init once.

This should only happen on a 386 or 486 CPU.
2020-06-20 15:36:04 -07:00
Craig Topper 033bf61cc5 [X86] Remove brand_id check from cpu_indicator_init.
Brand index was a feature some Pentium III and Pentium 4 CPUs.
It provided an index into a software lookup table to provide a
brand name for the CPU. This is separate from the family/model.

It's unclear to me why this index being non-zero was used to
block checking family/model. None of the CPUs that had a non-zero
brand index are supported by __builtin_cpu_is or target
multi-versioning so this should have no real effect.
2020-06-12 20:35:48 -07:00
Craig Topper 94ccb2acbf [X86] Combine to two feature variables in __cpu_indicator_init into an array and pass them around as pointer we can treat as an array.
This simplifies the indexing code to set and test bits.
2020-06-12 18:30:41 -07:00
Craig Topper e424a3526a [X86] Explicitly initialize __cpu_features2 global in compiler-rt to 0.
Seems like this may be needed in order for the linker to find the
symbol. At least on my Mac.
2020-06-12 18:30:34 -07:00
Craig Topper 2bb822bc90 [X86] Add family/model for Intel Comet Lake CPUs for -march=native and function multiversioning
This adds the family/model returned by CPUID for some Intel
Comet Lake CPUs. Instruction set and tuning wise these are
the same as "skylake".

These are not in the Intel SDM yet, but these should be correct.
2020-05-24 00:29:25 -07:00
Craig Topper 95bc21f32f [X86] Add avx512vp2intersect feature to compiler-rt's feature detection to match libgcc. 2020-05-21 21:54:54 -07:00
Florian Hahn a70c3f9f45 [compiler-rt] Don't check XCR0 when detecting avx512 on Darwin.
Darwin lazily saves the AVX512 context on first use [1]: instead of checking
that it already does to figure out if the OS supports AVX512, trust that
the kernel will do the right thing and always assume the context save
support is available.

[1] https://github.com/apple/darwin-xnu/blob/xnu-4903.221.2/osfmk/i386/fpu.c#L174

Reviewers: ab, RKSimon, craig.topper

Reviewed By: craig.topper

Subscribers: dberris, JDevlieghere, #sanitizers, llvm-commits

Tags: #sanitizers, #llvm

Differential Revision: https://reviews.llvm.org/D70454
2019-11-21 09:19:17 +00:00
Craig Topper ff75bf6ac9 [X86] Add AMD Matisse (znver2) model number to getHostCPUName and compiler-rt's getAMDProcessorTypeAndSubtype.
This is the CPUID model used on Ryzen 3000 series (Zen 2/Matisse) CPUs.

Patch by Alex James

Differential Revision: https://reviews.llvm.org/D70279
2019-11-18 11:57:04 -08:00
Craig Topper 5465875e93 [X86] Add support for avx512bf16 for __builtin_cpu_supports and compiler-rt's cpu indicator.
llvm-svn: 370915
2019-09-04 16:01:43 +00:00
Peter Collingbourne f7ca57468a Move a break into the correct place. NFCI.
Should silence new C fallthrough warning.

llvm-svn: 369813
2019-08-23 21:27:56 +00:00
Eric Christopher 1d73e228db BMI2 support is indicated in bit eight of EBX, not nine.
See Intel SDM, Vol 2A, Table 3-8:
https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-2a-manual.pdf#page=296

Differential Revision: https://reviews.llvm.org/D65766

llvm-svn: 367929
2019-08-05 21:25:59 +00:00
Craig Topper 6dbf4a86a7 [X86] Add more icelake model numbers to compiler-rt implementation of __builtin_cpu_is.
Using model numbers found in Table 2-1 of the May 2019 version
of the Intel Software Developer's Manual Volume 4.

llvm-svn: 361423
2019-05-22 19:51:48 +00:00
Craig Topper b93f8ae7a7 [X86] Add icelake-client and tremont model numbers to compiler-rt's implementation of __builtin_cpu_is.
llvm-svn: 361175
2019-05-20 16:58:38 +00:00
Petr Hosek 0ba22f51d1 [builtins] Use single line C++/C99 comment style
Use the uniform single line C++/99 style for code comments.

This is part of the cleanup proposed in "[RFC] compiler-rt builtins
cleanup and refactoring".

Differential Revision: https://reviews.llvm.org/D60352

llvm-svn: 359411
2019-04-28 22:47:49 +00:00
Petr Hosek 082b89b25f [builtins] Reformat builtins with clang-format
Update formatting to use the LLVM style.

This is part of the cleanup proposed in "[RFC] compiler-rt builtins
cleanup and refactoring".

Differential Revision: https://reviews.llvm.org/D60351

llvm-svn: 359410
2019-04-28 21:53:32 +00:00
Sterling Augustine 86724e40bf Make __cpu_model a hidden symbol, to match libgcc.
Also hide __cpu_inicator_init and __cpu_features2
for similar reasons.

Summary: Make __cpu_model a hidden symbol, to match libgcc.

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59561

llvm-svn: 356581
2019-03-20 17:37:23 +00:00
Craig Topper 938d3f461b [X86] Add 'znver2' and 'cascadelake' support to __cpu_indicator_init.
For 'cascadelake' this is adding a 'avx512vnni' feature check to the 0x55 skylake-avx512 model check. These CPUs use the same model number and only differ in the stepping number. But the feature flag is simpler than collecting all the stepping numbers.

For 'znver2' this is just syncing with LLVM's Host.cpp.

llvm-svn: 354927
2019-02-26 21:51:05 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Benjamin Kramer a2ada4d1ce [X86][compiler-rt] Add missing semicolon
llvm-svn: 347519
2018-11-24 20:57:03 +00:00
Craig Topper 428caa398c [X86] Make conversion of feature bits into a mask explicitly unsigned by using 1U instead of 1.
llvm-svn: 347517
2018-11-24 20:25:45 +00:00
Craig Topper 62e5924dd6 [X86][compiler-rt] Attempt to fix a warning about a shift amount being negative in a macro expansion.
llvm-svn: 347516
2018-11-24 20:14:03 +00:00
Craig Topper 3fe6470951 [X86][compiler-rt] Add additional CPUs and features to the cpu detection to match libgcc
Summary: This patch adds additional features and cpus from libgcc. Unfortunately we've overflowed the existing 32-bits of features so we had to add a new __cpu_features2 variable to hold the additional bits. This matches libgcc as far as I can tell.

Reviewers: echristo

Reviewed By: echristo

Subscribers: dberris, llvm-commits

Differential Revision: https://reviews.llvm.org/D53461

llvm-svn: 344830
2018-10-20 03:49:04 +00:00
Roman Lebedev e8e95b5b01 [compiler-rt][X86][AMD][Bulldozer] Fix Bulldozer Model 2 detection.
Summary:
The compiler-rt side of D46314

I have discovered an issue by accident.
```
$ lscpu
Architecture:        x86_64
CPU op-mode(s):      32-bit, 64-bit
Byte Order:          Little Endian
CPU(s):              8
On-line CPU(s) list: 0-7
Thread(s) per core:  2
Core(s) per socket:  4
Socket(s):           1
NUMA node(s):        1
Vendor ID:           AuthenticAMD
CPU family:          21
Model:               2
Model name:          AMD FX(tm)-8350 Eight-Core Processor
Stepping:            0
CPU MHz:             3584.018
CPU max MHz:         4000.0000
CPU min MHz:         1400.0000
BogoMIPS:            8027.22
Virtualization:      AMD-V
L1d cache:           16K
L1i cache:           64K
L2 cache:            2048K
L3 cache:            8192K
NUMA node0 CPU(s):   0-7
Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_pstate vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold
```
So this is model-2 bulldozer AMD CPU.

GCC agrees:
```
$ echo | gcc -E - -march=native -###
<...>
 /usr/lib/gcc/x86_64-linux-gnu/7/cc1 -E -quiet -imultiarch x86_64-linux-gnu - "-march=bdver2" -mmmx -mno-3dnow -msse -msse2 -msse3 -mssse3 -msse4a -mcx16 -msahf -mno-movbe -maes -mno-sha -mpclmul -mpopcnt -mabm -mlwp -mfma -mfma4 -mxop -mbmi -mno-sgx -mno-bmi2 -mtbm -mavx -mno-avx2 -msse4.2 -msse4.1 -mlzcnt -mno-rtm -mno-hle -mno-rdrnd -mf16c -mno-fsgsbase -mno-rdseed -mprfchw -mno-adx -mfxsr -mxsave -mno-xsaveopt -mno-avx512f -mno-avx512er -mno-avx512cd -mno-avx512pf -mno-prefetchwt1 -mno-clflushopt -mno-xsavec -mno-xsaves -mno-avx512dq -mno-avx512bw -mno-avx512vl -mno-avx512ifma -mno-avx512vbmi -mno-avx5124fmaps -mno-avx5124vnniw -mno-clwb -mno-mwaitx -mno-clzero -mno-pku -mno-rdpid --param "l1-cache-size=16" --param "l1-cache-line-size=64" --param "l2-cache-size=2048" "-mtune=bdver2"
<...>
```

But clang does not: (look for `bdver1`)
```
$ echo | clang -E - -march=native -###
clang version 7.0.0- (trunk)
Target: x86_64-pc-linux-gnu
Thread model: posix
InstalledDir: /usr/local/bin
 "/usr/lib/llvm-7/bin/clang" "-cc1" "-triple" "x86_64-pc-linux-gnu" "-E" "-disable-free" "-disable-llvm-verifier" "-discard-value-names" "-main-file-name" "-" "-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-munwind-tables" "-fuse-init-array" "-target-cpu" "bdver1" "-target-feature" "+sse2" "-target-feature" "+cx16" "-target-feature" "+sahf" "-target-feature" "+tbm" "-target-feature" "-avx512ifma" "-target-feature" "-sha" "-target-feature" "-gfni" "-target-feature" "+fma4" "-target-feature" "-vpclmulqdq" "-target-feature" "+prfchw" "-target-feature" "-bmi2" "-target-feature" "-cldemote" "-target-feature" "-fsgsbase" "-target-feature" "-xsavec" "-target-feature" "+popcnt" "-target-feature" "+aes" "-target-feature" "-avx512bitalg" "-target-feature" "-xsaves" "-target-feature" "-avx512er" "-target-feature" "-avx512vnni" "-target-feature" "-avx512vpopcntdq" "-target-feature" "-clwb" "-target-feature" "-avx512f" "-target-feature" "-clzero" "-target-feature" "-pku" "-target-feature" "+mmx" "-target-feature" "+lwp" "-target-feature" "-rdpid" "-target-feature" "+xop" "-target-feature" "-rdseed" "-target-feature" "-waitpkg" "-target-feature" "-ibt" "-target-feature" "+sse4a" "-target-feature" "-avx512bw" "-target-feature" "-clflushopt" "-target-feature" "+xsave" "-target-feature" "-avx512vbmi2" "-target-feature" "-avx512vl" "-target-feature" "-avx512cd" "-target-feature" "+avx" "-target-feature" "-vaes" "-target-feature" "-rtm" "-target-feature" "+fma" "-target-feature" "+bmi" "-target-feature" "-rdrnd" "-target-feature" "-mwaitx" "-target-feature" "+sse4.1" "-target-feature" "+sse4.2" "-target-feature" "-avx2" "-target-feature" "-wbnoinvd" "-target-feature" "+sse" "-target-feature" "+lzcnt" "-target-feature" "+pclmul" "-target-feature" "-prefetchwt1" "-target-feature" "+f16c" "-target-feature" "+ssse3" "-target-feature" "-sgx" "-target-feature" "-shstk" "-target-feature" "+cmov" "-target-feature" "-avx512vbmi" "-target-feature" "-movbe" "-target-feature" "-xsaveopt" "-target-feature" "-avx512dq" "-target-feature" "-adx" "-target-feature" "-avx512pf" "-target-feature" "+sse3" "-dwarf-column-info" "-debugger-tuning=gdb" "-resource-dir" "/usr/lib/llvm-7/lib/clang/7.0.0" "-internal-isystem" "/usr/local/include" "-internal-isystem" "/usr/lib/llvm-7/lib/clang/7.0.0/include" "-internal-externc-isystem" "/usr/include/x86_64-linux-gnu" "-internal-externc-isystem" "/include" "-internal-externc-isystem" "/usr/include" "-fdebug-compilation-dir" "/build/llvm-build-Clang-release" "-ferror-limit" "19" "-fmessage-length" "271" "-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o" "-" "-x" "c" "-"
```

So clang, unlike gcc, considers this to be `bdver1`.

After some digging, i've come across `getAMDProcessorTypeAndSubtype()` in `Host.cpp`.
I have added the following debug printf after the call to that function in `sys::getHostCPUName()`:
```
errs() << "Family " << Family << " Model " << Model << " Type " << Type "\n";
```
Which produced:
```
Family 21 Model 2 Type 5
```
Which matches the `lscpu` output.

As it was pointed in the review by @craig.topper:
>>! In D46314#1084123, @craig.topper wrote:
> I dont' think this is right. Here is what I found on wikipedia. https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures.
>
> AMD Bulldozer Family 15h - the successor of 10h/K10. Bulldozer is designed for processors in the 10 to 220W category, implementing XOP, FMA4 and CVT16 instruction sets. Orochi was the first design which implemented it. For Bulldozer, CPUID model numbers are 00h and 01h.
> AMD Piledriver Family 15h (2nd-gen) - successor to Bulldozer. CPUID model numbers are 02h (earliest "Vishera" Piledrivers) and 10h-1Fh.
> AMD Steamroller Family 15h (3rd-gen) - third-generation Bulldozer derived core. CPUID model numbers are 30h-3Fh.
> AMD Excavator Family 15h (4th-gen) - fourth-generation Bulldozer derived core. CPUID model numbers are 60h-6Fh, later updated revisions have model numbers 70h-7Fh.
>
>
> So there's a weird exception where model 2 should go with 0x10-0x1f.

Though It does not help that the code can't be tested at the moment.
With this logical change, the `bdver2` is properly detected.
```
$ echo | /build/llvm-build-Clang-release/bin/clang -E - -march=native -###
clang version 7.0.0 (trunk 331249) (llvm/trunk 331256)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /build/llvm-build-Clang-release/bin
 "/build/llvm-build-Clang-release/bin/clang-7" "-cc1" "-triple" "x86_64-unknown-linux-gnu" "-E" "-disable-free" "-main-file-name" "-" "-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-munwind-tables" "-fuse-init-array" "-target-cpu" "bdver2" "-target-feature" "+sse2" "-target-feature" "+cx16" "-target-feature" "+sahf" "-target-feature" "+tbm" "-target-feature" "-avx512ifma" "-target-feature" "-sha" "-target-feature" "-gfni" "-target-feature" "+fma4" "-target-feature" "-vpclmulqdq" "-target-feature" "+prfchw" "-target-feature" "-bmi2" "-target-feature" "-cldemote" "-target-feature" "-fsgsbase" "-target-feature" "-xsavec" "-target-feature" "+popcnt" "-target-feature" "+aes" "-target-feature" "-avx512bitalg" "-target-feature" "-movdiri" "-target-feature" "-xsaves" "-target-feature" "-avx512er" "-target-feature" "-avx512vnni" "-target-feature" "-avx512vpopcntdq" "-target-feature" "-clwb" "-target-feature" "-avx512f" "-target-feature" "-clzero" "-target-feature" "-pku" "-target-feature" "+mmx" "-target-feature" "+lwp" "-target-feature" "-rdpid" "-target-feature" "+xop" "-target-feature" "-rdseed" "-target-feature" "-waitpkg" "-target-feature" "-movdir64b" "-target-feature" "-ibt" "-target-feature" "+sse4a" "-target-feature" "-avx512bw" "-target-feature" "-clflushopt" "-target-feature" "+xsave" "-target-feature" "-avx512vbmi2" "-target-feature" "-avx512vl" "-target-feature" "-avx512cd" "-target-feature" "+avx" "-target-feature" "-vaes" "-target-feature" "-rtm" "-target-feature" "+fma" "-target-feature" "+bmi" "-target-feature" "-rdrnd" "-target-feature" "-mwaitx" "-target-feature" "+sse4.1" "-target-feature" "+sse4.2" "-target-feature" "-avx2" "-target-feature" "-wbnoinvd" "-target-feature" "+sse" "-target-feature" "+lzcnt" "-target-feature" "+pclmul" "-target-feature" "-prefetchwt1" "-target-feature" "+f16c" "-target-feature" "+ssse3" "-target-feature" "-sgx" "-target-feature" "-shstk" "-target-feature" "+cmov" "-target-feature" "-avx512vbmi" "-target-feature" "-movbe" "-target-feature" "-xsaveopt" "-target-feature" "-avx512dq" "-target-feature" "-adx" "-target-feature" "-avx512pf" "-target-feature" "+sse3" "-dwarf-column-info" "-debugger-tuning=gdb" "-resource-dir" "/build/llvm-build-Clang-release/lib/clang/7.0.0" "-internal-isystem" "/usr/local/include" "-internal-isystem" "/build/llvm-build-Clang-release/lib/clang/7.0.0/include" "-internal-externc-isystem" "/usr/include/x86_64-linux-gnu" "-internal-externc-isystem" "/include" "-internal-externc-isystem" "/usr/include" "-fdebug-compilation-dir" "/build/llvm-build-Clang-release" "-ferror-limit" "19" "-fmessage-length" "271" "-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o" "-" "-x" "c" "-"
```

Reviewers: craig.topper, asbirlea, rnk, GGanesh, andreadb

Reviewed By: craig.topper

Subscribers: sdardis, dberris, aprantl, arichardson, JDevlieghere, #sanitizers, llvm-commits, cfe-commits, craig.topper

Differential Revision: https://reviews.llvm.org/D46323

llvm-svn: 331295
2018-05-01 18:40:15 +00:00
Craig Topper 436c9263fb [X86] Add cpu detection for cannonlake.
This uses the same encoding for cannonlake in the proposed gcc patches here. https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00551.html

llvm-svn: 318610
2017-11-19 00:46:21 +00:00
Craig Topper 705b969f80 [X86] Add Knights Mill CPU to cpu_indicator support to match libgcc.
llvm-svn: 315505
2017-10-11 20:35:43 +00:00
Craig Topper b77279083c [X86][builtins] Sync getX86CpuIDAndInfoEx with llvm's Host.cpp again.
We now use __cpuidex intrinsics intead of inline asm on 32-bit Windows. We already used it on 64-bit.

llvm-svn: 308420
2017-07-19 05:11:20 +00:00
Craig Topper e6b07073ca [compiler-rt][X86] Match the detection of cpu's for __cpu_model to the latest version of gcc
Summary:
We were missing many feature flags that newer gcc supports and we had our own set of feature flags that gcc didnt' support that were overlapping. Clang's implementation assumes gcc's features list so a mismatch here is problematic.

I've also matched the cpu type/subtype lists with gcc and removed all the cpus that gcc doesn't support. I've also removed the fallback autodetection logic that was taken from Host.cpp. It was the main reason we had extra feature flags relative to gcc. I don't think gcc does this in libgcc.

Once this support is in place we can consider implementing __builtin_cpu_is in clang. This could also be needed for function dispatching that Erich Keane is working on.

Reviewers: echristo, asbirlea, RKSimon, erichkeane, zvi

Reviewed By: asbirlea

Subscribers: dberris, llvm-commits

Differential Revision: https://reviews.llvm.org/D35214

llvm-svn: 307878
2017-07-13 02:56:24 +00:00
Craig Topper 76ac813790 [X86] Sync a few more things from llvm's Host.cpp to cpu_model.
This syncs the cpuid functions and adds breaks to the appropriate spots in the CPU decoding switches. Also a few formatting tweaks.

llvm-svn: 307561
2017-07-10 17:47:23 +00:00
Craig Topper 61d8450277 [X86] Resync cpu_model.c with llvm's Host.cpp in preparation for making it compatible with newer gcc.
llvm-svn: 307558
2017-07-10 17:30:20 +00:00
Reid Kleckner 3ae87c4650 [builtins] Fix MSVC build
Avoid __attribute__((constructor)) in cpu_model.c.

Use more C99 _Complex emulation in divtc3.c. Joerg Sonnenberger added
this builtin just after the last round of C99 _Complex emulation landed
in r249514 (Oct 2015).

llvm-svn: 299784
2017-04-07 16:54:32 +00:00
Alina Sbirlea 9b47673e3f [compiler-rt] Change all asm directives to __asm__ in cpu_model.
Summary:
Aiming to resolve failure in sanitizer bot by changning all asm directives to __asm__.
Also, consistency.

Reviewers: llvm-commits, echristo, vitalybuka

Subscribers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D22446

llvm-svn: 275740
2016-07-17 23:45:55 +00:00
Alina Sbirlea 36f57fbc66 Add runtime support for __cpu_model (__builtin_cpu_supports)
Summary:
    This aims to add support for __cpu_model and address Bug 25510. It uses
    the code from lib/Support/Host.cpp for cpu detection, and creates
    __cpu_model with that info.

    Tested on OSX and built on Linux as well (though libgcc is the default).
    The use of "asm" required -std=gnu99, hence the cmake change. Corrections
    on better addressing this are welcome.

    Previously reverted, up for review again to iron out outstanding issues.

Reviewers: llvm-commits, joerg, echristo, mehdi_amini

Subscribers: mehdi_amini

Differential Revision: http://reviews.llvm.org/D22181

llvm-svn: 275484
2016-07-14 22:02:35 +00:00
Alina Sbirlea 0efdda0956 Revert "Add runtime support for __cpu_model (__builtin_cpu_supports)"
This reverts commit r274873 until additional fixes are resolved.

llvm-svn: 274944
2016-07-08 22:22:43 +00:00
Alina Sbirlea 9ebebce2df Add runtime support for __cpu_model (__builtin_cpu_supports)
Summary:
This aims to add support for __cpu_model and address Bug 25510. It uses
the code from lib/Support/Host.cpp for cpu detection, and creates
__cpu_model with that info.

Tested on OSX, it builts successfully, but the current version does
*not* resolve Bug 25510. The __cpu_model symbol is present in the
library but it only gets loaded with -all_load. This patch will not land
until this issue is clarified.

Built on Linux as well (though libgcc is the default). The use of "asm"
required -std=gnu99, hence the cmake change. Corrections on better
addressing this are welcome.

Note: See additional comments on D20988 (committed as r271921).

Reviewers: llvm-commits, joerg, echristo, mehdi_amini

Subscribers: mehdi_amini

Differential revision: http://reviews.llvm.org/D21033

llvm-svn: 274873
2016-07-08 16:28:54 +00:00
Alina Sbirlea fb11f27253 Revert r274865-r274870
llvm-svn: 274872
2016-07-08 16:28:52 +00:00