Commit Graph

283197 Commits

Author SHA1 Message Date
Eugene Zelenko 9fbf64139e [Sema] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 325659
2018-02-21 01:45:26 +00:00
Sanjay Patel e6143904b9 revert r325515: [TTI CostModel] change default cost of FP ops to 1 (PR36280)
There are too many perf regressions resulting from this, so we need to 
investigate (and add tests for) targets like ARM and AArch64 before 
trying to reinstate.

llvm-svn: 325658
2018-02-21 01:42:52 +00:00
Aaron Smith 24e28629d7 [lit] Fix a problem with spaces in the python path by adding quotes around it
These are the last tests left to fix after D43265.

llvm-svn: 325657
2018-02-21 00:41:30 +00:00
Sam Clegg 29b8feb615 [WebAssembly] Use stable sort when sorting ctore functions
Patch by Nicholas Wilson!

llvm-svn: 325656
2018-02-21 00:34:34 +00:00
Craig Topper 94a940d2b4 [X86] Disable CLWB in Cannon Lake
Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX.

Patch by Gabor Buella

Differential Revision: https://reviews.llvm.org/D43459

llvm-svn: 325655
2018-02-21 00:16:50 +00:00
Craig Topper d710adac2d [X86] Disable CLWB for Cannon Lake
Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX anymore.

Instead, enumerate all SKX features with the exception of CLWB.

Patch by Gabor Buella

Differential Revision: https://reviews.llvm.org/D43380

llvm-svn: 325654
2018-02-21 00:15:48 +00:00
Simon Dardis 7bc8ad5849 [mips] Spectre variant two mitigation for MIPSR2
This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It implements the LLVM part of
-mindirect-jump=hazard. It is _not_ enabled by default for the P5600.

The migitation strategy suggested by MIPS for these processors is to use
hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the attribute +use-indirect-jump-hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Performance benchmarking of this option with -fpic and lld using
-z hazardplt shows a difference of overall 10%~ time increase
for the LLVM testsuite. Certain benchmarks such as methcall show a
substantially larger increase in time due to their nature.

Reviewers: atanasyan, zoran.jovanovic

Differential Revision: https://reviews.llvm.org/D43486

llvm-svn: 325653
2018-02-21 00:06:53 +00:00
Aaron Smith 07482d32e7 [lit] Update how clang and other binaries are found in per-configuration directories
Summary:
This is modeled after the clang and llvm lit tests.

Several properties have CMAKE_CFG_INTDIR as part of the path - this works correctly when the cmake generator only supports one configuration which is known at configuration time, but it does not work correctly when the cmake generator supports multiple configurations (for example, VS). 

For VS, CMAKE_CFG_INTDIR ends up set as $Configuration and then it is never updated correctly. Instead, the lit configuration can use a property that can be overwritten at run time. AddLLVM does that for several properties (such as LLVM_TOOLS_DIR). 

This change is also removing properties from the lit/CMakeLists.txt that are actually set during the call to configure_lit_site_cfg

Reviewers: zturner, lldb-commits

Reviewed By: zturner

Subscribers: llvm-commits, labath, stella.stamenova, mgorny, hintonda

Differential Revision: https://reviews.llvm.org/D43096

llvm-svn: 325652
2018-02-21 00:05:51 +00:00
Simon Dardis 0bc2d9b0c5 [mips] Spectre variant two mitigation for MIPSR2
This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It provides the option
-mindirect-jump=hazard, which instructs the LLVM backend to replace
indirect branches with their hazard barrier variants.

This option is accepted when targeting MIPS revision two or later.

The migitation strategy suggested by MIPS for these processors is to
use two hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the option -mindirect-jump=hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Implementation note: I've opted to provide this as an
-mindirect-jump={hazard,...} style option in case alternative
mitigation methods are required for other implementations of the MIPS
ISA in future, e.g. retpoline style solutions.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D43487

llvm-svn: 325651
2018-02-21 00:05:05 +00:00
Aaron Smith 39bb8c5003 [lit] Fix a problem with spaces in the python path by adding quotes around it
Summary:
This fixes two failing tests on Windows with an installed version of python that has spaces in the path.

* elf/lto/cache.ll
* mach-o/dependency_info.yaml

Reviewers: zturner, llvm-commits, stella.stamenova

Subscribers: emaste, arichardson

Differential Revision: https://reviews.llvm.org/D43265

llvm-svn: 325650
2018-02-21 00:03:41 +00:00
Sanjay Patel 6f716a7c5e [InstCombine] C / -X --> -C / X
We already do this in DAGCombiner, but it should
also be good to eliminate the fsub use in IR.

This is similar to rL325648.

llvm-svn: 325649
2018-02-21 00:01:45 +00:00
Sanjay Patel d8dd0151fc [InstCombine] -X / C --> X / -C for FP
We already do this in DAGCombiner, but it should 
also be good to eliminate the fsub use in IR.

llvm-svn: 325648
2018-02-20 23:51:16 +00:00
Simon Dardis cd8758233e [mips][lld] Spectre variant two mitigation for MIPSR2
This patch provides migitation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It implements the LLD part of
-z hazardplt. Like the Clang part of this patch, I have opted for that
specific option name in case alternative migitation methods are required
in the future.

The mitigation strategy suggested by MIPS for these processors is to use
hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

For LLD, this changes PLT stubs to use 'jalr.hb' and 'jr.hb'.

Reviewers: atanasyan, ruiu

Differential Revision: https://reviews.llvm.org/D43488

llvm-svn: 325647
2018-02-20 23:49:17 +00:00
Richard Smith 148bc6a1f7 Fix assert when template argument deduction's original call arg checking triggers class template instantiation.
llvm-svn: 325646
2018-02-20 23:47:12 +00:00
Sam Clegg 00245539b6 [WebAssembly] Rename GlobalSymbol types. NFC.
Purely a rename in preparation for adding new global symbol type.

We want to use GlobalSymbol to represent real wasm globals and
DataSymbol for pointers to things in linear memory (what ELF would
call STT_OBJECT).

This reduces the size the patch to add the explicit symbol table
which is coming soon!

Differential Revision: https://reviews.llvm.org/D43476

llvm-svn: 325645
2018-02-20 23:38:27 +00:00
Sanjay Patel 8357371861 [InstCombine] add tests for fdiv with negated op and constant op; NFC
llvm-svn: 325644
2018-02-20 23:34:43 +00:00
Konstantin Zhuravlyov 5c1237a1fd Revert "[AMDGPU] Increased vector length for global/constant loads."
https://reviews.llvm.org/rL325518

It breaks following OpenCL conformance tests:
  - Basic - parameter_types
  - Basic - vload_private

llvm-svn: 325643
2018-02-20 23:30:21 +00:00
Sanjay Patel 3e569ac0cc [PatternMatch] allow vector matches with m_FNeg
llvm-svn: 325642
2018-02-20 23:29:05 +00:00
Sanjoy Das 737fa40ffa [DSE] Don't DSE stores that subsequent memmove calls read from
Summary:
We used to remove the first memmove in cases like this:

  memmove(p, p+2, 8);
  memmove(p, p+2, 8);

which is incorrect.  Fix this by changing isPossibleSelfRead to what was most
likely the intended behavior.

Historical note: the buggy code was added in https://reviews.llvm.org/rL120974
to address PR8728.

Reviewers: rsmith

Subscribers: mcrosier, llvm-commits, jlebar

Differential Revision: https://reviews.llvm.org/D43425

llvm-svn: 325641
2018-02-20 23:19:34 +00:00
Richard Smith 6cd4861c22 When multiple sanitizers are enabled (ubsan + something else), use all relevant blacklists.
Ideally, we'd only use the ubsan blacklist for ubsan sanitizers, and only use
the other-sanitizer blacklist for its sanitizers, but this at least enables the
intended suppressions.

llvm-svn: 325640
2018-02-20 23:17:41 +00:00
Sanjay Patel 4f65e0d008 [InstCombine] auto-generate full checks; NFC
llvm-svn: 325639
2018-02-20 23:08:47 +00:00
Sanjay Patel 088f4690f5 [InstCombine] add test for vector -X/-Y; NFC
m_FNeg doesn't match vector types.

llvm-svn: 325637
2018-02-20 22:46:38 +00:00
Craig Topper 63dd97513b [X86] Fix copy/paste mistake in test.
The contents of the test case didnt' match the name of the test case. And they were identical to the test above.

llvm-svn: 325635
2018-02-20 22:33:23 +00:00
Benjamin Kramer 1516dd70bb Fix broken test from r325630.
llvm-svn: 325634
2018-02-20 22:30:16 +00:00
Erich Keane 7399ad3f39 [NFC] In Multiversion Check function, switch to return Diag
This function did a lot of 'Diag, return true' stuff.  This resulted in needing
to introduce scopes in quite a few places.  This patch replaces useages of a
single "S.Diag" followed by return true with simply "return S.Diag".

llvm-svn: 325633
2018-02-20 22:25:28 +00:00
Lang Hames 919f15a1b4 [PBQP] Fix PR33038 by pruning empty intervals in initializeGraph.
Spilling may cause previously non-empty intervals (both for the spilled vreg
and others) to become empty. Moving the pruning into initializeGraph catches
these cases and fixes PR33038.

llvm-svn: 325632
2018-02-20 22:15:09 +00:00
Sam Clegg f187c4d2e5 Consistent use of header file for ICF and MarkLive
Previously wasm used a separate header to declare markLive
and ELF used to declare ICF.  This change makes each backend
consistently declare these in their own headers.

Differential Revision: https://reviews.llvm.org/D43529

llvm-svn: 325631
2018-02-20 22:09:59 +00:00
Benjamin Kramer fd0630665b [MemoryBuiltins] Check nobuiltin status when identifying calls to free.
This is usually not a problem because this code's main purpose is
eliminating unused new/delete pairs. We got deletes of nullptr or
nobuiltin deletes of builtin new wrong though.

llvm-svn: 325630
2018-02-20 22:00:33 +00:00
Sam Clegg 3141ddc58d Consistent (non) use of empty lines in include blocks
The profailing style in lld seem to be to not include such empty lines.
Clang-tidy/clang-format seem to handle this just fine.

Differential Revision: https://reviews.llvm.org/D43528

llvm-svn: 325629
2018-02-20 21:53:18 +00:00
Sanjay Patel 7365b44b85 [InstCombine] remove unneeded operand swap: NFCI
FMul is commutative, so complexity-based canonicalization should always 
take care of the swap via SimplifyAssociativeOrCommutative(). 

llvm-svn: 325628
2018-02-20 21:52:46 +00:00
Craig Topper 7fbea20b90 [SelectionDAG] Support known true/false SimplifySetCC cases for comparing against vector splats of constants.
This is split off from D42948 and includes just the cases that constant fold to true or false. It also includes some refactoring to keep predicate checks together.

This supports things like

(setcc uge X, 0) -> true

Differential Revision: https://reviews.llvm.org/D43489

llvm-svn: 325627
2018-02-20 21:48:14 +00:00
Artem Belevich 4dbea99137 [CUDA] Added missing __threadfence_system() function for CUDA9.
llvm-svn: 325626
2018-02-20 21:25:30 +00:00
Rui Ueyama c03c9040aa Use more early returns in SymbolTable.cpp.
I think if statements that end with return is easier to read than
cascaded if-else-if-else-if statements because it makes clear that
execution of a function terminates there. This patch also adds more
blank lines to separate code blocks to meaningful pieces.

Differential Revision: https://reviews.llvm.org/D43517

llvm-svn: 325625
2018-02-20 21:08:47 +00:00
Sam Clegg 78f766a9aa [WebAssembly] Remove unused header
llvm-svn: 325624
2018-02-20 21:08:28 +00:00
Sanjay Patel e29caaa9c5 [PatternMatch] enhance m_SignMask() to ignore undef elements in vectors
llvm-svn: 325623
2018-02-20 21:02:40 +00:00
Sanjay Patel ff7b777bbe [InstSimplify] add tests for m_SignMask with undef vector elements; NFC
llvm-svn: 325622
2018-02-20 20:53:35 +00:00
Evandro Menezes 72f3983633 [AArch64] Refactor instructions using SIMD immediates
Get rid of icky goto loops and make the code easier to maintain.  Otherwise,
NFC.

Restore r324903 and fix PR36369.

Differentail revision: https://reviews.llvm.org/D43364

llvm-svn: 325621
2018-02-20 20:31:45 +00:00
Teresa Johnson 2c2ed3cf03 [lld/LTO] Remove unused Path parameter to AddBufferFn
Summary:
With D43396, no clients use the Path parameter anymore.
This is the lld side fix with D43400.

Depends on D43396 and D43400.

Reviewers: pcc

Subscribers: emaste, inglorion, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D43401

llvm-svn: 325620
2018-02-20 20:21:59 +00:00
Teresa Johnson a344fd3db6 [LTO] Remove unused Path parameter to AddBufferFn
Summary:
With D43396, no clients use the Path parameter anymore.

Depends on D43396.

Reviewers: pcc

Subscribers: mehdi_amini, inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D43400

llvm-svn: 325619
2018-02-20 20:21:53 +00:00
Teresa Johnson b145cca85e [ThinLTO/gold] Avoid race with cache pruner by copying to temp files
Summary:
This will avoid the race condition described in the review for D37993.

I believe that the Path parameter to AddBufferFn is no longer utilized.
I would prefer to remove that as a follow up clean up patch to reduce
the diffs in this patch.

Reviewers: pcc

Reviewed By: pcc

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D43396

llvm-svn: 325618
2018-02-20 19:51:30 +00:00
Alexey Bataev 42bcec7d38 [LV] Fix test checks, NFC.
llvm-svn: 325617
2018-02-20 19:49:25 +00:00
Sjoerd Meijer 4d5c40492a [ARM] Lower BR_CC for f16
This case wasn't handled yet.

Differential Revision: https://reviews.llvm.org/D43508

llvm-svn: 325616
2018-02-20 19:28:05 +00:00
Stanislav Mekhanoshin a3b6d95db4 [AMDGPU] Removed redundant run lines for fmuladd.f16 test. NFC.
llvm-svn: 325615
2018-02-20 19:19:56 +00:00
Sam Clegg f60b0d5c62 feedback
llvm-svn: 325614
2018-02-20 18:55:07 +00:00
Sam Clegg 93e559b138 [WebAssembly] Split addDefined into two different methods. NFC.
Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D43496

llvm-svn: 325613
2018-02-20 18:55:06 +00:00
David Blaikie 0e5506838e [llvm-objdump] Use unique_ptr to simplify memory ownership
Followup to r325099/r325100 to simplify further.

llvm-svn: 325612
2018-02-20 18:48:51 +00:00
Simon Pilgrim 75853bf149 [X86][MMX] Regenerate MMX bitcast test
llvm-svn: 325611
2018-02-20 18:48:29 +00:00
Erich Keane 5e5baf59dd Correct multiversion unsupported target behavior, add a test.
Multiversioning SEMA failed to set the declaration as invalid on unsupported
targets.  This patch does that.

Additionally, I noticed that there is no test to validate this error message.
This patch adds one, and uses 'mips' as the test architecture.  

llvm-svn: 325610
2018-02-20 18:44:50 +00:00
Simon Pilgrim 2cf3769a7e [X86][3DNow] Regenerate intrinsics tests
llvm-svn: 325609
2018-02-20 18:44:21 +00:00
Sam Clegg b92b6b532f [WebAssembly] Remove unused header
This header used to be needed here for the `OutRelocation` struct
but that no longer exists.

Differential Revision: https://reviews.llvm.org/D43516

llvm-svn: 325608
2018-02-20 18:40:05 +00:00