Warn if class for a deprecated class is implemented.
Warn if category for a deprecated class is implemented.
All under control of -Wdeprecated-implementations.
// rdar://8973810.
llvm-svn: 125545
ArchDefaultUnwindPlan plug-in interfaces are now cached per architecture
instead of being leaked for every frame.
Split the ArchDefaultUnwindPlan_x86 into ArchDefaultUnwindPlan_x86_64 and
ArchDefaultUnwindPlan_i386 interfaces.
There were sporadic crashes that were due to something leaking or being
destroyed when doing stack crawls. This patch should clear up these issues.
llvm-svn: 125541
Simplify the spill weight calculation a bit by bypassing
getApproximateInstructionCount() and using LiveInterval::getSize() directly.
This changes the computed spill weights, but only by a constant factor in each
function. It should not affect how spill weights compare against each other, and
so it shouldn't affect code generation.
llvm-svn: 125530
various types and numbers of arguments rather than trying to keep a
constant number of arguments for all the types.
- Also create a Register type within the instructions, to hold
register type and number.
- Modify EmulateInstructionArm.cpp to use the new register and context
types in all the instruction emulation functions.
- Add code to emulate the STM Arm instruction.
llvm-svn: 125528
The i64_buildvector test in this file relies on the alignment of i64 and
f64 types being the same, which is true for Darwin but not AAPCS.
llvm-svn: 125525
table. Modify EmulateInstructionARM::EvaluateInstruction() so that if the cpsr has changed
during evaluate instruction, we flush out the change into m_inst_cpsr in preparation for the next
instruction.
llvm-svn: 125524
the context of eContextImmediate type, since the immediate value is known from the
argument value to WriteRegisterUnsigned() callback already.
llvm-svn: 125518
an imm12 into imm32 for ARM or Thumb so that they now handle carry_in/carry_out.
Funnel ARMExpandImm()/ThumbExpandImm() to the enhanced ARMExpandImm_C()/ThumbExpandImm_C()
functions.
llvm-svn: 125508
-Checkers will be defined in the tablegen file 'Checkers.td'.
-Apart from checkers, we can define checker "packages" that will contain a collection of checkers.
-Checkers can be enabled with -analyzer-checker=<name> and disabled with -analyzer-disable-checker=<name> e.g:
Enable checkers from 'cocoa' and 'corefoundation' packages except the self-initialization checker:
-analyzer-checker=cocoa -analyzer-checker=corefoundation -analyzer-disable-checker=cocoa.SelfInit
-Introduces CheckerManager and CheckerProvider. CheckerProviders get the set of checker names to enable/disable and
register them with the CheckerManager which will be the entry point for all checker-related functionality.
Currently only the self-initialization checker takes advantage of the new mechanism.
llvm-svn: 125503
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.
llvm-svn: 125489
Chris Lattner