f074ca7454
Clean up a bunch of whitespace issues and fix a comment typo.
...
No functional changes.
llvm-svn: 68808
2009-04-10 18:48:47 +00:00
30c3de6461
fix two problems with machine sinking:
...
1. Sinking would crash when the first instruction of a block was
sunk due to iterator problems.
2. Instructions could be sunk to their current block, causing an
infinite loop.
This fixes PR3968
llvm-svn: 68787
2009-04-10 16:38:36 +00:00
e517ae4211
Now that register classes have names, include the name in debug output.
...
llvm-svn: 68786
2009-04-10 15:59:38 +00:00
638f400a3c
Added code to handle spilling and reloading of FSRs.
...
llvm-svn: 68783
2009-04-10 15:10:14 +00:00
bb834f0929
Don't fold a load if the other operand is a TLS address.
...
With this we generate
movl %gs:0, %eax
leal i@NTPOFF(%eax), %eax
instead of
movl $i@NTPOFF, %eax
addl %gs:0, %eax
llvm-svn: 68778
2009-04-10 10:09:34 +00:00
bc8848f76f
Add a new Type::getPointerTo method, which is shorthand for
...
llvm::PointerType::get(). Patch by Anders Johnsen!
llvm-svn: 68772
2009-04-10 06:42:02 +00:00
428f71623b
a few fixes to "addrspace(256) is reference offset of GS segment register".
...
It turns out that there are still several problems with this, will file a bugzilla.
llvm-svn: 68749
2009-04-10 00:16:23 +00:00
992f846dc7
Pass in the std::string parameter instead of returning it by value.
...
llvm-svn: 68747
2009-04-10 00:12:49 +00:00
fe56c25065
Constify getter methods.
...
llvm-svn: 68745
2009-04-10 00:00:25 +00:00
de912e2475
Remove the obsolete SelectionDAG::getNodeValueTypes and simplify
...
code that uses it by using SelectionDAG::getVTList instead.
llvm-svn: 68744
2009-04-09 23:54:40 +00:00
16abfc97fb
StringMap<DIE*>::iterator::first() returns a pointer to the first character of
...
the key. This will cause it to create a new std::string, which isn't
wanted. Instead, pass back the "const char*". Modify the EmitString() method to
take a "const char*".
llvm-svn: 68741
2009-04-09 23:51:31 +00:00
a68bdef482
Silence unused variable warning.
...
llvm-svn: 68735
2009-04-09 23:45:17 +00:00
66ab904f5a
ignore register zero in isRegTiedToUseOperand, following the example of
...
isRegTiedToDefOperand. Thanks to Bob for pointing this out!
llvm-svn: 68734
2009-04-09 23:33:34 +00:00
5eb8d26f19
Give register alias checking the hash table treatment too.
...
llvm-svn: 68730
2009-04-09 22:19:30 +00:00
e65fd1a302
Use a StringMap instead of std::map for storing std::string->DIE* maps. This
...
gives a micro speedup in the Dwarf writer.
llvm-svn: 68728
2009-04-09 21:49:15 +00:00
a2c2b85df4
llvm.dbg.func_start also defines beginning of function scope.
...
llvm-svn: 68727
2009-04-09 21:42:11 +00:00
51856173c8
Fix pr3954. The register scavenger asserts for inline assembly with
...
register destinations that are tied to source operands. The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).
llvm-svn: 68714
2009-04-09 17:16:43 +00:00
38533d48dd
The way we are trying to figure out banksel immediate operand may yield different results for different type of insns. This will eventually need to be changed but currently let us prevent the crash in cases of incorrect detection of banksel operand.
...
llvm-svn: 68713
2009-04-09 17:06:24 +00:00
a725028d41
reg0 references are not real registers. This fixes a crash on the
...
attached testcase.
llvm-svn: 68712
2009-04-09 16:50:43 +00:00
60fd2cd503
Arguments to indirect calls were being passed incorrectly. They are not fixed to start after return value.
...
llvm-svn: 68705
2009-04-09 10:29:32 +00:00
bcd2632638
Fix code size computation on x86-64, patch by Zoltan Varga!
...
llvm-svn: 68690
2009-04-09 06:10:51 +00:00
cdfdc79b70
r68576 unconverd a bug in PIC16 port (Thanks to Dan Gohman) where we were custom lowering an ADD to ADDC.
...
llvm-svn: 68671
2009-04-09 04:03:43 +00:00
0e8d199f91
Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,
...
in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the
way it checked for live-out values, and simplify the way it
find users by using SDNode::use_iterator's (relatively) new
features. Also, make it slightly more permissive on targets
with free truncates.
In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are
larger than necessary. If the target's SwitchAmountTy has
enough bits, use it. This exposes the truncate to optimization
early, enabling more optimizations.
llvm-svn: 68670
2009-04-09 03:51:29 +00:00
3a888f639e
Convert TargetRegisterInfo's super-register checking to use a pre-computed hash table just like subregister checking does.
...
llvm-svn: 68669
2009-04-09 03:50:16 +00:00
e6db8ca5eb
Don't copy the operand of a SwitchInst into virtual registers as
...
eagerly. This helps avoid CopyToReg nodes in some cases where they
aren't needed, and also helps subsequent optimizer heuristics
in cases where the extra nodes would cause the node to appear
to have multiple results. This doesn't have a significant impact
currently; it'll help an upcoming change.
llvm-svn: 68667
2009-04-09 02:33:36 +00:00
f15454866c
Fix grammaros in comments.
...
llvm-svn: 68666
2009-04-09 02:06:09 +00:00
3f48987069
Add sys::Path::makeAbsolute().
...
llvm-svn: 68663
2009-04-09 00:33:08 +00:00
3396d7ef9d
If subprogram type is not tagged as DW_TAG_subroutine_type then use it directly as a return value type.
...
llvm-svn: 68647
2009-04-08 22:18:45 +00:00
3b2df10c9e
Re-apply 68552.
...
Tested by bootstrapping llvm-gcc and using that to build llvm.
llvm-svn: 68645
2009-04-08 21:14:34 +00:00
866c174f79
Fix PR3795: Apply Dan's suggested fix for
...
ARMTargetLowering::isLegalAddressingMode.
llvm-svn: 68619
2009-04-08 17:55:28 +00:00
5a82613db0
Soft float support for FREM.
...
llvm-svn: 68614
2009-04-08 16:20:57 +00:00
fb438caac6
Soft float support for undef. Reported by Xerxes Rånby.
...
llvm-svn: 68607
2009-04-08 13:33:37 +00:00
d173f4237d
Avoid a hard coded constant.
...
llvm-svn: 68603
2009-04-08 08:09:33 +00:00
44ea053a49
Emit .line debug directives for stoppoints. The debug location is retrieved by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes.
...
llvm-svn: 68602
2009-04-08 06:24:04 +00:00
eb510d6b3d
Instcombine should not promote whole computation trees to "strange"
...
integer types, unless they are already strange. This prevents it from
turning the code produced by SROA into crazy libcalls and stuff that
the code generator can't handle. In the attached example, the result
was an i96 multiply that caused the x86 backend to assert.
Note that if TargetData had an idea of what the legal types are for
a target that this could be used to stop instcombine from introducing
i64 muls, as Scott wanted.
llvm-svn: 68598
2009-04-08 05:41:03 +00:00
4b489c75c2
Handle indirect function calls.
...
Every function has the address of its frame in the beginning of code section.
The frame address is retrieved and used to pass arguments.
llvm-svn: 68597
2009-04-08 05:38:48 +00:00
a72576e92b
disable this code for now, re-breaking PR2975, but fixing
...
a testcase I'm about to attach to that pr.
llvm-svn: 68592
2009-04-08 04:36:59 +00:00
3875195865
Remove AllowInverse: it leaks memory and is not the right
...
abstraction for CommandLine.
llvm-svn: 68588
2009-04-08 03:43:51 +00:00
69b586e547
change printStringChar to emit characters as unsigned char instead of char,
...
avoiding sign extension for the top octet. For "negative" chars, we'd print
stuff like:
.asciz "\702...
now we print:
.asciz "\302...
llvm-svn: 68577
2009-04-08 00:28:38 +00:00
ad3e549a53
Implement support for using modeling implicit-zero-extension on x86-64
...
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.
This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.
Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.
Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.
Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.
Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.
llvm-svn: 68576
2009-04-08 00:15:30 +00:00
10f7c3deb7
Revert prev. patch for now.
...
llvm-svn: 68569
2009-04-07 23:00:04 +00:00
4aa25b79f9
Temporarily revert r68552. This was causing a failure in the self-hosting LLVM
...
builds.
--- Reverse-merging (from foreign repository) r68552 into '.':
U test/CodeGen/X86/tls8.ll
U test/CodeGen/X86/tls10.ll
U test/CodeGen/X86/tls2.ll
U test/CodeGen/X86/tls6.ll
U lib/Target/X86/X86Instr64bit.td
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86RegisterInfo.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86CodeEmitter.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86InstrInfo.h
U lib/Target/X86/X86ISelDAGToDAG.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86ISelLowering.h
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86InstrBuilder.h
U lib/Target/X86/X86RegisterInfo.td
llvm-svn: 68560
2009-04-07 22:35:25 +00:00
ddafc03e41
Right now DBG_LABEL are required for llvm.dbg.region_start and llvm.dbg.region_end in non-fast mode also.
...
llvm-svn: 68559
2009-04-07 22:27:56 +00:00
1edda06792
Reduce code duplication on the TLS implementation.
...
This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.
Will work on it and on X86-64 support.
llvm-svn: 68552
2009-04-07 21:37:46 +00:00
ca93aabeba
Don't attempt to handle aggregate argument values in FastISel; let
...
SelectionDAG do those. This fixes PR3955.
llvm-svn: 68546
2009-04-07 20:40:11 +00:00
fde2110aa9
PR2985 / <rdar://problem/6584986>
...
When compiling in Thumb mode, only the low (R0-R7) registers are available
for most instructions. Breaking the low registers into a new register class
handles this. Uses of R12, SP, etc, are handled explicitly where needed
with copies inserted to move results into low registers where the rest of
the code generator can deal with them.
llvm-svn: 68545
2009-04-07 20:34:09 +00:00
671eb8b7bb
fix style.
...
llvm-svn: 68542
2009-04-07 19:45:59 +00:00
73312b3f39
Another attempt at fixing PR2975.
...
Types can have references to eachother, so we can't just call destroy on them.
llvm-svn: 68523
2009-04-07 17:23:02 +00:00
321741af5f
fix rdar://6762290, a crash compiling cxx filt with clang.
...
llvm-svn: 68500
2009-04-07 05:03:34 +00:00
47d6e7b93e
remove empty section
...
llvm-svn: 68485
2009-04-07 02:55:53 +00:00
0669f6d295
Handle 'a' modifier in ARM inline assembly.
...
Patch by Richard Pennington.
llvm-svn: 68464
2009-04-06 21:46:51 +00:00
839026562c
revert r68457, its crashing in make check.
...
llvm-svn: 68459
2009-04-06 20:57:34 +00:00
b9e07fd297
Teach llvm-bcanalyzer to skip over the header we use on LLVM IR files.
...
llvm-svn: 68458
2009-04-06 20:54:32 +00:00
96dadc3b63
fix (part of) memory leak on shutdown. See PR2975.
...
llvm-svn: 68457
2009-04-06 20:49:21 +00:00
01aa6ec97a
Let the strcat optimizer return the pointer to the start of the buffer,
...
instead of the place where it started to perform the string copy.
- PR3661
- Patch by Benjamin Kramer!
llvm-svn: 68443
2009-04-06 13:06:48 +00:00
0b08df8c09
Map stack based frameindices for spills to zero based indices that can be accessed based on an external symbol defining the location of temporary data for a function. For example: we have spill slots addressed as foo.tmp + 0, foo.tmp + 1 etc.
...
llvm-svn: 68442
2009-04-06 10:54:50 +00:00
0bb65f44fa
Remove bogus include.
...
llvm-svn: 68421
2009-04-04 07:42:46 +00:00
49f891958f
Add support for embedded metadata to LLVM. This introduces two new types of
...
Constant, MDString and MDNode which can only be used by globals with a name
that starts with "llvm." or as arguments to a function with the same naming
restriction.
llvm-svn: 68420
2009-04-04 07:22:01 +00:00
6bedd59894
Wrap some lines to fix indentation problems.
...
llvm-svn: 68405
2009-04-03 21:08:42 +00:00
d24b794f31
Fix some comments.
...
llvm-svn: 68404
2009-04-03 20:53:25 +00:00
8bff8a1e87
Fix a TargetLowering optimization so that it doesn't duplicate
...
loads when an input node has multiple uses.
llvm-svn: 68398
2009-04-03 20:11:30 +00:00
f4de47b91e
CMake: removed IA64AsmPrinter.cpp from lib/Target/IA64/CMakeLists.txt
...
llvm-svn: 68384
2009-04-03 12:11:43 +00:00
06d2d8ba72
Separate MIPS asmprinter
...
llvm-svn: 68383
2009-04-03 10:41:41 +00:00
354171f060
Fix target library name
...
llvm-svn: 68382
2009-04-03 10:41:17 +00:00
b1cce77929
Fix comment
...
llvm-svn: 68381
2009-04-03 10:41:00 +00:00
547b43a809
Move IA64 asmprinter to separate library
...
llvm-svn: 68380
2009-04-03 10:38:51 +00:00
9c186c5d27
Added a x86 dag combine to increase the chances to use a
...
movq for v2i64 on x86-32.
llvm-svn: 68368
2009-04-03 02:43:30 +00:00
b425feb2aa
Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused.
...
Note that these are distinct from TargetInstrInfo::INSERT_SUBREG
and TargetInstrInfo::EXTRACT_SUBREG, which are used.
llvm-svn: 68355
2009-04-03 00:25:26 +00:00
206f75e7d2
use higher level APIs.
...
llvm-svn: 68351
2009-04-03 00:02:39 +00:00
e9cff3328f
Fixed build warnings.
...
llvm-svn: 68333
2009-04-02 18:33:12 +00:00
cc841a3810
To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize.
...
llvm-svn: 68329
2009-04-02 18:03:10 +00:00
1e8860a8f5
Params are not being generated as static globals now. The caller passes them onto the callee's stack directly and the callee loads the argvals from its own stack. Clang generated frameindexes validatd by recalculating the stack as if all frameindexes represent 1-byte slots.
...
llvm-svn: 68327
2009-04-02 17:42:00 +00:00
12062ba83d
Fix build on Linux.
...
llvm-svn: 68269
2009-04-02 01:11:37 +00:00
98f912bf13
Reapply r68211, with the miscompilations it caused fixed.
...
llvm-svn: 68262
2009-04-01 23:53:49 +00:00
ec9c58f7e5
Clean up pass manager cache after each run.
...
llvm-svn: 68254
2009-04-01 22:34:41 +00:00
d2eb0a63a1
silence warning in release-asserts build.
...
llvm-svn: 68253
2009-04-01 22:14:45 +00:00
4abd56677d
Add llvm::Triple class for abstracting access to target triples.
...
- The code is silly, I'm just amusing myself. Rewrite to be efficient
if you like. :)
Also, if you wish to debate the proper names of the triple components
I'm all ears.
llvm-svn: 68252
2009-04-01 21:53:23 +00:00
cff6953c45
Use CHAR_BIT instead of hard-coding 8 in several places where it
...
is appropriate. This helps visually differentiate host-oriented
calculations from target-oriented calculations.
llvm-svn: 68227
2009-04-01 18:45:54 +00:00
0170402fe8
Use LLVM type names instead of C type names in comments, to be
...
less ambiguous and less C-specific.
llvm-svn: 68219
2009-04-01 18:10:16 +00:00
cf1ec2cc68
Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
...
assembly.
llvm-svn: 68218
2009-04-01 17:58:54 +00:00
c4971721ea
Revert r68172. It caused regressions in
...
Applications/Burg/burg
Applications/ClamAV/clamscan
and many other tests.
llvm-svn: 68211
2009-04-01 16:37:47 +00:00
7e06443d44
hopefully fix an apparent build error on windows.
...
llvm-svn: 68175
2009-04-01 02:03:38 +00:00
647cffba61
fix a serious regression I introduced in my previous patch.
...
llvm-svn: 68173
2009-04-01 01:43:03 +00:00
ff5961b46c
Enhance GVN to propagate simple conditionals. This fixes PR3921.
...
llvm-svn: 68172
2009-04-01 01:20:45 +00:00
5fc1a0339c
* Fixed spelling of `invertible'
...
* Simplified if statement
llvm-svn: 68163
2009-04-01 00:15:46 +00:00
2d8cd80ee0
reimplement BitcodeReaderValueList in terms of WeakVH instead of making
...
it be an LLVM IR User object.
llvm-svn: 68156
2009-03-31 22:55:09 +00:00
f72ce6ea8b
Make the key of ValueRankMap an AssertingVH, so that we die violently
...
if it dangles.
llvm-svn: 68150
2009-03-31 22:13:29 +00:00
90234f34c6
Add two new classes: WeakVH and AssertingVH. These are both "ValueHandles",
...
which are effectively smart pointers to Value*'s. They are both very light
weight and simple, and react to values being destroyed or being RAUW'd.
WeakVN does a best effort to follow a value around, including through RAUW
operations and will get nulled out of the value is destroyed. This is useful
for the eventual "metadata that references a value" work, because it is a
reference to a value that does not show up on its use_* list.
AssertingVH is a pointer that compiles down to a dumb raw pointer when
assertions are disabled. When enabled, it emits an assertion if the
pointed-to value is destroyed while it is still being referenced. This
is very useful for Maps and other things, and should have caught the recent
bugs in CallGraph and Reassociate, for example.
llvm-svn: 68149
2009-03-31 22:11:05 +00:00
826b6f0f7c
Throttle back "fold select into operand" transformation. InstCombine should not generate selects of two constants unless they are selects of 0 and 1.
...
e.g.
define i32 @t1(i32 %c, i32 %x) nounwind {
%t1 = icmp eq i32 %c, 0
%t2 = lshr i32 %x, 18
%t3 = select i1 %t1, i32 %t2, i32 %x
ret i32 %t3
}
was turned into
define i32 @t2(i32 %c, i32 %x) nounwind {
%t1 = icmp eq i32 %c, 0
%t2 = select i1 %t1, i32 18, i32 0
%t3 = lshr i32 %x, %t2
ret i32 %t3
}
For most targets, that means materializing two constants and then a select. e.g. On x86-64
movl %esi, %eax
shrl $18, %eax
testl %edi, %edi
cmovne %esi, %eax
ret
=>
xorl %eax, %eax
testl %edi, %edi
movl $18, %ecx
cmovne %eax, %ecx
movl %esi, %eax
shrl %cl, %eax
ret
Also, the optimizer and codegen can reason about shl / and / add, etc. by a constant. This optimization will hinder optimizations using ComputeMaskedBits.
llvm-svn: 68142
2009-03-31 20:42:45 +00:00
0d551591ea
Fully general expansion of integer shift of any size.
...
llvm-svn: 68134
2009-03-31 19:39:24 +00:00
d9d6e427d6
i128 shift libcalls are not available on x86.
...
llvm-svn: 68133
2009-03-31 19:38:51 +00:00
6b42dfddf4
Reapply 68073, with fixes. EH Landing-pad basic blocks are not
...
entered via fall-through. Don't miss fallthroughs from blocks
terminated by conditional branches. Also, move
isOnlyReachableByFallthrough out of line.
llvm-svn: 68129
2009-03-31 18:39:13 +00:00
4ce6e69022
Update call graph after inlining invoke.
...
Patch by Jay Foad.
llvm-svn: 68120
2009-03-31 17:36:12 +00:00
fb1a6eb69b
Add llvm::sys::getHostTriple and remove
...
llvm::sys::getOS{Name,Version}.
Right now the implementation just derives from LLVM_HOSTTRIPLE (which
is wrong, but it doesn't look like we have a define for the target
triple). Ideally this routine would actually be able to compute the
triple for targets we care about.
llvm-svn: 68118
2009-03-31 17:30:15 +00:00
d51f196ff5
Minor top-level comment fix.
...
llvm-svn: 68113
2009-03-31 16:51:18 +00:00
9277379fc0
remove unused arguments.
...
llvm-svn: 68109
2009-03-31 16:16:57 +00:00
6afae239c2
Really temporarily revert r68073.
...
llvm-svn: 68100
2009-03-31 08:42:40 +00:00
b8017e02ca
Oy! When reverting r68073, I added in experimental code. Sorry...
...
llvm-svn: 68099
2009-03-31 08:41:31 +00:00
4486c1fac0
Remove the "fast" cases for spill and restore point determination, as these were subtlely wrong in obscure cases. Patch the testcase
...
to account for this change.
llvm-svn: 68093
2009-03-31 08:27:09 +00:00
c4b08e5eb0
Revert r68073. It's causing a failure in the Apple-style builds.
...
llvm-svn: 68092
2009-03-31 08:26:26 +00:00
97a20b8dbf
Fix live-out reg logic to not insert over-aggressive AssertZExt
...
instructions. This fixes lua.
llvm-svn: 68083
2009-03-31 01:38:29 +00:00
885bc6de52
X86 address mode isel tweak. If the base of the address is also used by a CopyToReg (i.e. it's likely live-out), do not fold the sub-expressions into the addressing mode to avoid computing the address twice. The CopyToReg use will be isel'ed to a LEA, re-use it for address instead.
...
This is not yet enabled.
llvm-svn: 68082
2009-03-31 01:13:53 +00:00
adccd30533
Except in asm-verbose mode, avoid printing labels for blocks that are
...
only reachable via fall-through edges. This dramatically reduces the
number of labels printed, and thus also the number of labels the
assembler must parse and remember.
llvm-svn: 68073
2009-03-30 22:55:17 +00:00
6e68bd007a
Loop Index Split can eliminate a loop if it can determin if loop body is executed only once. There was a bug in determining IV based value of the iteration for which the loop body is executed. Fix it.
...
llvm-svn: 68071
2009-03-30 22:24:10 +00:00
a84a318873
When optimzing a mul by immediate into two, the resulting mul's should get a x86 specific node to avoid dag combiner from hacking on them further.
...
llvm-svn: 68066
2009-03-30 21:36:47 +00:00
09f5be8146
Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed.
...
e.g.
%reg1024<def> = MOV r1
%reg1025<def> = ADD %reg1024, %reg1026
r0 = MOV %reg1025
If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy.
llvm-svn: 68065
2009-03-30 21:34:07 +00:00
2f52e6488f
Balance out quote in debug output.
...
llvm-svn: 68059
2009-03-30 20:32:22 +00:00
5f0d97c571
Fix grammar-o in comment.
...
llvm-svn: 68057
2009-03-30 20:30:02 +00:00
ff62c62b7c
Constify arguments in isSuccessor and isLayoutSuccessor.
...
llvm-svn: 68054
2009-03-30 20:06:29 +00:00
57178e8822
Fix comment to match function name.
...
llvm-svn: 68050
2009-03-30 18:49:37 +00:00
7a78f3abd3
getEntryFor() may invalidate DenseMap iterator.
...
Walking an invalidated iterator is not a good idea.
llvm-svn: 68047
2009-03-30 18:34:47 +00:00
56709fdffe
Fix thinko: put stuff with both global and local relocations into data.rel{.ro}, not .local
...
llvm-svn: 68036
2009-03-30 17:37:43 +00:00
255a3cbfb4
Fix infinite looping
...
llvm-svn: 68034
2009-03-30 15:28:21 +00:00
d5e8e93a92
Properly propagate Kind.
...
llvm-svn: 68033
2009-03-30 15:28:00 +00:00
7c5f3c40ca
Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness.
...
llvm-svn: 68032
2009-03-30 15:27:43 +00:00
c247fd396c
Add data.rel stuff
...
llvm-svn: 68031
2009-03-30 15:27:03 +00:00
bea241a5f5
IA64 is as weird as Alpha wrt r/o relocs :)
...
llvm-svn: 68007
2009-03-29 17:14:35 +00:00
014a86f216
Alpha always requires global relocations to be r/w regardless of PIC.
...
llvm-svn: 68006
2009-03-29 17:14:14 +00:00
088ebede53
Honour relocation behaviour stuff for ro objects
...
llvm-svn: 68005
2009-03-29 17:13:49 +00:00
7437b59caf
Extend the relocation tracker handler, so we can filter on different 'kinds' of relocations required.
...
llvm-svn: 68004
2009-03-29 17:13:18 +00:00
d21581eaa1
Fix PR3899: add support for extracting floats from vectors
...
when using -soft-float.
Based on a patch by Jakob Stoklund Olesen.
llvm-svn: 67996
2009-03-29 13:51:06 +00:00
8eda11bd9d
now that you can put a PointerIntPair in a SmallPtrSet, remove some
...
hackish workarounds from memdep
llvm-svn: 67971
2009-03-29 00:24:04 +00:00
356d974a93
add a note
...
llvm-svn: 67953
2009-03-28 19:26:55 +00:00
1f11c3c36f
Use array_lengthof
...
llvm-svn: 67950
2009-03-28 19:02:18 +00:00
6ff3dabbb4
Have only one definition of X86AddrNumOperands.
...
llvm-svn: 67949
2009-03-28 18:55:31 +00:00
c2a17d3022
Make code a bit less brittle by no hardcoding the number
...
of operands in an address in so many places.
llvm-svn: 67945
2009-03-28 17:03:24 +00:00
e622cbf385
Make check in CheckTailCallReturnConstraints for ignorable instructions between
...
a CALL and a RET node more generic. Add a test for tail calls with a void
return.
llvm-svn: 67943
2009-03-28 12:36:29 +00:00
83d5420d02
Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).
...
llvm-svn: 67934
2009-03-28 08:33:27 +00:00
fd81c73cde
Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
...
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
llvm-svn: 67917
2009-03-28 05:57:29 +00:00
7516668998
move a large method out of line.
...
llvm-svn: 67892
2009-03-28 02:08:47 +00:00
2785e4be37
Fix what surely must be a copy+pasto.
...
llvm-svn: 67881
2009-03-27 23:55:04 +00:00
6d75876473
Initialize LiveOutInfo's APInt members to zero, as APInt's
...
default constructor produces an uninitialized APInt.
This fixes PR3896.
llvm-svn: 67879
2009-03-27 23:51:02 +00:00
669f1d0b0b
remove trailing whitespace
...
llvm-svn: 67874
2009-03-27 23:06:27 +00:00
41c8515b1b
"ghostify" the ilist<Function> sentinel
...
llvm-svn: 67872
2009-03-27 22:28:33 +00:00
705f2a6cd2
Avoid hardcoding that X86 addresses have 4 operands.
...
llvm-svn: 67848
2009-03-27 15:57:50 +00:00
227815437a
Use less hard coded constants to make the code less brittle.
...
llvm-svn: 67846
2009-03-27 15:45:05 +00:00
e728019392
I am trying to add a segment to the X86 addresses matching to
...
improve TLS support (see http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090309/075220.html ), but that code is VERY brittle.
This patch just makes it a bit more resistant.
llvm-svn: 67843
2009-03-27 15:26:30 +00:00
3241b74f69
Revert r67798: it breaks llvm-gcc bootstrap on x86-64-linux, presumably due to
...
a miscompilation.
make[4]: Entering directory `gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include'
if [ ! -d "./x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch" ]; then \
mkdir -p ./x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch; \
fi; \
gcc-4.2.llvm-objects/./gcc/xgcc -shared-libgcc -Bgcc-4.2.llvm-objects/./gcc -nostdinc++
-Lgcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/src -Lgcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/src/.libs
-B/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/bin/ -B/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/lib/ -isystem
/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/include -isystem /usr/local/gnat-llvm/x86_64-unknown-linux-gnu/sys-include -Winvalid-pch -Wno-deprecated -x
c++-header -g -O2 -D_GNU_SOURCE -Igcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/x86_64-unknown-linux-gnu
-Igcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include -Igcc-4.2.llvm/libstdc++-v3/libsupc++ -O2 -g
gcc-4.2.llvm/libstdc++-v3/include/precompiled/stdtr1c++.h -o x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch/O2g.gch
In file included from gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/repeat.h:247,
from gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/functional:1098,
from gcc-4.2.llvm/libstdc++-v3/include/precompiled/stdtr1c++.h:53:
gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/functional_iterate.h:417: internal compiler error: in ggc_recalculate_in_use_p, at
ggc-page.c:1602
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://llvm.org/bugs/ > for instructions.
make[4]: *** [x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch/O2g.gch] Error 1
llvm-svn: 67839
2009-03-27 14:56:47 +00:00
f4be420def
-write-graph now can be used with -o.
...
Makes it possible to set the output file name.
llvm-svn: 67835
2009-03-27 12:57:14 +00:00
a1be2dcd63
Shrink wrapping in PEI: initial release. Finishing development, enable with --shrink-wrap.
...
llvm-svn: 67828
2009-03-27 06:09:40 +00:00
4026b041ce
One more place to skip debug info.
...
llvm-svn: 67811
2009-03-27 01:13:37 +00:00
fe7c0492a0
While hoisting an instruction, update alias info set tracker.
...
llvm-svn: 67798
2009-03-26 23:48:52 +00:00
d88ebc352c
-no-implicit-float means explicit fp operations are legal.
...
llvm-svn: 67784
2009-03-26 23:06:32 +00:00
87aa96ddf3
Fix misc. small issues with debug visualization.
...
Detailed bug report:
http://llvm.org/bugs/show_bug.cgi?id=3873
llvm-svn: 67768
2009-03-26 21:23:48 +00:00
904f14663d
tADDhirr is a thumb instruction. Do not allow this code to be reached in non-thumb mode.
...
llvm-svn: 67765
2009-03-26 19:09:01 +00:00
76a561f35e
Don't assign a new stack slot if the pre-alloc splitter already assigned one.
...
llvm-svn: 67764
2009-03-26 18:53:38 +00:00
aa28be652c
Pull transform from target-dependent code into target-independent code.
...
llvm-svn: 67742
2009-03-26 06:14:09 +00:00
78b7cbe668
fix warning in -asserts mode.
...
llvm-svn: 67739
2009-03-26 05:29:34 +00:00
f38fd11a26
fix some warnings in release-asserts mode.
...
llvm-svn: 67738
2009-03-26 05:28:26 +00:00
3c04970f31
fix an apparently real bug exposed by a warning in -asserts mode.
...
llvm-svn: 67737
2009-03-26 05:28:14 +00:00
3871781c7b
fix warning in -asserts build.
...
llvm-svn: 67736
2009-03-26 05:25:59 +00:00
94f299f2c5
Match this pattern so that we can generate simpler code:
...
%a = ...
%b = and i32 %a, 2
%c = srl i32 %b, 1
%d = br i32 %c,
into
%a = ...
%b = and %a, 2
%c = X86ISD::CMP %b, 0
%d = X86ISD::BRCOND %c ...
This applies only when the AND constant value has one bit set and the SRL
constant is equal to the log2 of the AND constant. The back-end is smart enough
to convert the result into a TEST/JMP sequence.
llvm-svn: 67728
2009-03-26 01:47:50 +00:00
189d67181c
Doxygen-ify comments.
...
llvm-svn: 67727
2009-03-26 01:46:56 +00:00
db90560c1c
Skip debug info one more place. (This one gets
...
called from llc, not opt, but it's an IR level
optimization nevertheless.)
llvm-svn: 67724
2009-03-26 01:15:07 +00:00
4555618854
Before deleting a basic block, give other loop passes a chance cleanup analysis values, related to the instructions in the basic block.
...
llvm-svn: 67719
2009-03-25 23:57:48 +00:00
2e9f42bed5
Revert 67132. This is breaking some objective-c apps.
...
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.
llvm-svn: 67701
2009-03-25 20:20:11 +00:00
eb1646d28c
When optimizing with debug info, don't keep the
...
stoppoint nodes around until Legalize; doing this
imposed an ordering on a sequence of loads that
came from different lines, interfering with scheduling.
llvm-svn: 67692
2009-03-25 17:36:08 +00:00
56a95f6c16
Fix a bug in our autoupgrade support: in an argument list to a function
...
call, we should treat "i64 zext" as the start of a constant expr, but
"i64 0 zext" as an argument with an obsolete attribute on it (this form
is already tested by test/Assembler/2007-07-30-AutoUpgradeZextSext.ll).
Make the autoupgrade logic more discerning to avoid treating "i64 zext"
as an old-style attribute, causing us to reject a valid constant expr.
This fixes PR3876.
llvm-svn: 67682
2009-03-25 06:36:36 +00:00
2755edf4c4
do not rely on callee being operand 0
...
llvm-svn: 67681
2009-03-25 06:32:59 +00:00
68b0881d94
Do not ignore DW_TAG_class_type!
...
llvm-svn: 67675
2009-03-25 03:52:06 +00:00
5e5a63cf8f
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
...
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
9966403e90
Don't print global names twice with -asm-verbose.
...
llvm-svn: 67667
2009-03-25 01:08:42 +00:00
c3b2111d97
Fix PR3874 by restoring a condition I removed, but making it more
...
precise than it used to be.
llvm-svn: 67662
2009-03-25 00:28:58 +00:00
a6e85a19c6
Do not ignore DW_TAG_class_type!
...
llvm-svn: 67661
2009-03-25 00:28:40 +00:00
9e94538005
oops, I intended to remove this, not comment it out. Thanks Duncan!
...
llvm-svn: 67657
2009-03-24 23:48:25 +00:00
f413a88839
Fix PR3845: Avoid stale MachineInstruction pointer reference.
...
llvm-svn: 67649
2009-03-24 20:33:17 +00:00
e7e5becdd2
simplify logic and get rid of the assumption that operand 0 is the callee
...
llvm-svn: 67642
2009-03-24 19:28:39 +00:00
306813cbbb
canonicalize inttoptr and ptrtoint instructions which cast pointers
...
to/from integer types that are not intptr_t to convert to intptr_t
then do an integer conversion to the dest type. This exposes the
cast to the optimizer.
llvm-svn: 67638
2009-03-24 18:35:40 +00:00
4d7e4ee799
fix one more fp80 case (used only by Interpreter)
...
and streamline code here a bit.
llvm-svn: 67636
2009-03-24 18:16:17 +00:00
d9eb41177a
two changes:
...
1. Make instcombine always canonicalize trunc x to i1 into an icmp(x&1). This
exposes the AND to other instcombine xforms and is more of what the code
generator expects.
2. Rewrite the remaining trunc pattern match to use 'match', which
simplifies it a lot.
llvm-svn: 67635
2009-03-24 18:15:30 +00:00
f259f3f312
Change JIT for different layout of fp80.
...
llvm-svn: 67629
2009-03-24 17:35:45 +00:00
c35847e109
more tidying: name the components of PhysReg in the case when
...
the target constraint specifies a specific physreg.
llvm-svn: 67618
2009-03-24 15:27:37 +00:00
42eceb3491
Tidy a bit more.
...
llvm-svn: 67617
2009-03-24 15:25:07 +00:00
246eda43bd
simplify this code a bit now that "allocation to a vreg class" can never
...
fail.
llvm-svn: 67616
2009-03-24 15:22:11 +00:00
efd2d44aa5
I was convinced that it's ok to allow a second i8 return value
...
to be returned in DL. LLVM's multiple-return-value support is
not ABI-conforming; front-ends that wish to have code emitted
that conforms to an ABI are currently expected to make
arrangements for this on their own rather than assuming that
multiple-return-values will automatically do the right thing.
This commit doesn't fundamentally change this situation.
llvm-svn: 67588
2009-03-24 01:04:34 +00:00
f3746cbc56
Minor compile-time optimization; don't bother checking
...
canClobberPhysRegDefs if the successor node doesn't
clobber any physical registers.
llvm-svn: 67587
2009-03-24 00:50:07 +00:00
9a658d72db
Add a pre-pass to the burr-list scheduler which makes adjustments to
...
help out the register pressure reduction heuristics in the case of
nodes with multiple uses. Currently this uses very conservative
heuristics, so it doesn't have a broad impact, but in cases where it
does help it can make a big difference.
llvm-svn: 67586
2009-03-24 00:49:12 +00:00
a774a99245
Do not emit comments unless -asm-verbose.
...
llvm-svn: 67580
2009-03-24 00:17:40 +00:00
32dfb35281
Use a SmallPtrSet instead of std::set.
...
llvm-svn: 67578
2009-03-23 23:39:20 +00:00
7fe1b0f50f
Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases.
...
e.g. allocating for GR32, bh is not used, updating bl spill weight.
bl should get the same spill weight otherwise it will be choosen
as a spill candidate since spilling bh doesn't make ebx available.
This fix PR2866.
llvm-svn: 67574
2009-03-23 22:57:19 +00:00
93eefa0043
Fix internal representation of fp80 to be the
...
same as a normal i80 {low64, high16} rather
than its own {high64, low16}. A depressing number
of places know about this; I think I got them all.
Bitcode readers and writers convert back to the old
form to avoid breaking compatibility.
llvm-svn: 67562
2009-03-23 21:16:53 +00:00
ed0e8d44ce
When unfolding a load during scheduling, the new operator node has
...
a data dependency on the load node, so it really needs a
data-dependence edge to the load node, even if the load previously
existed.
And add a few comments.
llvm-svn: 67554
2009-03-23 20:20:43 +00:00
f858466018
Fix PR3391 and PR3864. Reg allocator infinite looping.
...
llvm-svn: 67544
2009-03-23 18:24:37 +00:00
f477262e69
Don't set SUnit::hasPhysRegDefs to true unless the defs are
...
actually have uses, which reflects the way it's used.
llvm-svn: 67540
2009-03-23 17:39:36 +00:00
a366da1bf7
Fix canClobberPhysRegDefs to check all SDNodes grouped together
...
in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.
llvm-svn: 67531
2009-03-23 16:23:01 +00:00
52c278e54d
Add a new bit to SUnit to record whether a node has implicit physreg
...
defs, regardless of whether they are actually used.
llvm-svn: 67528
2009-03-23 16:10:52 +00:00
4f2fea1a21
Now that errs() is properly non-buffered, there's no need to
...
explicitly flush it.
llvm-svn: 67526
2009-03-23 15:57:19 +00:00
21ff35195e
LoopVR is not CFGOnly.
...
llvm-svn: 67524
2009-03-23 15:50:52 +00:00
5aabc424b1
Enhance LiveValues to work on PHI operands.
...
llvm-svn: 67523
2009-03-23 15:49:37 +00:00
4a683478d5
Correct some comments. Operand numbers start at 0.
...
llvm-svn: 67518
2009-03-23 15:40:10 +00:00
968c3b0d6e
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
...
llvm-svn: 67512
2009-03-23 08:01:15 +00:00
47c9750f04
Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
...
%RAX<def> = ...
%RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
The first def is defining RAX, not EAX so the top bits were not zero-extended.
llvm-svn: 67511
2009-03-23 07:19:58 +00:00
f2b60658ef
fix a bug Alexei Svitkine pointed out.
...
llvm-svn: 67510
2009-03-23 06:46:20 +00:00
fb95472123
When we restore signal handlers, restore them back to what they
...
were when we came around, not to their default handler. This
should fix PR3848
llvm-svn: 67509
2009-03-23 05:55:36 +00:00
f299a68ee0
factorize signal registration, part of PR3848.
...
llvm-svn: 67508
2009-03-23 05:42:29 +00:00
772de0ae2d
Fix a grammaro in a comment that Bill noticed.
...
llvm-svn: 67507
2009-03-23 05:02:44 +00:00
70d9929def
Add comments explaining why there's only one register for
...
i8 return values.
llvm-svn: 67502
2009-03-23 04:28:24 +00:00
1f15ca7c7a
Factorize out a concept - no functionality change.
...
llvm-svn: 67454
2009-03-21 21:27:31 +00:00
cbeda87da1
add a fastpath to ConstantExpr::getBitCast to handle the case when an obviously
...
unneeded bitcast is requested. This is common for frontends who just unconditionally
cast even if the target is often the right type already. THis prevents going into
getFoldedCast which switches on the opcode and does a bunch of other stuff before
doing the same opzn.
llvm-svn: 67435
2009-03-21 06:55:54 +00:00
9b9586a5ae
Removed AFGR32 register class
...
Handle odd registers allocation in FGR32.
llvm-svn: 67422
2009-03-21 00:05:07 +00:00
Bob Wilson