llvm-project

Commit Graph

Author	SHA1	Message	Date
Ulrich Weigand	ac37755c60	[SystemZ] Use fneg in test cases Now that we have fneg, prefer using it over "fsub -0.0, ...". This helps in particular with strict FP tests, as fneg does not raise any exceptions.	2019-11-20 19:08:27 +01:00
Ulrich Weigand	33435c4c9c	[SystemZ] Add support for IBM z14 processor (2/3) This adds support for the new 32-bit vector float instructions of z14. This includes: - Enabling the instructions for the assembler/disassembler. - CodeGen for the instructions, including new LLVM intrinsics. - Scheduler description support for the instructions. - Update to the vector cost function calculations. In general, CodeGen support for the new v4f32 instructions closely matches support for the existing v2f64 instructions. llvm-svn: 308195	2017-07-17 17:42:48 +00:00

Author

SHA1

Message

Date

Ulrich Weigand

ac37755c60

[SystemZ] Use fneg in test cases

Now that we have fneg, prefer using it over "fsub -0.0, ...".
This helps in particular with strict FP tests, as fneg does
not raise any exceptions.

2019-11-20 19:08:27 +01:00

Ulrich Weigand

33435c4c9c

[SystemZ] Add support for IBM z14 processor (2/3)

This adds support for the new 32-bit vector float instructions of z14.
This includes:
- Enabling the instructions for the assembler/disassembler.
- CodeGen for the instructions, including new LLVM intrinsics.
- Scheduler description support for the instructions.
- Update to the vector cost function calculations.

In general, CodeGen support for the new v4f32 instructions closely
matches support for the existing v2f64 instructions.

llvm-svn: 308195

2017-07-17 17:42:48 +00:00

2 Commits