Commit Graph

829 Commits

Author SHA1 Message Date
Anton Korobeynikov 9833d8c369 Temporary revert my last commit: it seems it's triggering some subtle bug in backend
and breaks llvm-gcc

llvm-svn: 58926
2008-11-08 23:05:05 +00:00
Anton Korobeynikov 09f51d1fd4 Factor out offset printing code into generic AsmPrinter.
FIXME: it seems, that most of targets don't support
offsets wrt CPI/GlobalAddress', was it intentional?

llvm-svn: 58917
2008-11-08 17:21:38 +00:00
Evan Cheng 436bdcdcca Moved InvalidateInstructionCache to ARMJITInfo::emitFunctionStub which knows size of stub.
llvm-svn: 58899
2008-11-08 08:16:49 +00:00
Evan Cheng b31a717527 Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr.
llvm-svn: 58897
2008-11-08 08:02:53 +00:00
Evan Cheng 98161f5f34 Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated.
llvm-svn: 58896
2008-11-08 07:38:22 +00:00
Evan Cheng bb373c4637 Fix relocation for calls to external symbols.
llvm-svn: 58893
2008-11-08 07:22:33 +00:00
Evan Cheng 077c8f8832 Skip over two-address use operands.
llvm-svn: 58883
2008-11-08 01:44:13 +00:00
Evan Cheng ffdd91e3b8 Handle ARM machine constantpool entry with non-lazy ptr.
llvm-svn: 58882
2008-11-08 01:31:27 +00:00
Evan Cheng 454ff53d58 Use ARMFunctionInfo to track number of constpool entries and jumptables.
llvm-svn: 58877
2008-11-08 00:51:41 +00:00
Evan Cheng ef4d78ba67 More code clean up.
llvm-svn: 58872
2008-11-07 22:57:53 +00:00
Evan Cheng 8467e2459a Get PIC jump table working.
llvm-svn: 58869
2008-11-07 22:30:53 +00:00
Dan Gohman cb0df597e0 Flush the raw_ostream after emitting the assembly for a function.
This is a temporary fix for the -print-emitted-asm option, where
errs() is used as the stream, in the case where other code is
using stderr without using errs()' buffer. Hopefully soon we'll
fix errs() to be non-buffered instead. Patch by Preston Gurd.

llvm-svn: 58859
2008-11-07 19:49:17 +00:00
Evan Cheng 7095cd2af2 Jump table JIT support. Work in progress.
llvm-svn: 58836
2008-11-07 09:06:08 +00:00
Evan Cheng 98dc53e926 Encode misc arithmetic instructions.
llvm-svn: 58828
2008-11-07 01:41:35 +00:00
Evan Cheng 49d665218c Encode extend instructions; more clean up.
llvm-svn: 58818
2008-11-06 22:15:19 +00:00
Evan Cheng aa03cd3336 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.
- Consolidate instruction formats.
- Other clean up.

llvm-svn: 58808
2008-11-06 17:48:05 +00:00
Evan Cheng 47b546d75f Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug.
llvm-svn: 58800
2008-11-06 08:47:38 +00:00
Evan Cheng 36ae40342f Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
llvm-svn: 58793
2008-11-06 03:35:07 +00:00
Evan Cheng b870fd8874 Fix so_imm encoding bug; add support for MOVi2pieces.
llvm-svn: 58790
2008-11-06 02:25:39 +00:00
Evan Cheng 2686c8fb34 Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls.
llvm-svn: 58789
2008-11-06 01:21:28 +00:00
Evan Cheng fd2adbfa28 Encode pic load / store instructions; fix some encoding bugs.
llvm-svn: 58780
2008-11-05 23:22:34 +00:00
Evan Cheng 81889d010c Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.
llvm-svn: 58764
2008-11-05 18:35:52 +00:00
Dan Gohman f14b77ebf1 Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.

The impact on most targets is that AddToISelQueue calls can be simply removed.

In the x86 target, there are two additional notable changes.

The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.

Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.

llvm-svn: 58748
2008-11-05 04:14:16 +00:00
Evan Cheng e3827d9061 Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.
llvm-svn: 58725
2008-11-04 22:19:55 +00:00
Evan Cheng 297b32a367 Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.
llvm-svn: 58714
2008-11-04 19:57:48 +00:00
Evan Cheng 4eaff40147 Debug output tweak.
llvm-svn: 58708
2008-11-04 17:58:53 +00:00
Evan Cheng 453844c352 LDM_RET restores pc, do not set 's' bit which would restore CPSR from SPSR.
llvm-svn: 58707
2008-11-04 17:57:07 +00:00
Evan Cheng 9340be4641 For some targets, it's not possible to place GVs in the same memory buffer as the MachineCodeEmitter allocated memory. Code and data has different read / write / execution privilege requirements.
This is a short term workaround. The current solution is for the JIT memory manager to manage code and data memory separately.

llvm-svn: 58688
2008-11-04 09:30:48 +00:00
Evan Cheng 2299c99d79 Stylistic change.
llvm-svn: 58683
2008-11-04 06:10:06 +00:00
Evan Cheng 6dd08b6604 Handle ARM machine constantpool entries.
llvm-svn: 58671
2008-11-04 00:50:32 +00:00
Evan Cheng f60e5aaaac Remove a dead switch statement.
llvm-svn: 58644
2008-11-03 21:26:52 +00:00
Evan Cheng 3620e685b5 Minor code restructuring. No functionality change.
llvm-svn: 58643
2008-11-03 21:02:39 +00:00
Jim Grosbach 4d0549e3be Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there.
llvm-svn: 58626
2008-11-03 18:38:31 +00:00
Dan Gohman ac41d9f5d8 Refactor various TargetAsmInfo subclasses' TargetMachine members away
adding a TargetMachine member to the base TargetAsmInfo class instead.

llvm-svn: 58624
2008-11-03 18:22:42 +00:00
Evan Cheng 83bf3de134 Add comment.
llvm-svn: 58533
2008-10-31 19:56:03 +00:00
Evan Cheng 20dbb3bcad Use better data structure for ConstPoolId2AddrMap.
llvm-svn: 58532
2008-10-31 19:55:13 +00:00
Evan Cheng 44994e0c77 Actually make debug output understandable.
llvm-svn: 58529
2008-10-31 19:15:52 +00:00
Evan Cheng 8fce66a47c Forgot this in last commit.
llvm-svn: 58527
2008-10-31 19:11:09 +00:00
Evan Cheng 467e6e8093 Encode PICADD; some code clean up.
llvm-svn: 58526
2008-10-31 19:10:44 +00:00
Evan Cheng c696ef9b11 I think we got non-machine specific constpool entries covered.
llvm-svn: 58474
2008-10-30 23:43:36 +00:00
Evan Cheng 66cff408ff ARM JIT should observe -relocation-model command line option.
llvm-svn: 58433
2008-10-30 16:10:54 +00:00
Evan Cheng 19d64ba8bf Correct way to handle CONSTPOOL_ENTRY instructions.
llvm-svn: 58409
2008-10-29 23:55:43 +00:00
Evan Cheng de9dbc5584 Add debugging support.
llvm-svn: 58408
2008-10-29 23:55:17 +00:00
Jim Grosbach ff2b4948ce Support for constant islands in the ARM JIT.
Since the ARM constant pool handling supercedes the standard LLVM constant
pool entirely, the JIT emitter does not allocate space for the constants,
nor initialize the memory. The constant pool is considered part of the 
instruction stream.

Likewise, when resolving relocations into the constant pool, a hook into
the target back end is used to resolve from the constant ID# to the
address where the constant is stored.

For now, the support in the ARM emitter is limited to 32-bit integer. Future
patches will expand this to the full range of constants necessary.

llvm-svn: 58338
2008-10-28 18:25:49 +00:00
David Greene ce2a938186 Have TableGen emit setSubgraphColor calls under control of a -gen-debug
flag.  Then in a debugger developers can set breakpoints at these calls
to see waht is about to be selected and what the resulting subgraph
looks like.  This really helps when debugging instruction selection.

llvm-svn: 58278
2008-10-27 21:56:29 +00:00
Oscar Fuentes 9ba4650b76 CMake: lib/Target/ARM/AsmPrinter/CMakeLists.txt added.
llvm-svn: 58133
2008-10-25 03:40:32 +00:00
Jim Grosbach 1ecf1fd5c8 remove extraneous #ifdef's
llvm-svn: 58006
2008-10-22 22:27:51 +00:00
Oscar Fuentes f3c03b02dc CMake: Turned some libraries into partially linked objects. Corrected
names of LLVMCore and ARMCodeGen.

llvm-svn: 57943
2008-10-22 02:51:53 +00:00
Jim Grosbach cfebc18d7c use pre-UAL mnemonics for push/pop for compilaton callback function
llvm-svn: 57911
2008-10-21 16:54:12 +00:00
Jim Grosbach 9396051e3d Update the stub and callback code to handle lazy compilation. The stub
is re-written by the callback to branch directly to the compiled code
in future invocations.

Added back in range-based memory permission functions for the updating of
the stub on Darwin.

llvm-svn: 57846
2008-10-20 21:39:23 +00:00