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683 Commits

Author SHA1 Message Date
Chris Lattner a348f55ec6 Change the 'isStore' inferrer to look for 'SDNPMayStore' 
instead of "ISD::STORE".  This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores).  This allows us to remove
more explicit isStore flags from the .td files.

Finally, add a warning for when a .td file contains an explicit 
isStore and tblgen is able to infer it.

llvm-svn: 45654
 2008-01-06 06:44:58 +00:00
Owen Anderson eee14601b1 Move some more instruction creation methods from RegisterInfo into InstrInfo. 
llvm-svn: 45484
 2008-01-01 21:11:32 +00:00
Chris Lattner 25568e4cef Fix a problem where lib/Target/TargetInstrInfo.h would include and use 
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475
 2008-01-01 01:03:04 +00:00
Owen Anderson 7a73ae9a86 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the 
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
 2007-12-31 06:32:00 +00:00
Chris Lattner a10fff51d9 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner a5bb370aa4 Add new shorter predicates for testing machine operands for various types: 
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
 2007-12-30 23:10:15 +00:00
Chris Lattner 5c4637816e Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm 
llvm-svn: 45453
 2007-12-30 20:49:49 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Chris Lattner a087a8d2ce remove attribution from lib Makefiles. 
llvm-svn: 45415
 2007-12-29 20:09:26 +00:00
Chris Lattner 00602f6105 fix some warnings. This code needs to be de-tabified :( 
llvm-svn: 45325
 2007-12-22 22:47:03 +00:00
Chris Lattner 91f3379660 fix strict-aliasing violation 
llvm-svn: 45324
 2007-12-22 22:45:38 +00:00
Scott Michel 5f1470f03a More working CellSPU tests: 
- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads

llvm-svn: 45242
 2007-12-20 00:44:13 +00:00
Scott Michel 5ecac82f71 CellSPU testcase, extract_elt.ll: extract vector element. 
llvm-svn: 45219
 2007-12-19 21:17:42 +00:00
Scott Michel 098c113bc8 Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll 
(vector insertions)

llvm-svn: 45216
 2007-12-19 20:15:47 +00:00
Scott Michel 9b834469e0 Add new immed16.ll test case, fix CellSPU errata to make test case work. 
llvm-svn: 45196
 2007-12-19 07:35:06 +00:00
Scott Michel c5cccb9e60 - Restore some i8 functionality in CellSPU 
- New test case: nand.ll

llvm-svn: 45130
 2007-12-17 22:32:34 +00:00
Chris Lattner 2af27c202c don't violate C TBAA rules, use FloatToBits instead. 
llvm-svn: 45076
 2007-12-16 20:41:33 +00:00
Scott Michel 0aa7133f82 Start committing working test cases for CellSPU. 
llvm-svn: 45050
 2007-12-15 00:38:50 +00:00
Scott Michel 83d54c9ee0 Minor updates: 
- Fix typo in SPUCallingConv.td
- Credit myself for CellSPU work
- Add CellSPU to 'all' host target list

llvm-svn: 44627
 2007-12-05 21:23:16 +00:00
Evan Cheng 8492bdeaa4 Update foldMemoryOperand. 
llvm-svn: 44621
 2007-12-05 18:36:37 +00:00
Chris Lattner de9bfcf67a fix warnings 
llvm-svn: 44620
 2007-12-05 18:32:18 +00:00
Chris Lattner 8292519705 allow this to build 
llvm-svn: 44619
 2007-12-05 18:30:11 +00:00
Evan Cheng bb26301864 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.

llvm-svn: 44600
 2007-12-05 03:14:33 +00:00
Scott Michel 4834955fdf More stuff for CellSPU -- this should be enough to get an error-free 
compilation (no files missing). Test cases remain to be checked in.

llvm-svn: 44598
 2007-12-05 02:01:41 +00:00
Scott Michel d1b5b9f68c Updated source file headers to llvm coding standard. 
llvm-svn: 44597
 2007-12-05 01:40:25 +00:00
Scott Michel 8d35728607 Two missing files. 
llvm-svn: 44596
 2007-12-05 01:31:18 +00:00
Scott Michel eff980208a Main CellSPU backend files checked in. Intrinsics and autoconf files 
remain.

llvm-svn: 44595
 2007-12-05 01:24:05 +00:00
Scott Michel dfe09ed085 More files in the CellSPU drop... 
llvm-svn: 44584
 2007-12-04 22:35:58 +00:00
Scott Michel 6e22c651d1 More of the Cell SPU code drop from "Team Aerospace". 
llvm-svn: 44582
 2007-12-04 22:23:35 +00:00
Scott Michel d821fe741e More CellSPU files... more to follow. 
llvm-svn: 44559
 2007-12-03 23:14:43 +00:00
Scott Michel c7bd8d9cb0 Makefile fragment for CellSPU. 
llvm-svn: 44558
 2007-12-03 23:12:49 +00:00
Scott Michel 256e9abbb9 First commit to CellSPU. More to follow 
llvm-svn: 44557
 2007-12-03 23:09:49 +00:00
Scott Michel 734077b1f0 First test check-in. 
llvm-svn: 35429
 2007-03-28 17:04:43 +00:00