6 Commits

Author	SHA1	Message	Date
Evan Cheng	3e18e504ae	Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. ... llvm-svn: 41863	2007-09-11 19:55:27 +00:00
Bruno Cardoso Lopes	9fbef51078	MipsHi now has ouput flag ... MipsAdd SDNode created to add support to an Add opcode which supports input flag Added an instruction itinerary to all instruction classes Added branches with zero cond codes Now call clobbers all non-callee saved registers Call w/ register support added Added DelaySlot to branch and load instructions Added patterns to handle all setcc, brcond/setcc and MipsAdd instructions llvm-svn: 41161	2007-08-18 02:37:46 +00:00
Evan Cheng	ac1591be42	No more noResults. ... llvm-svn: 40132	2007-07-21 00:34:19 +00:00
Evan Cheng	94b5a80b93	Change instruction description to split OperandList into OutOperandList and ... InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; llvm-svn: 40033	2007-07-19 01:14:50 +00:00
Bruno Cardoso Lopes	c5affeccbd	Removed unused immediate PatLeaf, fixed lui instruction ... llvm-svn: 39759	2007-07-11 22:47:02 +00:00
Bruno Cardoso Lopes	35e43c49b0	Initial Mips support, here we go! =) ... - Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. llvm-svn: 37461	2007-06-06 07:42:06 +00:00