llvm-project

Commit Graph

Author	SHA1	Message	Date
Fangrui Song	71e2ca6e32	[llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` The new behavior matches GNU objdump. A pair of angle brackets makes tests slightly easier. `.foo:` is not unique and thus cannot be used in a `CHECK-LABEL:` directive. Without `-LABEL`, the CHECK line can match the `Disassembly of section` line and causes the next `CHECK-NEXT:` to fail. ``` Disassembly of section .foo: 0000000000001634 .foo: ``` Bdragon: <> has metalinguistic connotation. it just "feels right" Reviewed By: rupprecht Differential Revision: https://reviews.llvm.org/D75713	2020-03-05 18:05:28 -08:00
Jason Liu	8cf8bb1313	Test commit: add a blank line in test case ppc64-dq-expr.s llvm-svn: 355942	2019-03-12 17:33:07 +00:00
Sean Fertile	a2f095f1a3	[PowerPC][MC] Support expressions in getMemRIX16Encoding. Loosens an assert in getMemRIX16Encoding that restricts DQ-form instructions to using an immediate, so that we can assemble instructions like lxv/stxv where the offset is an expression. Differential Revision: https://reviews.llvm.org/D51122 llvm-svn: 340761	2018-08-27 17:37:43 +00:00

Author

SHA1

Message

Date

Fangrui Song

71e2ca6e32

[llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:`

The new behavior matches GNU objdump. A pair of angle brackets makes tests slightly easier.

`.foo:` is not unique and thus cannot be used in a `CHECK-LABEL:` directive.
Without `-LABEL`, the CHECK line can match the `Disassembly of section`
line and causes the next `CHECK-NEXT:` to fail.

```
Disassembly of section .foo:

0000000000001634 .foo:
```

Bdragon: <> has metalinguistic connotation. it just "feels right"

Reviewed By: rupprecht

Differential Revision: https://reviews.llvm.org/D75713

2020-03-05 18:05:28 -08:00

Jason Liu

8cf8bb1313

Test commit: add a blank line in test case ppc64-dq-expr.s

llvm-svn: 355942

2019-03-12 17:33:07 +00:00

Sean Fertile

a2f095f1a3

[PowerPC][MC] Support expressions in getMemRIX16Encoding.

Loosens an assert in getMemRIX16Encoding that restricts DQ-form instructions to
using an immediate, so that we can assemble instructions like lxv/stxv where the
offset is an expression.

Differential Revision: https://reviews.llvm.org/D51122

llvm-svn: 340761

2018-08-27 17:37:43 +00:00

3 Commits