Commit Graph

300468 Commits

Author SHA1 Message Date
Daniel Sanders 10dedc00d0 Correct implementation of -verify-machineinstrs such that it's still overridable for EXPENSIVE_CHECKS
-verify-machineinstrs was implemented as a simple bool. As a result, the
'VerifyMachineCode == cl::BOU_UNSET' used by EXPENSIVE_CHECKS to make it on by
default but possible to disable didn't work as intended. Changed
-verify-machineinstrs to a boolOrDefault to correct this.

llvm-svn: 343696
2018-10-03 16:29:24 +00:00
Adrian Prantl 1c8ed2081f Skip test with older versions of clang
llvm-svn: 343695
2018-10-03 16:24:14 +00:00
Sanjay Patel 306f14ceb8 [InstCombine] clean up foldVectorBinop(); NFC
1. Fix include ordering.
2. Improve variable name (width is bitwidth not number-of-elements).
3. Add local Opcode variable to reduce code duplication.

llvm-svn: 343694
2018-10-03 15:46:03 +00:00
Daniel Sanders fb9b99b26e [globalisel][combines] Don't sink G_TRUNC down to use if that use is a G_PHI
This fixes a problem where the register allocator fails to eliminate a PHI
because there's a non-PHI in the middle of the PHI instructions at the start
of a BB.

This G_TRUNC can be better placed but this at least fixes the correctness issue
quickly. I'll follow up with a patch to the verifier to catch this kind of bug
in future.

llvm-svn: 343693
2018-10-03 15:43:39 +00:00
Sanjay Patel 79dceb2903 [InstCombine] name change: foldShuffledBinop -> foldVectorBinop; NFC
This function will deal with more than shuffles with D50992, and I 
have another potential per-element fold that could live here.

llvm-svn: 343692
2018-10-03 15:20:58 +00:00
Andrea Di Biagio 207e0217f9 [llvm-mca] Add support for move elimination in class RegisterFile.
This patch teaches class RegisterFile how to analyze register writes from
instructions that are move elimination candidates.
In particular, it teaches it how to check if a move can be effectively eliminated
by the underlying PRF, and (if necessary) how to perform move elimination.

The long term goal is to allow processor models to describe instructions that
are valid move elimination candidates.
The idea is to let register file definitions in tablegen declare if/when moves
can be eliminated.

This patch is a non functional change.
The logic that performs move elimination is currently disabled.  A future patch
will add support for move elimination in the processor models, and enable this
new code path.

llvm-svn: 343691
2018-10-03 15:02:44 +00:00
Simon Pilgrim 92d02027c2 [llvm-exegesis] Avoid yaml parser from calling sscanf for obvious non-matches (PR39102)
deserializeMCOperand - ensure that we at least match the first character of the sscanf pattern before calling

This reduces llvm-exegesis uops analysis of the instructions supported from btver2 from 5m13s to 2m1s on debug builds.

llvm-svn: 343690
2018-10-03 14:51:09 +00:00
Nirav Dave 925b64be64 [X86] Correctly use SSE registers if no-x87 is selected.
Fix use of SSE1 registers for f32 ops in no-x87 mode.

Notably, allow use of SSE instructions for f32 operations in 64-bit
mode (but not 32-bit which is disallowed by callign convention).

Also avoid translating memset/memcopy/memmove into SSE registers
without X87 for 32-bit mode.

This fixes PR38738.

Reviewers: nickdesaulniers, craig.topper

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D52555

llvm-svn: 343689
2018-10-03 14:13:30 +00:00
Alex Bradbury d33ffe9bb1 [RISCV][NFC] Refactor RISCVDAGToDAGISel::Select
Introduce and use a switch on the opcode.

llvm-svn: 343688
2018-10-03 13:13:13 +00:00
James Henderson 99031b79a6 [ThinLTO]Expose cache entry expiration time option in llvm-lto and fix a test
Two cases in a ThinLTO test were passing for the wrong reasons, since
rL340374. The tests were supposed to be testing that files were being
pruned due to the cache size, but they were in fact being pruned because
they were older than the default expiration period of 1 week.

This change fixes the tests by explicitly setting the expiration time to
the maximum value. This required the option to be exposed in llvm-lto.

By assigning all files in the cache a similar time, it is possible to see
that the newest files are still being kept, and that we aren't passing
for the wrong reason again. In the event that the entry expiration were
to expire for them, then the test would start failing, because these
files would be removed too.

Reviewed by: rnk, inglorion

Differential Revision: https://reviews.llvm.org/D51992

llvm-svn: 343687
2018-10-03 13:00:20 +00:00
Jonas Paulsson fb3a97bec0 [RA CopyHints] Fix compile-time regression
This patch makes sure that a register is only hinted once to RA. In extreme
cases the same register can otherwise be hinted numerous times and cause a
compile time slowdown.

Review: Simon Pilgrim
https://reviews.llvm.org/D52826

llvm-svn: 343686
2018-10-03 12:51:19 +00:00
Clement Courbet 5a768ddd44 [llvm-exegesis][NFC] Revert rL343682 "Fix unused variable warning".
That was not the proper fix: the variable is used in debug mode.

llvm-svn: 343685
2018-10-03 12:48:50 +00:00
Clement Courbet 8a5a6be47a [llvm-exegesis] Fix rL343680 in release mode.
llvm-svn: 343684
2018-10-03 12:35:35 +00:00
Pavel Labath aef7908f6e Pull FixupBreakpointPCAsNeeded into base class
Summary:
This function existed (with identical code) in both NativeProcessLinux
and NativeProcessNetBSD, and it is likely that it would be useful to any
future implementation of NativeProcessProtocol.

Therefore I move it to the base class.

Reviewers: krytarowski

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D52719

llvm-svn: 343683
2018-10-03 12:29:33 +00:00
Clement Courbet af50a5b85f [llvm-exegesis][NFC] Fix unused variable warning.
llvm-svn: 343682
2018-10-03 12:27:43 +00:00
Aaron Puchert 7146b0032f Thread safety analysis: Unwrap __builtin_expect in getTrylockCallExpr
Summary:
When people are really sure they'll get the lock they sometimes use
__builtin_expect. It's also used by some assertion implementations.
Asserting that try-lock succeeded is basically the same as asserting
that the lock is not held by anyone else (and acquiring it).

Reviewers: aaron.ballman, delesley

Reviewed By: aaron.ballman

Subscribers: kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D52398

llvm-svn: 343681
2018-10-03 11:58:19 +00:00
Clement Courbet d5a39553ff [llvm-exegesis] Resolve variant classes in analysis.
Summary: See PR38884.

Reviewers: gchatelet

Subscribers: tschuett, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D52825

llvm-svn: 343680
2018-10-03 11:50:25 +00:00
Alex Bradbury d934032e48 [RISCV] Gate float<->int and double<->int conversion patterns on IsRV32
The patterns as defined are correct only when XLen==32.

This is another preparatory patch for a set of patches that flesh out RV64 
codegen.

llvm-svn: 343679
2018-10-03 11:35:22 +00:00
Alex Bradbury d464ed8c2e [RISCV] Remove XLenVT==i32 assumptions from RISCVInstrInfo td
1. brcond operates on an condition.
2. atomic_fence and the pseudo AMO instructions should all take xlen immediates 

This allows the same definitions and patterns to work for RV64 (XLenVT==i64).

llvm-svn: 343678
2018-10-03 11:14:26 +00:00
Alex Bradbury a9ac5994b1 [RISCV] Gate simm32 materialisation pattern and SW pattern on IsRV32
These patterns are not correct for RV64.

llvm-svn: 343677
2018-10-03 11:04:59 +00:00
Florian Hahn 11a1423348 [LoopInterchange] Remove unused variable PreserveLCSSA (NFC).
llvm-svn: 343676
2018-10-03 11:01:23 +00:00
Alex Bradbury efceb59801 [RISCV] Remove RV64 test lines from umulo-128-legalisation-lowering.ll
The generated code is incorrect anyway, and this test adds noise to the 
upcoming set of patches that flesh out RV64 support.

llvm-svn: 343675
2018-10-03 10:59:42 +00:00
Jonas Toth 602e3a640f [CodeGen] NFC fix pedantic warning from extra semicolon
llvm-svn: 343674
2018-10-03 10:59:19 +00:00
Jonas Toth fc07c3d910 [clang-tidy] NFC reorder registering in CppCoreGuidelines module
llvm-svn: 343673
2018-10-03 10:37:19 +00:00
Tim Renouf a37679d67b [AMDGPU] Fix for negative offsets in buffer/tbuffer intrinsics
Summary:
The new buffer/tbuffer intrinsics handle an out-of-range immediate
offset by moving/adding offset&-4096 to a vgpr, leaving an in-range
immediate offset, with a chance of the move/add being CSEd for similar
loads/stores.

However it turns out that a negative offset in a vgpr is illegal, even
if adding the immediate offset makes it legal again.

Therefore, this commit disables the offset&-4096 thing if the offset is
negative.

Differential Revision: https://reviews.llvm.org/D52683

Change-Id: Ie02f0a74f240a138dc2a29d17cfbd9e350e4ed13
llvm-svn: 343672
2018-10-03 10:29:43 +00:00
Simon Pilgrim c68cc4efbe [X86][Btver2] Most RMW instructions don't require an additional uop
Remove uop on WriteRMW and move it into the few instructions that need it.

Match AMD Fam16h SOG + llvm-exegesis tests

llvm-svn: 343671
2018-10-03 10:28:43 +00:00
Simon Pilgrim d11015861c [X86] ALU/ADC RMW instructions should use the WriteRMW sequence class
I was expecting this to be a nfc but Silvermont seems to be setup a little differently:

// A folded store needs a cycle on MEC_RSV for the store data, but it does not need an extra port cycle to recompute the address.
def : WriteRes<WriteRMW, [SLM_MEC_RSV]>;

So moving from WriteStore to WriteRMW reduces predicted port pressure, confirmed by @craig.topper that this is correct.

Differential Revision: https://reviews.llvm.org/D52740

llvm-svn: 343670
2018-10-03 10:01:13 +00:00
George Rimar db2e641fd7 [ELF] - Fix BB after r343668
This stops testing the value of .rela.plt section offset.

Also makes _start global to eliminate
'cannot find entry symbol _start' warning.

llvm-svn: 343669
2018-10-03 09:59:08 +00:00
George Rimar f79a8ef2ae [ELF] - Do not forget to include to .dymsym symbols that were converted to Defined.
This is the fix for
"Bug 39104 - LLD links incorrect ELF executable if version script contains "local: *;"
(https://bugs.llvm.org/show_bug.cgi?id=39104).

The issue happens when we have non-PIC program call to function in a shared library.
(for example, the PR above has R_X86_64_PC32 relocation against __libc_start_main)

LLD converts symbol to Defined in that case with the use of replaceWithDefined()

The issue is that after above we create a broken relocation because do not
include the symbol into .dynsym.

That happens when the version script is used because we treat the symbol as
STB_LOCAL if the following condition match:
VersionId == VER_NDX_LOCAL && isDefined() and do not include it to
.dynsym because of that. Patch fixes the issue.

Differential revision: https://reviews.llvm.org/D52724

llvm-svn: 343668
2018-10-03 09:33:00 +00:00
George Rimar 3832d7c25d [LLD] - Do not crash when reporting errors when .debug_line_str (DWARF5) is used
Imagine we have the following code:

int foo();
int main() { return foo(); }

It will crash if you try to compile it with
`clang -O0 -gdwarf-5 test.cpp -o test -g -fuse-ld=lld`

The crash happens inside the LLVM DWARF parser because LLD does not provide
the .debug_line_str section. At the same time for correct parsing and reporting,
we anyways need to provide this section from our side.

The patch fixes the issue.

llvm-svn: 343667
2018-10-03 08:59:46 +00:00
Stephen Kelly 2c4079c090 [clang-query] Add comment token handling
Summary:
It is possible to pass a file of commands to clang-query using the
command line option -f or --preload.  Make it possible to write comments
in such files.

Reviewers: aaron.ballman

Reviewed By: aaron.ballman

Subscribers: mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D52752

llvm-svn: 343666
2018-10-03 08:21:54 +00:00
Stephen Kelly 7c787b8adf Allow comments with '#' in dynamic AST Matchers
Summary: This is necessary for clang-query to be able to handle comments.

Reviewers: aaron.ballman

Reviewed By: aaron.ballman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D52751

llvm-svn: 343665
2018-10-03 07:56:43 +00:00
Stephen Kelly 42668a4d03 [clang-query] Add single-letter 'q' alias for 'quit'
Reviewers: aaron.ballman, pcc

Reviewed By: aaron.ballman

Subscribers: Szelethus, cfe-commits

Differential Revision: https://reviews.llvm.org/D52746

llvm-svn: 343664
2018-10-03 07:52:44 +00:00
Aditya Kumar a27014b851 Improve static analysis of cold basic blocks
Differential Revision: https://reviews.llvm.org/D52704

Reviewers: sebpop, tejohnson, brzycki, SirishP
Reviewed By: sebpop

llvm-svn: 343663
2018-10-03 06:21:05 +00:00
Aditya Kumar 9e20ade72a Add support for new pass manager
Modified the testcases to use both pass managers
Use single commandline flag for both pass managers.

Differential Revision: https://reviews.llvm.org/D52708
Reviewers: sebpop, tejohnson, brzycki, SirishP
Reviewed By: tejohnson, brzycki

llvm-svn: 343662
2018-10-03 05:55:20 +00:00
Mikael Holmen 101d9eae23 Fix compilation warning by removing unused variable [NFC]
clang complained with

../tools/clang/tools/extra/clangd/FS.cpp:19:12: error: unused variable 'Err' [-Werror,-Wunused-variable]
  if (auto Err = FS.makeAbsolute(PathStore))
           ^
1 error generated.

llvm-svn: 343661
2018-10-03 05:41:14 +00:00
Fangrui Song 65ebd13f41 [Frontend] Delete -print-decl-contexts
Summary: Its job is covered by -ast-dump. The option is rarely used and lacks many AST nodes which will lead to llvm_unreachable() crash.

Reviewers: rsmith, arphaman

Reviewed By: rsmith

Subscribers: jfb, cfe-commits

Differential Revision: https://reviews.llvm.org/D52529

llvm-svn: 343660
2018-10-03 03:50:44 +00:00
Fangrui Song 3d76d36059 [AMDGPU] Rename pass "isel" to "amdgpu-isel"
Summary: The AMDGPU target specific pass "isel" is a misleading name.

Reviewers: tstellar, echristo, javed.absar, arsenm

Reviewed By: arsenm

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D52759

llvm-svn: 343659
2018-10-03 03:38:22 +00:00
Daniel Sanders bad3936109 [globalisel] Fix one more missing Verifier pass from gisel-commandline-option.ll
llvm-svn: 343658
2018-10-03 02:52:54 +00:00
Matt Arsenault 635d479322 AMDGPU: Always run AMDGPUAlwaysInline
Even if calls are enabled, it still needs to be run
for forcing inline of functions that use LDS.

llvm-svn: 343657
2018-10-03 02:47:25 +00:00
Matt Arsenault 0f83d66ae7 Add atomicrmw operation to error messages
llvm-svn: 343656
2018-10-03 02:37:15 +00:00
Daniel Sanders 34eac35a60 Add the missing new files from r343654
llvm-svn: 343655
2018-10-03 02:21:30 +00:00
Daniel Sanders c973ad1878 Re-commit: [globalisel] Add a combiner helpers for extending loads and use them in a pre-legalize combiner for AArch64
Summary: Depends on D45541

Reviewers: ab, aditya_nandakumar, bogner, rtereshin, volkan, rovka, javed.absar, aemerson

Subscribers: aemerson, rengolin, mgorny, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45543

The previous commit failed portions of the test-suite on GreenDragon due to
duplicate COPY instructions and iterator invalidation. Both issues have now
been fixed. To assist with this, a helper (cloneVirtualRegister) has been added
to MachineRegisterInfo that can be used to get another register that has the same
type and class/bank as an existing one.

llvm-svn: 343654
2018-10-03 02:12:17 +00:00
Matt Arsenault a01151294a OpenCL: Mark printf format string argument
Fixes not warning on format string errors.

llvm-svn: 343653
2018-10-03 02:01:19 +00:00
Petr Hosek ed8311da5a [CMake][Fuchsia] Use libc++ ABIv2 for Fuchsia toolchain
We don't need to provide stable ABI and hence we can use the v2.

Differential Revision: https://reviews.llvm.org/D52660

llvm-svn: 343652
2018-10-03 01:27:00 +00:00
Kuba Mracek 2d8a66f8d3 Mark two tests, which require too much available VM, as "UNSUPPORTED: ios".
llvm-svn: 343650
2018-10-03 00:30:03 +00:00
Thomas Lively 9075cd607d [WebAssembly] any_true and all_true intrinsics and instructions
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52755

llvm-svn: 343649
2018-10-03 00:19:39 +00:00
Stanislav Mekhanoshin 1821513e2f [AMDGPU] Assert in getOpSize() there are no sub-dword subregs
Differential Revision: https://reviews.llvm.org/D52769

llvm-svn: 343648
2018-10-03 00:00:41 +00:00
Matt Arsenault b02ba99e91 IR: Move AtomicRMW string names into class
This will be used to improve error messages in a future commit.

llvm-svn: 343647
2018-10-02 23:44:11 +00:00
Sanjay Patel abcacf9753 [InstCombine] add icmp+logic tests with commuted ops; NFC
The transform in question is located in foldICmpAndConstConst(),
but as shown here, it doesn't work if operands are commuted.

llvm-svn: 343646
2018-10-02 22:53:37 +00:00