c57819d4a3
commuteInstruction should propagate kill / dead info.
...
llvm-svn: 31763
2006-11-15 20:56:03 +00:00
0ffff1c629
Match live variable changes.
...
llvm-svn: 31762
2006-11-15 20:55:15 +00:00
ebb0357b4c
Minor updates.
...
llvm-svn: 31761
2006-11-15 20:54:29 +00:00
12ea213de9
A register def can be partially dead when the whole register has use(s) but a subreg does not.
...
llvm-svn: 31760
2006-11-15 20:54:11 +00:00
70ec52896e
Do away with kill / dead maps. Move kill / dead info onto MI's.
...
llvm-svn: 31759
2006-11-15 20:51:59 +00:00
474b5b7c95
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
...
addrmodes.
llvm-svn: 31757
2006-11-15 19:55:13 +00:00
9f3083eef0
Add run(Function &F) support in FunctionPassManager_New
...
llvm-svn: 31756
2006-11-15 19:39:54 +00:00
2775aba51d
Simplify IntrinsicLowering and clarify that it is only for use by the
...
CBE and interpreter.
llvm-svn: 31755
2006-11-15 18:00:10 +00:00
60c2a0154a
Remove unneeded forward decls
...
llvm-svn: 31754
2006-11-15 17:53:13 +00:00
30d08801ef
remove dead #include
...
llvm-svn: 31753
2006-11-15 17:51:15 +00:00
0e117c7e9d
Fix the PPC regressions last night
...
llvm-svn: 31752
2006-11-15 17:40:51 +00:00
e3a63d136d
Fix a gcc 4.2 warning.
...
llvm-svn: 31751
2006-11-15 04:53:24 +00:00
1396961e85
Switch loads over to use memri as the operand instead of a reg/imm operand
...
pair for cleanliness. Add instructions for PPC32 preinc-stores with commented
out patterns. More improvement is needed to enable the patterns, but we're
getting close.
llvm-svn: 31749
2006-11-15 02:43:19 +00:00
4a3fa4ff26
Tidy up marking of last analysis user pass.
...
llvm-svn: 31746
2006-11-15 01:48:14 +00:00
ff631ae600
Add doInitialization and doFinalization support in FunctionManager_New.
...
llvm-svn: 31745
2006-11-15 01:27:05 +00:00
42add710fa
Do not derive CommonPassManagerImpl from Pass.
...
Now BasicBlockPassManager_New is a FunctionPass,
FunctionPassManager_New is a ModulePass
llvm-svn: 31744
2006-11-15 01:11:27 +00:00
07f4f58945
Copy initializeAnalysisImpl() implementation from PassManagerT.
...
Update LastUser to recursively walk required transitive set.
llvm-svn: 31741
2006-11-14 21:49:36 +00:00
cf772f7eca
Revert. This wasn't meant to be checked in.
...
llvm-svn: 31737
2006-11-14 19:20:33 +00:00
e79a451475
group load and store instructions together. No functionality change.
...
llvm-svn: 31736
2006-11-14 19:19:53 +00:00
58e8bed48e
Fix predicates for unindexed stores so they don't accidentally match indexed
...
stores.
llvm-svn: 31735
2006-11-14 19:13:39 +00:00
44dbdbe5cf
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
...
clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
llvm-svn: 31734
2006-11-14 18:44:47 +00:00
b542925b22
remove a ton of custom selection logic no longer needed
...
llvm-svn: 31733
2006-11-14 18:43:11 +00:00
4916acbd0f
it would be nice of ctlz were lowered to bsf etc.
...
llvm-svn: 31730
2006-11-14 08:08:46 +00:00
f05d69ae72
implement InstCombine/shift-simplify.ll by transforming:
...
(X >> Z) op (Y >> Z) -> (X op Y) >> Z
for all shifts and all ops={and/or/xor}.
llvm-svn: 31729
2006-11-14 07:46:50 +00:00
d12a4bf799
implement InstCombine/and-compare.ll:test1. This compiles:
...
typedef struct { unsigned prefix : 4; unsigned code : 4; unsigned unsigned_p : 4; } tree_common;
int foo(tree_common *a, tree_common *b) { return a->code == b->code; }
into:
_foo:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl (%eax), %eax
xorl (%ecx), %eax
# TRUNCATE movb %al, %al
shrb $4, %al
testb %al, %al
sete %al
movzbl %al, %eax
ret
instead of:
_foo:
movl 8(%esp), %eax
movb (%eax), %al
shrb $4, %al
movl 4(%esp), %ecx
movb (%ecx), %cl
shrb $4, %cl
cmpb %al, %cl
sete %al
movzbl %al, %eax
ret
saving one cycle by eliminating a shift.
llvm-svn: 31727
2006-11-14 06:06:06 +00:00
97ff46b3cc
lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of
...
'(shr (ctlz (sub Y, Z)), 5)'.
The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner. For example, this:
typedef struct {
unsigned prefix : 4;
unsigned code : 4;
unsigned unsigned_p : 4;
} tree_common;
int foo(tree_common *a, tree_common *b) {
return a->code == b->code;
}
Now compiles to:
_foo:
lwz r2, 0(r4)
lwz r3, 0(r3)
xor r2, r3, r2
rlwinm r2, r2, 28, 28, 31
cntlzw r2, r2
srwi r3, r2, 5
blr
instead of:
_foo:
lbz r2, 3(r4)
lbz r3, 3(r3)
srwi r2, r2, 4
srwi r3, r3, 4
subf r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
saving a cycle.
llvm-svn: 31725
2006-11-14 05:28:08 +00:00
0ad1e3845b
A shim over other AA impls to catch incorrect uses
...
llvm-svn: 31724
2006-11-14 05:21:04 +00:00
1b89a7bcc1
Discard code that supported old bytecode formats. This makes the Bytecode
...
Reader code much easier to read and maintain. Backwards compatibility from
version 5 format has been retained. Older formats will produce an error.
llvm-svn: 31723
2006-11-14 04:47:22 +00:00
ca1892699c
Implement removeDeadPasses().
...
llvm-svn: 31722
2006-11-14 03:05:08 +00:00
3f0832a3b5
Keep track of Last user of analysis phase.
...
llvm-svn: 31721
2006-11-14 02:54:23 +00:00
f60b5d9676
Use std::map to map AnalysisID and Pass.
...
llvm-svn: 31720
2006-11-14 01:59:59 +00:00
6dc22332bf
add a note
...
llvm-svn: 31719
2006-11-14 01:57:53 +00:00
683712583a
minor tweaks, reject vector preinc.
...
llvm-svn: 31717
2006-11-14 01:38:31 +00:00
050ec72ae4
Manage analysis passes during run.
...
llvm-svn: 31716
2006-11-14 01:23:29 +00:00
dafa4ddc46
Update comments.
...
llvm-svn: 31713
2006-11-14 00:03:04 +00:00
dbd3d294e6
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
77af6ac5e8
- Let MachineInstr ctors add implicit def and use operands. Other operands
...
will be inserted before these operands. If the opcode changes (by
setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
that move kill / dead info to MachineInstr's.
llvm-svn: 31711
2006-11-13 23:34:06 +00:00
7086844634
Update PassManagerImpl_New::analysisCurrentlyAvailable to check all
...
managed passmanagers.
llvm-svn: 31710
2006-11-13 22:53:19 +00:00
ebba970a6d
Check currently available anlysis in active managers.
...
llvm-svn: 31709
2006-11-13 22:40:09 +00:00
1121e50f7e
teach the g5 hazard recognizer about update loads. This fixes
...
Ptrdist/anagram among others.
llvm-svn: 31708
2006-11-13 20:11:06 +00:00
5c833df633
remove redundant code
...
llvm-svn: 31697
2006-11-13 01:10:12 +00:00
0df2ada9d4
Cute example from Chris Lattner.
...
llvm-svn: 31696
2006-11-13 00:23:28 +00:00
ad75361d42
Initialize some pointers to quiet the compiler (when doing build_gcc
...
builds).
llvm-svn: 31694
2006-11-12 11:10:39 +00:00
1dfc6110ff
Make sure stack link is set in 64-bit.
...
llvm-svn: 31690
2006-11-11 22:22:07 +00:00
06d8e0fa3b
Remvoe a do-nothing else block.
...
llvm-svn: 31687
2006-11-11 20:27:49 +00:00
2230144a75
Make an assert comment match the tested assertion.
...
llvm-svn: 31686
2006-11-11 20:07:59 +00:00
0d550cc56c
implement proper PPC64 prolog/epilog codegen.
...
llvm-svn: 31684
2006-11-11 19:05:28 +00:00
75db664f44
For PR998:
...
Fix an infinite loop in the Linker and a few other assorted link problems.
Patch contributed by Scott Michel. Thanks, Scott!
llvm-svn: 31680
2006-11-11 11:54:25 +00:00
66c502b54a
Running with frame pointers prevented debugging, external probes and
...
potentially some system calls/exception handling from working. TOS must always
link to previous frame. This is a short term workaround until alloca scheme is
reworked.
llvm-svn: 31677
2006-11-11 10:21:58 +00:00
db04c958a5
Add implicit use / def operands to created MI's.
...
llvm-svn: 31676
2006-11-11 10:21:44 +00:00
979bbf48d5
Add methods to add implicit def use operands to a MI.
...
llvm-svn: 31675
2006-11-11 10:20:02 +00:00
a36cdcfaf8
Add all implicit defs to FP_REG_KILL mi.
...
llvm-svn: 31674
2006-11-11 07:19:36 +00:00
c5102bfc7c
allow the offset of a preinc'd load to be the low-part of a global. This
...
produces this clever code:
_millisecs:
lis r2, ha16(_Time.1182)
lwzu r3, lo16(_Time.1182)(r2)
lwz r2, 4(r2)
addic r4, r2, 1
addze r3, r3
blr
instead of this:
_millisecs:
lis r2, ha16(_Time.1182)
la r3, lo16(_Time.1182)(r2)
lwz r2, lo16(_Time.1182)(r2)
lwz r3, 4(r3)
addic r4, r3, 1
addze r3, r2
blr
for:
long %millisecs() {
%tmp = load long* %Time.1182 ; <long> [#uses=1]
%tmp1 = add long %tmp, 1 ; <long> [#uses=1]
ret long %tmp1
}
llvm-svn: 31673
2006-11-11 04:53:30 +00:00
2ff632c54b
Mark operands as symbol lo instead of imm32 so that they print lo(x) around
...
globals.
llvm-svn: 31672
2006-11-11 04:51:36 +00:00
1a6eaa49fe
Implement schedulePasses().
...
llvm-svn: 31671
2006-11-11 02:22:31 +00:00
db789fb8f2
Implement PassManagerImpl_New::add().
...
Just add pass into the pass manager queue without processing analysis.
llvm-svn: 31670
2006-11-11 02:06:21 +00:00
90b05e0bc3
While adding pass into the manager, process Analysis only if it is
...
required to do so.
llvm-svn: 31669
2006-11-11 02:04:19 +00:00
2efbad4a72
Remove dead code.
...
llvm-svn: 31668
2006-11-11 01:56:39 +00:00
8cad70de14
Code refactoring. Move common code into CommonPassManagerImpl :)
...
llvm-svn: 31667
2006-11-11 01:51:02 +00:00
a98445962d
Move CommonPassManagerImpl from PassManager.h to PassManager.cpp
...
llvm-svn: 31666
2006-11-11 01:31:05 +00:00
349170f5da
Remove analysis that is not preserved by the pass from AvailableAnalysis.
...
llvm-svn: 31665
2006-11-11 01:24:55 +00:00
643676c1f5
Keep track if analysis made available by the pass.
...
llvm-svn: 31664
2006-11-11 01:10:19 +00:00
a0a8003f59
disallow preinc of a frameindex. This is not profitable and causes 2-addr
...
pass to explode. This fixes a bunch of llc-beta failures on ppc last night.
llvm-svn: 31661
2006-11-11 01:00:15 +00:00
eabc15c1d8
reduce indentation by using early exits. No functionality change.
...
llvm-svn: 31660
2006-11-11 00:56:29 +00:00
6c9f548704
Keep track of analysis required by the passes. Force use of new pass
...
manager if a pass does not preserve analysis that is used by other
passes.
llvm-svn: 31659
2006-11-11 00:42:16 +00:00
ffad2166e1
move big chunks of code out-of-line, no functionality change.
...
llvm-svn: 31658
2006-11-11 00:39:41 +00:00
b314b155ed
ppc64 doesn't have lwau, don't attempt to form it.
...
llvm-svn: 31656
2006-11-11 00:08:42 +00:00
c9fa36d706
implement preinc support for r+i loads on ppc64
...
llvm-svn: 31654
2006-11-10 23:58:45 +00:00
d4dee405cb
Fix InstCombine/2006-11-10-ashr-miscompile.ll a miscompilation introduced
...
by the shr -> [al]shr patch. This was reduced from 176.gcc.
llvm-svn: 31653
2006-11-10 23:38:52 +00:00
915026cdc3
Add a note.
...
llvm-svn: 31650
2006-11-10 22:09:17 +00:00
5b725a71a9
These are done.
...
llvm-svn: 31649
2006-11-10 22:03:35 +00:00
49683ba236
Don't dag combine floating point select to max and min intrinsics. Those
...
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.
This fixes PR996.
llvm-svn: 31645
2006-11-10 21:43:37 +00:00
4eac5f59e6
Fix a dag combiner bug exposed by my recent instcombine patch. This fixes
...
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast
llvm-svn: 31644
2006-11-10 21:37:15 +00:00
0ed477969f
s/PassManagerAnalysisHelper/CommonPassManagerImpl
...
Inherit CommonPassManagerImpl from Pass.
llvm-svn: 31642
2006-11-10 21:33:13 +00:00
fb44822a98
Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a
...
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.
llvm-svn: 31641
2006-11-10 21:23:04 +00:00
6c8656a6b1
dform 8/9 are identical to dform 1
...
llvm-svn: 31637
2006-11-10 17:51:02 +00:00
286357480c
Fix a potential bug.
...
llvm-svn: 31634
2006-11-10 09:13:37 +00:00
8c9c6d71ed
Add implicit def / use operands to MachineInstr.
...
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
13440b025c
When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle.
...
llvm-svn: 31631
2006-11-10 08:28:11 +00:00
d5e604dbb2
commentate
...
llvm-svn: 31627
2006-11-10 04:41:34 +00:00
ce6455489a
add an initial cut at preinc loads for ppc32. This is broken for ppc64
...
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)
This is disabled unless -enable-ppc-preinc is passed to llc for now.
llvm-svn: 31621
2006-11-10 02:08:47 +00:00
cd436327f1
add note about ugly codegen with preinc
...
llvm-svn: 31617
2006-11-10 01:33:53 +00:00
14140059f0
Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
...
llvm-svn: 31616
2006-11-10 01:28:43 +00:00
b9c91c265c
Fixing PR990: http://llvm.org/PR990 .
...
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).
llvm-svn: 31613
2006-11-10 00:48:11 +00:00
4e03cb1945
add a note about viterbi
...
llvm-svn: 31612
2006-11-10 00:23:26 +00:00
82928ca290
second patch to fix PR992/993.
...
llvm-svn: 31610
2006-11-09 23:36:08 +00:00
924f4fee8b
Minimal patch to fix PR992/PR993
...
llvm-svn: 31608
2006-11-09 23:17:45 +00:00
5fdbe55979
if lazy compilation is disabled, print an error message and abort if
...
lazy compilation is ever attempted
llvm-svn: 31602
2006-11-09 19:32:13 +00:00
87aee74ccb
init ivar
...
llvm-svn: 31601
2006-11-09 19:31:15 +00:00
36a8fbf771
PPC supports i32 / i64 pre-inc load / store.
...
llvm-svn: 31599
2006-11-09 19:11:50 +00:00
6878378390
Don't attempt expensive pre-/post- indexed dag combine if target does not support them.
...
llvm-svn: 31598
2006-11-09 19:10:46 +00:00
d550248f2c
Add a mechanism to specify whether a target supports a particular indexed load / store.
...
llvm-svn: 31597
2006-11-09 18:56:43 +00:00
c034f14fbe
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31596
2006-11-09 18:44:21 +00:00
b15000736c
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31595
2006-11-09 17:55:04 +00:00
f1606b80f1
Allows debugging llc self hosted.
...
llvm-svn: 31594
2006-11-09 16:32:26 +00:00
97f89b11b3
Merging dwarf info to a single compile unit.
...
llvm-svn: 31593
2006-11-09 14:52:14 +00:00
5f7ab1b964
implement load effective address similar to the alpha backend
...
remove lea_addri and the now unused memri addressing mode
llvm-svn: 31592
2006-11-09 13:58:55 +00:00
1b9633d7f0
silence warnings
...
llvm-svn: 31587
2006-11-09 05:18:12 +00:00
6e2c15c158
Teach ShrinkDemandedConstant how to handle X+C. This implements:
...
add.ll:test33, add.ll:test34, shift-sra.ll:test2
llvm-svn: 31586
2006-11-09 05:12:27 +00:00
b58e06bc9e
getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT.
...
llvm-svn: 31584
2006-11-09 04:29:46 +00:00
Evan Cheng