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9 Commits

Author SHA1 Message Date
Jack Carter a16fa808d3 Mips specific inline asm memory operand modifier test case 
These changes are based on commit responses for r179135.

llvm-svn: 179315
 2013-04-11 19:39:19 +00:00
Jack Carter b6bcdfd23d Mips specific inline asm memory operand modifier test case 
These changes are based on commit responses for r179135.

llvm-svn: 179225
 2013-04-10 22:02:32 +00:00
Jack Carter b04e357d9b Mips specific inline asm operand modifier 'D' 
Modifier 'D' is to use the second word of a double integer.

We had previously implemented the pure register varient of 
the modifier and this patch implements the memory reference.



#include "stdio.h"

int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
    int i;
    
    // The first word. Notice, no 'D'
    {asm (
    "lw    %0,%1;"
    : "=r" (i)
    : "m" (*(b+4))
    );}
    
    printf("%d\n",i);

    // The second word
    {asm (
    "lw    %0,%D1;"
    : "=r" (i)
    : "m" (*(b+4))
    );}
    
    printf("%d\n",i);
}

llvm-svn: 179135
 2013-04-09 23:19:50 +00:00
Akira Hatanaka 763ab85690 Fix test cases. 
llvm-svn: 156697
 2012-05-12 03:25:16 +00:00
Dan Gohman c32af340fc Change the default scheduler from Latency to ILP, since Latency 
is going away.

llvm-svn: 142810
 2011-10-24 17:45:02 +00:00
Akira Hatanaka 5624707684 Fix test cases. 
Generate code for Mips32r1 unless a Mips32r2 feature is tested.

llvm-svn: 139433
 2011-09-09 23:14:58 +00:00
Akira Hatanaka 4c406e7457 Re-apply 132758 and 132768 which were speculatively reverted in 132777. 
llvm-svn: 133494
 2011-06-21 00:40:49 +00:00
Eric Christopher f15601f19a Speculatively revert 132758 and 132768 to try to fix the Windows buildbots. 
llvm-svn: 132777
 2011-06-09 16:03:19 +00:00
Akira Hatanaka 0683a7212e Initial support for inline asm memory operand constraints. 
llvm-svn: 132768
 2011-06-09 03:31:05 +00:00