bfc9061593
This patch is a result of D37262: The issues with X86 prefixes. It closes PR7709, PR17697, PR19251, PR32809 and PR21640. There could be other bugs closed by this patch.
...
llvm-svn: 315899
2017-10-16 11:14:29 +00:00
836c50cc2f
[X86][AsmParser] fix PR32035
...
Differential Revision: https://reviews.llvm.org/D37473
llvm-svn: 314295
2017-09-27 10:29:29 +00:00
c54c5cbe67
[X86] Allow xacquire/xrelease prefixes
...
Allow those prefixes on assembly code
Differential Revision: https://reviews.llvm.org/D36845
llvm-svn: 311309
2017-08-21 07:50:15 +00:00
8601ac11aa
[MC] Fix Intel Operand assembly parsing for .set ids
...
Recommitting after fixing overaggressive fastpath return in parsing.
Fix intel syntax special case identifier operands that refer to a constant
(e.g. .set <ID> n) to be interpreted as immediate not memory in parsing.
Associated commit to fix clang test commited shortly.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22585
llvm-svn: 277489
2016-08-02 17:56:03 +00:00
7a3a49b18a
Revert r276895 "[MC][X86] Fix Intel Operand assembly parsing for .set ids"
...
This caused PR28805. Adding a regression test.
llvm-svn: 277402
2016-08-01 23:00:01 +00:00
06a99a46e2
[MC][X86] Fix Intel Operand assembly parsing for .set ids
...
Fix intel syntax special case identifier operands that refer to a constant
(e.g. .set <ID> n) to be interpreted as immediate not memory in parsing.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22585
llvm-svn: 276895
2016-07-27 17:39:41 +00:00
0498b88d48
Post process ADC/SBB and use a shorter encoding if they use a sign extended immediate.
...
llvm-svn: 177243
2013-03-18 03:34:55 +00:00
7e9a1cb199
Refactor some duplicated code into helper functions.
...
llvm-svn: 177242
2013-03-18 02:53:34 +00:00
74c282b5ef
Add retw and lretw instructions. Also, fix Intel syntax parsing for all
...
ret instructions.
llvm-svn: 154468
2012-04-11 01:10:53 +00:00
7cdb2ff6b5
Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,sd,ps,pd}, for intel syntax.
...
llvm-svn: 149291
2012-01-30 22:47:12 +00:00
a410ed3ced
Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax.
...
llvm-svn: 148864
2012-01-24 21:43:36 +00:00
d0930fff85
Intel syntax: Parse ... PTR [-8]
...
llvm-svn: 148570
2012-01-20 21:21:01 +00:00
f36613cb45
Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.
...
llvm-svn: 148569
2012-01-20 21:14:06 +00:00
f83dcfd052
Post process 'and', 'sub' instructions and select better encoding, if available.
...
llvm-svn: 148489
2012-01-19 18:40:55 +00:00
2529dd9e00
Intel syntax: There is no need to create unary expr for simple negative displacement.
...
llvm-svn: 148486
2012-01-19 18:15:51 +00:00
4a62ff9bcb
Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available.
...
llvm-svn: 148485
2012-01-19 17:53:25 +00:00
Andrew V. Tischenko