Commit Graph

70554 Commits

Author SHA1 Message Date
Che-Liang Chiou 58bae0e957 ptx: add basic support of predicate execution
llvm-svn: 127569
2011-03-13 17:26:00 +00:00
Jin-Gu Kang b7538c71e1 Add comment as following:
load and store reference same memory location, the memory location
is represented by getelementptr with two uses (load and store) and
the getelementptr's base is alloca with single use. At this point,
instructions from alloca to store can be removed.
(this pattern is generated when bitfield is accessed.)
For example,
%u = alloca %struct.test, align 4               ; [#uses=1]
%0 = getelementptr inbounds %struct.test* %u, i32 0, i32 0;[#uses=2]
%1 = load i8* %0, align 4                       ; [#uses=1]
%2 = and i8 %1, -16                             ; [#uses=1]
%3 = or i8 %2, 5                                ; [#uses=1]
store i8 %3, i8* %0, align 4

llvm-svn: 127565
2011-03-13 14:05:51 +00:00
Oscar Fuentes ac824ee462 LTO is not ready for Windows.
llvm-svn: 127562
2011-03-13 03:06:59 +00:00
Jakob Stoklund Olesen e1539cc5b6 Now that we are deleting unused live intervals during allocation, pointers may be reused.
Use the virtual register number as a cache tag instead. They are not reused.

llvm-svn: 127561
2011-03-13 01:29:32 +00:00
Jakob Stoklund Olesen 43a87501b3 Tell the register allocator about new unused virtual registers.
This allows the allocator to free any resources used by the virtual register,
including physical register assignments.

llvm-svn: 127560
2011-03-13 01:23:11 +00:00
Oscar Fuentes 3685f2762b Build EnhancedDisassembly as a shared library too.
llvm-svn: 127555
2011-03-12 22:01:47 +00:00
Oscar Fuentes dc352c4c04 Build CompilerDriver library.
llvm-svn: 127554
2011-03-12 22:01:42 +00:00
Oscar Fuentes 02c446a73a Build LTO as a static library too.
llvm-svn: 127553
2011-03-12 22:01:36 +00:00
Oscar Fuentes 68c1f55fdc Build LTO as a static library too.
llvm-svn: 127549
2011-03-12 17:32:30 +00:00
Benjamin Kramer 5acc751b6f Teach ComputeMaskedBits about sub nsw.
llvm-svn: 127548
2011-03-12 17:18:11 +00:00
Oscar Fuentes cc48b9ac0f Whe we build a shared library, add its list of used libraries to the
link command.

Fixed a pair of IF expressions too.

llvm-svn: 127546
2011-03-12 16:48:54 +00:00
Oscar Fuentes 1fc0c8ab78 Update link components for llvm-dis and LTO.
llvm-svn: 127545
2011-03-12 16:48:49 +00:00
Duncan Sands b847bf547b Speculatively revert commit 127478 (jsjodin) in an attempt to fix the
llvm-gcc-i386-linux-selfhost and llvm-x86_64-linux-checks buildbots.
The original log entry:
Remove optimization emitting a reference insted of label difference, since
it can create more relocations. Removed isBaseAddressKnownZero method,
because it is no longer used.

llvm-svn: 127540
2011-03-12 13:07:37 +00:00
Jin-Gu Kang 2e939f7c3c This patch removes some of useless instructions generated by bitfield access.
llvm-svn: 127539
2011-03-12 12:18:44 +00:00
Jakob Stoklund Olesen e77005ef88 Include snippets in the live stack interval.
llvm-svn: 127530
2011-03-12 04:25:36 +00:00
Jakob Stoklund Olesen a86595e06b Spill multiple registers at once.
Live range splitting can create a number of small live ranges containing only a
single real use. Spill these small live ranges along with the large range they
are connected to with copies. This enables memory operand folding and maximizes
the spill to fill distance.

Work in progress with known bugs.

llvm-svn: 127529
2011-03-12 04:17:20 +00:00
Sean Callanan 47f660aeaf Fixed the comparison operator for the enhanced
disassembler's disassembler map.

llvm-svn: 127527
2011-03-12 03:27:54 +00:00
Jakob Stoklund Olesen dae1dc1f01 That's it, I am declaring this a failure of the C++03 STL.
There are too many compatibility problems with using mixed types in
std::upper_bound, and I don't want to spend 110 lines of boilerplate setting up
a call to a 10-line function. Binary search is not /that/ hard to implement
correctly.

I tried terminating the binary search with a linear search, but that actually
made the algorithm slower against my expectation. Most live intervals have less
than 4 segments. The early test against endIndex() does pay, and this version is
25% faster than plain std::upper_bound().

llvm-svn: 127522
2011-03-12 01:50:35 +00:00
Eric Christopher c313d94068 Saving files before committing is overrated.
Add a RUN line to this test.

llvm-svn: 127520
2011-03-12 01:36:23 +00:00
Eric Christopher 174d872702 Sometimes isPredicable lies to us and tells us we don't need the operands.
Go ahead and add them on when we might want to use them and let
later passes remove them.

Fixes rdar://9118569

llvm-svn: 127518
2011-03-12 01:09:29 +00:00
Jim Grosbach fcc34cacd9 Remove no-longer-correct special case for disasm of ARM BL instructions.
llvm-svn: 127517
2011-03-12 01:05:29 +00:00
Jim Grosbach 965fe994c2 Add FIXME.
llvm-svn: 127516
2011-03-12 00:51:00 +00:00
Jim Grosbach 3f2096eafe Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the same
actual instruction as the non-Darwin defs, but have different call-clobber
semantics and so need separate patterns. They don't need to duplicate the
encoding information, however.

llvm-svn: 127515
2011-03-12 00:45:26 +00:00
Jim Grosbach b7c6e8f575 Add a FIXME.
llvm-svn: 127511
2011-03-11 23:25:21 +00:00
Jim Grosbach f026d9ed53 Pseudo-ize the ARM 'B' instruction.
llvm-svn: 127510
2011-03-11 23:24:15 +00:00
Jim Grosbach 2fee5327aa Remove dead code. These ARM instruction definitions no longer exist.
llvm-svn: 127509
2011-03-11 23:15:02 +00:00
Jim Grosbach 376d5e8772 Remove dead code. These ARM instruction definitions no longer exist.
llvm-svn: 127508
2011-03-11 23:11:41 +00:00
Jim Grosbach bb0547d9c4 Pseudo-ize VMOVDcc and VMOVScc.
llvm-svn: 127506
2011-03-11 23:09:50 +00:00
Jim Grosbach 9f2b3b569b 80 columns
llvm-svn: 127505
2011-03-11 23:00:16 +00:00
Jim Grosbach 6d371ce37e Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-
effect that we get proper instruction printing using the "pop" mnemonic for it.

llvm-svn: 127502
2011-03-11 22:51:41 +00:00
Cameron Zwarich 338d362200 Roll r127459 back in:
Optimize trivial branches in CodeGenPrepare, which often get created from the
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.

This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.

llvm-svn: 127498
2011-03-11 21:52:04 +00:00
Cameron Zwarich 4d7d728594 Fix the GCC test suite issue exposed by r127477, which was caused by stack
protector insertion not working correctly with unreachable code. Since that
revision was rolled out, this test doesn't actual fail before this fix.

llvm-svn: 127497
2011-03-11 21:51:56 +00:00
Owen Anderson 66443c034d Teach FastISel to support register-immediate-immediate instructions.
llvm-svn: 127496
2011-03-11 21:33:55 +00:00
Jim Grosbach ec62d28ae1 80 columns.
llvm-svn: 127495
2011-03-11 21:02:27 +00:00
Jim Grosbach d767d06b26 Trailing whitespace.
llvm-svn: 127493
2011-03-11 20:59:19 +00:00
Jim Grosbach 52594d99e4 Remove dead code. These ARM instruction definitions don't exist.
llvm-svn: 127491
2011-03-11 20:51:07 +00:00
Jim Grosbach 59eea670f8 ARM VDUPfd and VDUPfq can just be patterns. The instruction is the same
as for VDUP32d and VDUP32q, respectively.

llvm-svn: 127489
2011-03-11 20:44:08 +00:00
Jim Grosbach 6c609d626f Remove dead code. These ARM instruction definitions don't exist.
llvm-svn: 127488
2011-03-11 20:38:18 +00:00
Jim Grosbach c77dea7f55 ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q
and VDUPLN32d, respectively.

llvm-svn: 127486
2011-03-11 20:31:17 +00:00
Jim Grosbach 24fe5e36ea ARM VREV64df and VREV64qf can just be patterns. The instruction is the same
as for VREV64d32 and VREV64q32, respectively.

llvm-svn: 127485
2011-03-11 20:18:05 +00:00
Jim Grosbach 0b5119315b This FIXME has been fixed.
llvm-svn: 127483
2011-03-11 20:07:37 +00:00
Jim Grosbach fa56bca781 Properly pseudo-ize ARM MVNCCi.
llvm-svn: 127482
2011-03-11 19:55:55 +00:00
Jim Grosbach 730e1c2c9e Add missing 'return on failure'. Previously we'd crash after emitting
the diagnostic.

llvm-svn: 127480
2011-03-11 19:52:52 +00:00
Jan Sjödin f3f78583f9 Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used.
llvm-svn: 127478
2011-03-11 19:37:02 +00:00
Daniel Dunbar 94ccb27b43 Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get
created from the", it broke some GCC test suite tests.

llvm-svn: 127477
2011-03-11 19:30:30 +00:00
Oscar Fuentes 0122841626 Force re-linking of LLVMgold.so when its exports file changes.
llvm-svn: 127473
2011-03-11 18:27:13 +00:00
Oscar Fuentes 87e4a4da0d Fix processing of gold.exports.
llvm-svn: 127471
2011-03-11 18:07:46 +00:00
Devang Patel 982efb5c89 While printing annotations, print line number and variable name if debug info is present.
llvm-svn: 127470
2011-03-11 18:07:33 +00:00
Jim Grosbach f541bfd7d4 Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4).
llvm-svn: 127469
2011-03-11 18:00:42 +00:00
Andrew Trick 710d5da306 Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text.
llvm-svn: 127468
2011-03-11 17:46:59 +00:00