Commit Graph

103670 Commits

Author SHA1 Message Date
Benjamin Kramer f3ad23551d SDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bswap not.
- On ARM/ARM64 we get a vrev because the shuffle matching code is really smart. We still unroll anything that's not v4i32 though.
- On X86 we get a pshufb with SSSE3. Required more cleverness in isShuffleMaskLegal.
- On PPC we get a vperm for v8i16 and v4i32. v2i64 is unrolled.

llvm-svn: 209123
2014-05-19 13:12:38 +00:00
Dinesh Dwivedi f82f16e3e6 Added inst-combine for 'MIN(MIN(A, 97), 23)' and 'MAX(MAX(A, 23), 97)'
This removes TODO added in r208849 [http://reviews.llvm.org/D3629]

MIN(MIN(A, 97), 23) -> MIN(A, 23)
MAX(MAX(A, 23), 97) -> MAX(A, 97)

Differential Revision: http://reviews.llvm.org/D3785

llvm-svn: 209110
2014-05-19 07:08:32 +00:00
Filipe Cabecinhas cc8c96c133 Change the blend tests to AVX, not AVX2.
llvm-svn: 209107
2014-05-19 04:47:12 +00:00
NAKAMURA Takumi 2fd026207f Reformat blank lines.
llvm-svn: 209106
2014-05-19 04:43:26 +00:00
NAKAMURA Takumi ef4f6a8f9a Whitespace.
llvm-svn: 209105
2014-05-19 04:43:03 +00:00
Craig Topper b816593cf0 Remove last uses of OwningPtr from llvm. As far as I can tell these method versions are not used by lldb, lld, or clang.
llvm-svn: 209103
2014-05-18 21:55:38 +00:00
Craig Topper b85bc4e2df Use std::unique_ptr instead of OwningPtr in the MemoryBuffer unittests.
llvm-svn: 209102
2014-05-18 21:01:46 +00:00
Saleem Abdulrasool 8bfb192ecd ARM: make libcall setup more table driven
Rather than create a series of function calls to setup the library calls, create
a table with the information and just use the table to drive the configuration
of the library calls.  This makes it easier to both inspect the list as well as
to modify it.  NFC.

llvm-svn: 209089
2014-05-18 16:39:11 +00:00
Benjamin Kramer f9d2d512c7 Options: Use erase_if to remove Args from the list.
While there make getOption return a const reference so we don't have to put it
on the stack when calling methods on it. No functionality change.

llvm-svn: 209088
2014-05-18 15:14:13 +00:00
Saleem Abdulrasool a521845381 ARM: improve WoA ABI conformance for frame register
Windows on ARM uses R11 for the frame pointer even though the environment is a
pure Thumb-2, thumb-only environment.  Replicate this behaviour to improve
Windows ABI compatibility.  This register is used for fast stack walking, and
thus is part of the Windows ABI.

llvm-svn: 209085
2014-05-18 04:12:52 +00:00
Saleem Abdulrasool f11f4b4e20 ARM: consolidate frame pointer register knowledge
Use the ARMBaseRegisterInfo to query the frame register.  The base register info
is aware of the frame register that is used for the frame pointer.  Use that to
determine the frame register rather than duplicating the knowledge.  Although,
the code path is slightly different in that it may return SP, that can only
occur if the frame pointer has been omitted in the machine function, which is
supposed to contain the desired value in that case.

llvm-svn: 209084
2014-05-18 03:18:09 +00:00
Saleem Abdulrasool f3a5a5c546 Target: remove old constructors for CallLoweringInfo
This is mostly a mechanical change changing all the call sites to the newer
chained-function construction pattern.  This removes the horrible 15-parameter
constructor for the CallLoweringInfo in favour of setting properties of the call
via chained functions.  No functional change beyond the removal of the old
constructors are intended.

llvm-svn: 209082
2014-05-17 21:50:17 +00:00
Saleem Abdulrasool 3f75acfbc7 Target: add support to build CallLoweringInfo
Rather than introducing an auxiliary CallLoweringInfoBuilder, add the methods to
do chained function construction directly to CallLoweringInfo.  This reduces the
monstrous 15-parameter constructor into a series of simpler (for some definition
of simpler) functions that control particular aspects of the call.  The old
interfaces can be completely removed once callers are moved to the new chained
constructor pattern.

llvm-svn: 209081
2014-05-17 21:50:06 +00:00
Saleem Abdulrasool 9f664c1083 Target: change member from reference to pointer
This is a preliminary step to help ease the construction of CallLoweringInfo.
Changing the construction to a chained function pattern requires that the
parameter be nullable.  However, rather than copying the vector, save a pointer
rather than the reference to permit a late binding of the arguments.

llvm-svn: 209080
2014-05-17 21:50:01 +00:00
Saleem Abdulrasool 6d11b7cd7a ARM: whitespace
Remove some whitespace.  NFC.

llvm-svn: 209079
2014-05-17 21:49:54 +00:00
Rafael Espindola f1bedd3747 Use create methods since msvc doesn't handle delegating constructors.
llvm-svn: 209076
2014-05-17 21:29:57 +00:00
Rafael Espindola 77bbb54fbf Handle ConstantAggregateZero when upgrading global_ctors.
llvm-svn: 209075
2014-05-17 21:00:22 +00:00
Rafael Espindola 8370565820 Reduce abuse of default values in the GlobalAlias constructor.
This is in preparation for adding an optional offset.

llvm-svn: 209073
2014-05-17 19:57:46 +00:00
NAKAMURA Takumi 7ef81a4f98 Revert r209049 and r209065, "Add support for combining GEPs across PHI nodes"
It broke clang selfhosting even after r209065.

llvm-svn: 209067
2014-05-17 14:39:21 +00:00
David Majnemer 41d7dfe46a MachO: Add comments describing section flags/attrs
When pruning superfluous MachO structure definitions, I chose to keep
the most generically useful which is why Support's definitions won over
the ones in MC.

However, the MC copy had some useful comments describing some of the
field values.

Bring these back to the copy in Support.  While doing this, fill in some
of the underdocumented definitions as well.

llvm-svn: 209066
2014-05-17 07:36:36 +00:00
Louis Gerbarg 455805694e Fix for sanitizer crash introduced in r209049
This patch fixes 3 issues introduced by r209049 that only showed up in on
the sanitizer buildbots. One was a typo in a compare. The other is a check to
confirm that the single differing value in the two incoming GEPs is the same
type. The final issue was the the IRBuilder under some circumstances would
build PHIs in the middle of the block.

llvm-svn: 209065
2014-05-17 06:51:36 +00:00
David Majnemer 483e4e08ac Target: Replace getSection().empty() with hasSection()
No functional change, just a small cleanup.

llvm-svn: 209064
2014-05-17 05:18:40 +00:00
Saleem Abdulrasool 2476759673 test: fix copy-paste mistake
Accidental over-quoting of the match string.

llvm-svn: 209058
2014-05-17 04:32:38 +00:00
Saleem Abdulrasool 46fed305db ARM: use the proper target object format for WoA
WoA uses COFF, not ELF.  ARMISelLowering::createTLOF would previously return ELF
for any non-MachO platform.  This was a missed site when the original change for
target format support for Windows on ARM was done.

llvm-svn: 209057
2014-05-17 04:28:08 +00:00
Chandler Carruth c85473143c [x86] Fix a bad predicate I spotted by inspection -- pshufhw and pshuflw
were added in SSE2, no SSSE3. Found this while auditing all uses of
SSSE3 in the X86 target. I don't actually expect this to make
a significant difference on anything and I don't have any detailed test
cases but I updated the existing test cases that already covered some of
this code path.

llvm-svn: 209056
2014-05-17 03:29:20 +00:00
Alexey Samsonov cd01472a9b [DWARF parser] Teach DIContext to fetch short (non-linkage) function names for a given address.
Change --functions option in llvm-symbolizer tool to accept
values "none", "short" or "linkage". Update the tests and docs
accordingly.

llvm-svn: 209050
2014-05-17 00:07:48 +00:00
Louis Gerbarg 8d2a43e9be Add support for combining GEPs across PHI nodes
Currently LLVM will generally merge GEPs. This allows backends to use more
complex addressing modes. In some cases this is not happening because there
is PHI inbetween the two GEPs:

  GEP1--\
        |-->PHI1-->GEP3
  GEP2--/

This patch checks to see if GEP1 and GEP2 are similiar enough that they can be
cloned (GEP12) in GEP3's BB, allowing GEP->GEP merging (GEP123):

  GEP1--\                     --\                           --\
        |-->PHI1-->GEP3  ==>    |-->PHI2->GEP12->GEP3 == >    |-->PHI2->GEP123
  GEP2--/                     --/                           --/

This also breaks certain use chains that are preventing GEP->GEP merges that the
the existing instcombine would merge otherwise.

Tests included.

rdar://15547484

llvm-svn: 209049
2014-05-16 23:47:24 +00:00
Pete Cooper 0d4ea975ef Use a sized enum for MachineOperandType. No functionality change
llvm-svn: 209048
2014-05-16 23:28:17 +00:00
Filipe Cabecinhas 7b12d773e3 Added tests for the cost of lowering VSELECT instructions.
llvm-svn: 209045
2014-05-16 22:47:58 +00:00
Filipe Cabecinhas 89654da069 Implemented special cases for PerformVSELECTCombine.
vselects with constant masks, after legalization, will get turned into
specialized shuffle_vectors so they can be matched to blend+imm
instructions.

Fixed some tests.

llvm-svn: 209044
2014-05-16 22:47:54 +00:00
Filipe Cabecinhas e15551832c Lower vselects into X86ISD::BLENDI when appropriate.
LowerVSELECT will, if possible, generate a X86ISD::BLENDI DAG node if the
condition is constant and we can emit that instruction, given the
subtarget.

This is not enough for all cases. An additional SELECTCombine optimization
will be committed.

Fixed tests that were expecting variable blends but where a blend+imm can
be generated.
Added test where we can't emit blend+immediate.
Added avx2 blend+imm tests.

llvm-svn: 209043
2014-05-16 22:47:49 +00:00
Filipe Cabecinhas 17254aaead Implemented LowerVSELECT to custom lower some instructions.
No functionality change intended. The types that previously were set to
lower as Expand or Legal are doing the same thing with this lowering
function.

llvm-svn: 209042
2014-05-16 22:47:43 +00:00
Rafael Espindola e0098928c9 Delete getAliasedGlobal.
llvm-svn: 209040
2014-05-16 22:37:03 +00:00
David Blaikie 48369d1b8e DebugInfo: Assert rather than conditionalizing when a CU's subprogram list contains declarations.
llvm-svn: 209039
2014-05-16 22:21:45 +00:00
David Blaikie c405c9cb0b DebugInfo: Handle emitting constants of C++ unicode character type.
Patch by Stephan Tolksdorf! (with some test case stuff by me)

Differential Revision: http://reviews.llvm.org/D3810

llvm-svn: 209037
2014-05-16 21:53:09 +00:00
Tom Stellard c721a23882 R600/SI: Refactor the VOP3_32 tablegen class
This will allow us to use a single MachineInstr to represent
instructions which behave the same but have different encodings
on some subtargets.

llvm-svn: 209028
2014-05-16 20:56:47 +00:00
Tom Stellard 0e70de57a3 R600/SI: Add a PredicateControl class for managing TableGen predicates
This was inspired by the PredicateControl class in the MIPS backend.

llvm-svn: 209027
2014-05-16 20:56:45 +00:00
Tom Stellard 0289ff4a4f R600/SI: Move tablegen patterns away from instruction defs
llvm-svn: 209026
2014-05-16 20:56:44 +00:00
Tom Stellard 2671338497 R600/SI: Remove unused instruction
llvm-svn: 209025
2014-05-16 20:56:43 +00:00
Tom Stellard f719ee9e76 R600/SI: Promote f32 SELECT to i32
llvm-svn: 209024
2014-05-16 20:56:41 +00:00
Tom Stellard 725db5d2c8 R600/SI: Remove duplicate pattern
llvm-svn: 209023
2014-05-16 20:56:37 +00:00
Reid Kleckner fceb76f5f9 Add comdat key field to llvm.global_ctors and llvm.global_dtors
This allows us to put dynamic initializers for weak data into the same
comdat group as the data being initialized.  This is necessary for MSVC
ABI compatibility.  Once we have comdats for guard variables, we can use
the combination to help GlobalOpt fire more often for weak data with
guarded initialization on other platforms.

Reviewers: nlewycky

Differential Revision: http://reviews.llvm.org/D3499

llvm-svn: 209015
2014-05-16 20:39:27 +00:00
Rafael Espindola 0bf5b143f5 Fix a warning in builds without asserts.
llvm-svn: 209012
2014-05-16 20:05:08 +00:00
David Blaikie 46d0ca5b40 DebugInfo: Add an assert regarding the subprogram in the subprogram map matching the abstract subprogram.
I'm not sure this is how it'll be going forward (I'd rather prefer the
definition to be in the main SP mapping, for various reasons) but this
helps me understand how it is today.

llvm-svn: 209009
2014-05-16 19:42:10 +00:00
Rafael Espindola 6b238633b7 Fix most of PR10367.
This patch changes the design of GlobalAlias so that it doesn't take a
ConstantExpr anymore. It now points directly to a GlobalObject, but its type is
independent of the aliasee type.

To avoid changing all alias related tests in this patches, I kept the common
syntax

@foo = alias i32* @bar

to mean the same as now. The cases that used to use cast now use the more
general syntax

@foo = alias i16, i32* @bar.

Note that GlobalAlias now behaves a bit more like GlobalVariable. We
know that its type is always a pointer, so we omit the '*'.

For the bitcode, a nice surprise is that we were writing both identical types
already, so the format change is minimal. Auto upgrade is handled by looking
through the casts and no new fields are needed for now. New bitcode will
simply have different types for Alias and Aliasee.

One last interesting point in the patch is that replaceAllUsesWith becomes
smart enough to avoid putting a ConstantExpr in the aliasee. This seems better
than checking and updating every caller.

A followup patch will delete getAliasedGlobal now that it is redundant. Another
patch will add support for an explicit offset.

llvm-svn: 209007
2014-05-16 19:35:39 +00:00
David Blaikie 825f487b68 DebugInfo: Assume the CU's Subprogram list only contains definitions.
DIBuilder maintains this invariant and the current DwarfDebug code could
end up doing weird things if it contained declarations (such as putting
the definition DIE inside a CU that contained the declaration - this
doesn't seem like a good idea, so rather than adding logic to handle
this case we'll just ban in for now & cross that bridge if we come to
it later).

llvm-svn: 209004
2014-05-16 18:26:53 +00:00
Chad Rosier d978ca0308 [ARM64] Increases the Sched Model accuracy for Cortex-A53.
Patch by Dave Estes <cestes@codeaurora.org>
http://reviews.llvm.org/D3769

llvm-svn: 209001
2014-05-16 17:15:33 +00:00
David Majnemer 78910fc4da InstSimplify: Improve handling of ashr/lshr
Summary:
Analyze the range of values produced by ashr/lshr cst, %V when it is
being used in an icmp.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3774

llvm-svn: 209000
2014-05-16 17:14:03 +00:00
David Majnemer ea8d5dbf24 InstSimplify: Optimize using dividend in sdiv
Summary:
The dividend in an sdiv tells us the largest and smallest possible
results.  Use this fact to optimize comparisons against an sdiv with a
constant dividend.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3795

llvm-svn: 208999
2014-05-16 16:57:04 +00:00
Tilmann Scheller 83c5743650 [ARM64] Fix wrong comment in load/store optimization pass.
ldr x1, [x0, #64]
add x0, x0, #64
 ->
ldr x1, [x0], #64

is not a valid transformation, the correct transformation (and what the code actually does) is:

ldr x1, [x0, #64]
add x0, x0, #64
 ->
ldr x1, [x0, #64]!

llvm-svn: 208998
2014-05-16 16:50:13 +00:00