Commit Graph

189432 Commits

Author SHA1 Message Date
David Green f323ab919a [ARM] Add +mve feature to mve tests. NFC 2020-01-01 17:25:20 +00:00
Liu, Chen3 8af492ade1 add strict float for round operation
Differential Revision: https://reviews.llvm.org/D72026
2020-01-01 20:42:12 +08:00
Fangrui Song d2bb8c16e7 [MC][TargetMachine] Delete MCTargetOptions::MCPIECopyRelocations
clang/lib/CodeGen/CodeGenModule performs the -mpie-copy-relocations
check and sets dso_local on applicable global variables. We don't need
to duplicate the work in TargetMachine shouldAssumeDSOLocal.

Verified that -mpie-copy-relocations can still emit PC relative
relocations for external variable accesses.

clang -target x86_64 -fpie -mpie-copy-relocations -c => R_X86_64_PC32
clang -target aarch64 -fpie -mpie-copy-relocations -c => R_AARCH64_ADR_PREL_PG_HI21+R_AARCH64_LDST64_ABS_LO12_NC
2020-01-01 00:50:18 -08:00
Hideto Ueno e996303431 [Attributor] AAValueConstantRange: Value range analysis using constant range
This patch introduces `AAValueConstantRange`, which answers a possible range for integer value in a specific program point.
One of the motivations is propagating existing `range` metadata. (I think we need to change the situation that `range` metadata cannot be put to Argument).

The state is a tuple of `ConstantRange` and it is initialized to (known, assumed) = ([-∞, +∞], empty).

Currently, AAValueConstantRange is created when AAValueSimplify cannot
simplify the value.

Supported
 - BinaryOperator(add, sub, ...)
 - CmpInst(icmp eq, ...)
 - !range metadata

`AAValueConstantRange` is not intended to extend to polyhedral range value analysis.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D71620
2020-01-01 15:35:56 +09:00
Craig Topper 86f48999f4 [X86] Fix typo in getCMovOpcode.
The 64-bit HasMemoryOperand line was using CMOV32rm instead of
CMOV64rm. Not sure how to test this. We have no test coverage
that passes true for HasMemoryOperand.
2019-12-31 21:50:38 -08:00
Craig Topper 468a0cb5f3 [X86] Add X87 FCMOV support to X86FlagsCopyLowering.
Fixes PR44396
2019-12-31 20:35:21 -08:00
Matt Arsenault 4d7201e7b9 DAG: Stop trying to fold FP -(x-y) -> y-x in getNode with nsz
This was increasing the number of instructions when fsub was legalized
on AMDGPU with no signed zeros enabled. This fold should be guarded by
hasOneUse, and I don't think getNode should be doing that. The same
fold is already done as a regular combine through isNegatibleForFree.

This does require duplicating, even though isNegatibleForFree does
this combine already (and properly checks hasOneUse) to avoid one PPC
regression. In the regression, the outer fneg has nsz but the fsub
operand does not. isNegatibleForFree only sees the operand, and
doesn't see it's used from a nsz context. A nsz parameter needs to be
added and threaded through isNegatibleForFree to avoid this.
2019-12-31 22:49:51 -05:00
Craig Topper 26bdc603f7 [X86] Constant fold KSHIFT of an all zeros vector to just an all zeros vector. 2019-12-31 15:57:39 -08:00
Craig Topper 374e0299cf [X86][InstCombine] Add constant folding and simplification support for pdep and pext
The instructions use a mask to either pack disjoint bits together(pext) or spread bits to disjoint locations(pdep). If the mask is all 0s then no bits are extracted or deposited. If the mask is all ones, then the source value is written to the result since no compression or expansion happens. Otherwise if both the source and mask are constant we can walk the bits in the source/mask and calculate the result.

There other crazier things we could do like computeKnownBits or turning pext into shift/and if only a single contiguous range of bits is extracted.

Fixes PR44389

Differential Revision: https://reviews.llvm.org/D71952
2019-12-31 15:06:47 -08:00
Craig Topper 1cc8a74de3 [X86] Use carry flag from add for (seteq (add X, -1), -1).
If we just subtracted 1 and are checking if the result is -1. We can use the carry flag from the ADD instead of an explicit CMP. I'm using the same checks for the add users as EmitTest.

Fixes one case from PR44412

Differential Revision: https://reviews.llvm.org/D72019
2019-12-31 15:05:23 -08:00
Craig Topper 4ae3120ed8 [LegalizeVectorOps][AArch64] Stop asking for v4f16 fp_round and fp_extend to be promoted.
These operations are needed as building blocks for promoting so they
can't be promoted themselves.

This appeared to work because the fp_extend query type for operation
actions is the result type, not the input type so it never triggered
in the legalizer.

For fp_round, the vector op legalizer just ended up creating a
nop fp_extend that was elided by getNode, followed by a nop
fp_round that was also elided by getNode. This was followed by
a final fp_round from v4f32 back to vf416 which was CSEd to the
original node. Then legalize vector ops just believed that node
legalized to itself. LegalizeDAG took another crack at promoting
it, but didn't have a handler so just skipped it with a debug
message saying it wasn't promoted.

This patch just removes the operation actions to avoid this
non-sense. Found while trying to refactor LegalizeVectorOps to
handle multiple result nodes better.
2019-12-31 15:04:12 -08:00
Matt Arsenault 64cf26548a AMDGPU: Precommit test showing extra instructions are introduced 2019-12-31 14:54:57 -05:00
Michael Liao 79d401905f [amdgpu] Fix scoreboard updating on `s_waitcnt_vscnt`.
Summary: - Other counters are accidentally cleared.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71866
2019-12-31 14:20:30 -05:00
Craig Topper 73855e4300 [X86] Add test case for opposite branch condition for PR44412. NFC 2019-12-31 10:58:04 -08:00
Sanjay Patel a041c4ec6f [InstCombine] fold zext of masked bit set/clear
This does not solve PR17101, but it is one of the
underlying diffs noted here:
https://bugs.llvm.org/show_bug.cgi?id=17101#c8

We could ease the one-use checks for the 'clear'
(no 'not' op) half of the transform, but I do not
know if that asymmetry would make things better
or worse.

Proofs:
https://rise4fun.com/Alive/uVB

  Name: masked bit set
  %sh1 = shl i32 1, %y
  %and = and i32 %sh1, %x
  %cmp = icmp ne i32 %and, 0
  %r = zext i1 %cmp to i32
  =>
  %s = lshr i32 %x, %y
  %r = and i32 %s, 1

  Name: masked bit clear
  %sh1 = shl i32 1, %y
  %and = and i32 %sh1, %x
  %cmp = icmp eq i32 %and, 0
  %r = zext i1 %cmp to i32
  =>
  %xn = xor i32 %x, -1
  %s = lshr i32 %xn, %y
  %r = and i32 %s, 1
2019-12-31 12:35:10 -05:00
Sanjay Patel eb5c026ef0 [InstCombine] add/adjust tests for masked bit; NFC 2019-12-31 12:35:10 -05:00
Johannes Doerfert df3b56c905 [Attributor][Fix] Avoid leaking memory after D68765 2019-12-31 10:55:07 -06:00
Nikita Popov 7adb5c2aca Revert "[InstCombine] Fix infinite loop due to bitcast <-> phi transforms"
This reverts commit 27a0795943.

Seems to break test-suite.
2019-12-31 17:42:57 +01:00
Jinsong Ji fcbf05bbdc [PowerPC][NFC] Fix clang-tidy warning
Reported by
https://results.llvm-merge-guard.org/amd64_debian_testing_clang8-726/clang-tidy.txt

/mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11672:10:
warning: invalid case style for variable 'isEQ'
[readability-identifier-naming]
    bool isEQ = (MI.getOpcode() == PPC::ANDI_rec_1_EQ_BIT ||
         ^~~~
         IsEq
/mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11679:14:
warning: invalid case style for variable 'dl'
[readability-identifier-naming]
    DebugLoc dl = MI.getDebugLoc();
             ^~
             Dl
2019-12-31 16:24:40 +00:00
Sanjay Patel e6bdecf1cd [AArch64] add test for fsub+fneg; NFC
D72015 proposes to restrict the current behavior.
2019-12-31 10:25:41 -05:00
Sanjay Patel 108645cd0a [InstCombine] add tests for masked bit set/clear; NFC 2019-12-31 10:20:45 -05:00
Nikita Popov 27a0795943 [InstCombine] Fix infinite loop due to bitcast <-> phi transforms
Fix for https://bugs.llvm.org/show_bug.cgi?id=44245.

The optimizeBitCastFromPhi() and FoldPHIArgOpIntoPHI() end up
fighting against each other, because optimizeBitCastFromPhi()
assumes that bitcasts of loads will get folded. This doesn't happen
here, because a dangling phi node prevents the one-use fold in
https://github.com/llvm/llvm-project/blob/master/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp#L620-L628 from triggering.

This patch fixes the issue by adding manually removing the old phis.

Differential Revision: https://reviews.llvm.org/D71164
2019-12-31 16:17:14 +01:00
Miloš Stojanović c7dc4734d2 [llvm-exegesis] Check counters before running
Check if the appropriate counters for the specified mode are defined on
the target. This is checked before any other work is done.

Differential Revision: https://reviews.llvm.org/D71927
2019-12-31 14:17:24 +01:00
Sam Parker b409f73e1f [ARM][TypePromotion] Re-enable by default
Re-enable the pass after it was reverted and the bug fixed.
2019-12-31 11:31:06 +00:00
Connor Abbott fb114694e9 [InstCombine] Don't rewrite phi-of-bitcast when the phi has other users
Judging by the existing comments, this was the intention, but the
transform never actually checked if the existing phi's would be removed.
See https://bugs.llvm.org/show_bug.cgi?id=44242 for an example where
this causes much worse code generation on AMDGPU.

Differential Revision: https://reviews.llvm.org/D71209
2019-12-31 12:15:02 +01:00
Connor Abbott d04e64a25a [InstCombine] Add tests for PR44242
Differential Revision: https://reviews.llvm.org/D71260
2019-12-31 12:15:02 +01:00
Ilya Biryukov 4f82af81a0 [Attributor] Suppress unused warnings when assertions are disabled. NFC 2019-12-31 10:21:52 +01:00
Johannes Doerfert a6c59e0792 [Utils] Deal with occasionally deleted functions
When functions exist for some but not all run lines we need to be
careful when selecting the prefix. So far, a common prefix was
potentially chosen as there was never a "conflict" that would have
caused otherwise. With this patch we avoid common prefixes if they
are used by run lines that do not emit the function.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D68850
2019-12-31 02:35:18 -06:00
Johannes Doerfert 751336340d [Attributor] Function signature rewrite infrastructure
As part of the Attributor manifest we want to change the signature of
functions. This patch introduces a fairly generic interface to do so.
As a first, very simple, use case, we remove unused arguments. A second
use case, pointer privatization, will be committed with this patch as
well.

A lot of the code and ideas are taken from argument promotion and we
run all argument promotion tests through this framework as well.

Reviewed By: uenoku

Differential Revision: https://reviews.llvm.org/D68765
2019-12-31 02:31:33 -06:00
Craig Topper e898ba2d15 [X86] Slightly improve our attempted error recovery for 64-bit -mno-sse2 in LowerCallResult to use FP1 if there are two return values.
If the return value is a struct of 2 doubles we need two return
registers.

If SSE2 is disabled we can't return in XMM registers like the ABI says.
After logging an error we attempt to recover by using FP0 instead
of an XMM register. But if the return needs two registers, we may have
already used FP0. So if the register we were supposed to copy to is
XMM1, copy to FP1 in the recovery instead.

This seems to fix the assertion/crash in PR44413.
2019-12-31 00:16:13 -08:00
Johannes Doerfert 4a6413cd0a [Utils][Fix] Minor test result change 2019-12-31 02:12:44 -06:00
Shengchen Kan a36a89dcdc [NFC] Style cleanup
1. make function Is16BitMemOperand static
2. Use Doxygen features in comment
3. Rename functions to make them start with a lower case letter
2019-12-31 16:10:36 +08:00
Johannes Doerfert be26bd5513 [Utils] Reuse argument variable names in the body
If we have `int foo(int a) { return a; }` and we run with --function-signature
enabled, we want a single variable declaration for `a` which is reused
later.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D69722
2019-12-31 01:58:36 -06:00
Johannes Doerfert 70771d8b9e [Utils] Allow update_test_checks to scrub attribute annotations
Attribute annotations on calls, e.g., , are not useful on their own.
This patch adds a flag to update_test_checks.py to scrub them.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D68851
2019-12-31 01:51:22 -06:00
Johannes Doerfert dada8132af [Attributor] Propagate known align from arguments to call sites arguments
Since the information is known we can simply use it at the call site.
This is especially useful for callbacks but also helps regular calls.

The test changes are mechanical.
2019-12-31 01:33:22 -06:00
Johannes Doerfert b1b441d22d [Attributor] Use abstract call sites to determine associated arguments
This is the second step after D67871 to make use of abstract call sites.
In this patch the argument we associate with a abstract call site
argument can be the one in the callback callee instead of the one in the
callback broker.

Caveat: We cannot allow no-alias arguments for problematic callbacks:
As described in [1], adding no-alias (or restrict) to arguments could
break synchronization as the synchronization effect, e.g., a barrier,
does not "alias" with the pointer anymore. This disables no-alias
annotation for potentially problematic arguments until we implement the
fix described in [1].

Reviewed By: uenoku

Differential Revision: https://reviews.llvm.org/D68008

[1] Compiler Optimizations for OpenMP, J. Doerfert and H. Finkel,
    International Workshop on OpenMP 2018,
    http://compilers.cs.uni-saarland.de/people/doerfert/par_opt18.pdf
2019-12-31 01:33:22 -06:00
Johannes Doerfert 2888019871 [Attributor] Annotate the memory behavior of call site arguments
Especially for callbacks, annotating the call site arguments is
important. Doing so exposed a too strong dependence of AAMemoryBehavior
on AANoCapture since we handle the case of potentially captured pointers
explicitly.

The changes to the tests are all mechanical.
2019-12-31 01:33:21 -06:00
Shengchen Kan 23a6ae2b06 [NFC] Make X86MCCodeEmitter::isPCRel32Branch static 2019-12-31 15:12:45 +08:00
David Blaikie b350c666ab Revert "DebugInfo: Fix rangesBaseAddress DICompileUnit bitcode serialization/deserialization"
Seeing some curious CFI failures internally - which makes little sense
to me, as I don't think anyone is using this flag (even us,
internally)... so sounds like a bug in my code somewhere (possibly a
latent one that propagating this flag exposed, not sure). Reverting
while I investigate.

This reverts commit c51b45e32e.
2019-12-30 22:33:35 -08:00
Shengchen Kan 5b1cbfa423 [NFC] Style cleanup
1. Remove function is64BitMode() and use STI.hasFeature(X86::Mode16Bit) directly
2. Use Doxygen features in comment
3. Rename functions to make them start with a lower case letter
4. Format the code with clang-format
2019-12-31 14:28:33 +08:00
Craig Topper 787e078f3e [TargetLowering][AMDGPU] Make scalarizeVectorLoad return a pair of SDValues instead of creating a MERGE_VALUES node. NFCI
This allows us to clean up some places that were peeking through
the MERGE_VALUES node after the call. By returning the SDValues
directly, we can clean that up.

Unfortunately, there are several call sites in AMDGPU that wanted
the MERGE_VALUES and now need to create their own.
2019-12-30 19:36:04 -08:00
Craig Topper 831898ff8a [SelectionDAG] Fix copy/paste mistake in comment. NFC
I think this was copied from scalarizeVectorLoad where that is
what happens.
2019-12-30 19:36:04 -08:00
jasonliu 991f7abdfc [NFC] Add comments in unit test aix-xcoff-toc.ll to clarify the intent
Address David's post review comment in https://reviews.llvm.org/D71667.
Add comments to clarify what we are testing in that file.
2019-12-31 03:29:50 +00:00
Craig Topper 6185dc0eb3 [X86] Add test case for PR44412. NFC 2019-12-30 14:41:20 -08:00
Eric Astor 07be32961a Remove a redundant `default:` on an exhaustive switch(enum). 2019-12-30 16:11:28 -05:00
Jinsong Ji 0bd3cc4248 [PowerPC][docs] Update Embedded PowerPC docs in Compiler Writers Info page
Summary:
Embedded PowerPC are still actively supported, especially SPE...
So update some important references here:

* adding EREF
* adding SPE/VLE ref

Delete deprecated ones into "Other documents..".

Reviewers: #powerpc, jhibbits, hfinkel

Reviewed By: #powerpc, jhibbits

Subscribers: wuzish, merge_guards_bot, nemanjai, shchenz, steven.zhang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72008
2019-12-30 20:22:37 +00:00
Johannes Doerfert 10fedd94b4 [OpenMP] Use the OpenMPIRBuilder for `omp parallel`
This allows to use the OpenMPIRBuilder for parallel regions. Code was
extracted from D61953 and adapted to work with the new version (D70109).

All but one feature should be supported. An update of this patch will
provide test coverage and privatization other than shared.

Reviewed By: fghanim

Differential Revision: https://reviews.llvm.org/D70290
2019-12-30 13:57:13 -06:00
Johannes Doerfert 000c6a5038 [OpenMP] Use the OpenMPIRBuilder for `omp cancel`
An `omp cancel parallel` needs to be emitted by the OpenMPIRBuilder if
the `parallel` was emitted by the OpenMPIRBuilder. This patch makes
this possible. The cancel logic is shared with the cancel barriers.
Testing is done via unit tests and the clang cancel_codegen.cpp file
once D70290 lands.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D71948
2019-12-30 13:57:13 -06:00
Eric Astor 4a7aa252a3 [X86][AsmParser] re-introduce 'offset' operator
Summary:
Amend MS offset operator implementation, to more closely fit with its MS counterpart:

    1. InlineAsm: evaluate non-local source entities to their (address) location
    2. Provide a mean with which one may acquire the address of an assembly label via MS syntax, rather than yielding a memory reference (i.e. "offset asm_label" and "$asm_label" should be synonymous
    3. address PR32530

Based on http://llvm.org/D37461

Fix broken test where the break appears unrelated.

- Set up appropriate memory-input rewrites for variable references.

- Intel-dialect assembly printing now correctly handles addresses by adding "offset".

- Pass offsets as immediate operands (using "r" constraint for offsets of locals).

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D71436
2019-12-30 14:35:26 -05:00
Matt Arsenault 7fa0bfe7d5 AMDGPU/GlobalISel: Select mul24 intrinsics 2019-12-30 14:24:25 -05:00