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18 Commits

Author SHA1 Message Date
Simon Pilgrim 61921f779f [X86][SSE] ComputeNumSignBits tests showing missing SEXT/AND/XOR/OR demandedelts support 
llvm-svn: 316868
 2017-10-29 20:49:27 +00:00
Simon Pilgrim 7613a7b564 [SelectionDAG] Add SRA/SHL demanded elts support to ComputeNumSignBits 
Introduce a isConstOrDemandedConstSplat helper function that can recognise a constant splat build vector for at least the demanded elts we care about.

llvm-svn: 316866
 2017-10-29 18:19:37 +00:00
Simon Pilgrim b56fb4a2bb [X86][SSE] ComputeNumSignBits tests showing missing SHL/SRA demandedelts support 
llvm-svn: 316865
 2017-10-29 18:01:31 +00:00
Simon Pilgrim 3cb024490a [X86][SSE] Add extractps/pextrd equivalence to domain tables 
Differential Revision: https://reviews.llvm.org/D39135

llvm-svn: 316274
 2017-10-21 20:19:48 +00:00
Simon Pilgrim f3ee9c6997 [X86][AVX] Allow 32-bit targets to peek through subvectors to extract constant splats for vXi64 shifts. 
llvm-svn: 303009
 2017-05-14 11:46:26 +00:00
Simon Pilgrim 754c1618ec [SelectionDAG] Added support for EXTRACT_SUBVECTOR/CONCAT_VECTORS demandedelts in ComputeNumSignBits 
llvm-svn: 302997
 2017-05-13 22:10:58 +00:00
Simon Pilgrim 78b0ce03e9 [X86][SSE] Test showing missing EXTRACT_SUBVECTOR/CONCAT_VECTORS demandedelts support in ComputeNumSignBits 
llvm-svn: 302994
 2017-05-13 21:50:18 +00:00
Simon Pilgrim 7666afd042 [SelectionDAG] Add VECTOR_SHUFFLE support to ComputeNumSignBits 
llvm-svn: 302993
 2017-05-13 19:57:10 +00:00
Simon Pilgrim ded23a7fb1 [X86][SSE] Test showing inability of ComputeNumSignBits to resolve shuffles 
llvm-svn: 302992
 2017-05-13 17:41:07 +00:00
Simon Pilgrim 7ae9419dc0 [DAGCombiner] Add ComputeNumSignBits vector demanded elements support to ASHR and INSERT_VECTOR_ELT (reapplied) 
Reapplied r299221 after fix for nondeterminism in ThinLTO builder (rL301599), with extra check for implicit truncation of inserted element.

llvm-svn: 301644
 2017-04-28 13:21:18 +00:00
Galina Kistanova 2cc97d92ce Temporarily revert r299221 to fix nondeterminism in ThinLTO builder. 
llvm-svn: 300783
 2017-04-19 23:16:14 +00:00
Simon Pilgrim 1cdbfe44b1 [DAGCombiner] Add ComputeNumSignBits vector demanded elements support to ASHR and INSERT_VECTOR_ELT 
Followup to D31311

llvm-svn: 299221
 2017-03-31 14:21:50 +00:00
Simon Pilgrim c3e5c3c5bc [X86][SSE] Add extra computeNumSignBits test case for D31311. 
llvm-svn: 298774
 2017-03-25 15:43:36 +00:00
Simon Pilgrim 1c048ab6ba [X86][SSE] Extract elements from narrower shuffle masks. 
Add support for widening narrow shuffle masks so we can directly extract from the relevant input vector of the shuffle.

llvm-svn: 298616
 2017-03-23 16:09:34 +00:00
Simon Pilgrim d341290b5c [X86][SSE] Add computeNumSignBits test for sitofp of (extended) i64 extracted element 
llvm-svn: 298592
 2017-03-23 13:18:09 +00:00
Simon Pilgrim 128a10a41d [X86][SSE] Fix load folding for (V)CVTDQ2PD 
This only requires a 64-bit memory source, not the whole 128-bits. But the 128-bit case is still supported via X86InstrInfo::foldMemoryOperandImpl

llvm-svn: 297523
 2017-03-10 22:35:07 +00:00
Simon Pilgrim 7dedbfa89d [SelectionDAG] Add support for BUILD_VECTOR to ComputeNumSignBits 
llvm-svn: 297492
 2017-03-10 18:36:46 +00:00
Simon Pilgrim e54cd65399 [X86][SSE] Added tests showing missed truncations for sitofp conversion 
SelectionDAG::ComputeNumSignBits is poor at build_vector handling, meaning that we can't see that all the vXi64 sources are in fact sign extended i32 or smaller.

llvm-svn: 297486
 2017-03-10 18:01:53 +00:00