63 Commits

Author	SHA1	Message	Date
Chris Lattner	a6eb52fcf7	Add support for /0 /1, etc type instructions ... llvm-svn: 4802	2002-11-21 17:08:49 +00:00
Chris Lattner	c48d0fa9a2	Add new prefix flag ... llvm-svn: 4794	2002-11-21 01:32:55 +00:00
Chris Lattner	cf72e52df3	Expose base opcode ... llvm-svn: 4742	2002-11-18 06:56:24 +00:00
Chris Lattner	0018e8d5fc	Start to add more information to instr.def ... llvm-svn: 4741	2002-11-18 05:37:11 +00:00
Chris Lattner	f2e00c62ab	Add instruction annotation about whether it has a 0x0F opcode prefix ... llvm-svn: 4740	2002-11-18 01:59:28 +00:00
Chris Lattner	5fd53046b0	Arrange to have a TargetMachine available in X86InstrInfo::print ... llvm-svn: 4734	2002-11-17 23:20:37 +00:00
Chris Lattner	9289d7d693	Reorganize printing interface a bit ... llvm-svn: 4728	2002-11-17 22:53:13 +00:00
Chris Lattner	60c59d5b4e	Add flag to specify when no value is produced by an instruction ... llvm-svn: 4441	2002-10-30 01:09:34 +00:00
Chris Lattner	27d247978b	Rename X86InstructionInfo to X86InstrInfo ... llvm-svn: 4413	2002-10-29 21:05:24 +00:00
Chris Lattner	f57420ee17	Minor renaming ... llvm-svn: 4410	2002-10-29 20:48:56 +00:00
Chris Lattner	16cbd41c21	Implement MachineInstrInfo interface ... llvm-svn: 4394	2002-10-29 17:43:19 +00:00
Chris Lattner	1303f2f057	Initial stab at MachineInstr'ication ... llvm-svn: 4367	2002-10-28 23:55:19 +00:00
Chris Lattner	d92fb0058b	Initial checkin of X86 backend. ... We can instruction select exactly one instruction 'ret void'. Wow. llvm-svn: 4284	2002-10-25 22:55:53 +00:00