Commit Graph

2451 Commits

Author SHA1 Message Date
Chris Lattner ff0598de75 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file
it is defined in.

llvm-svn: 36196
2007-04-17 17:21:52 +00:00
Anton Korobeynikov 8b7aab009e Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
2007-04-17 09:20:00 +00:00
Chris Lattner 62a8cbe594 SSE4 is apparently public now.
llvm-svn: 36185
2007-04-17 00:02:37 +00:00
Jeff Cohen 6f3a548ff4 In the event that some really old non-Intel or -AMD CPU is encountered...
llvm-svn: 36177
2007-04-16 21:59:44 +00:00
Jeff Cohen da17029218 Before assuming that the original code didn't work for Athlon64, the person who
replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.

llvm-svn: 36173
2007-04-16 21:48:58 +00:00
Anton Korobeynikov fb80151c42 Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.

llvm-svn: 36146
2007-04-16 18:10:23 +00:00
Chris Lattner e275463e2f add a note
llvm-svn: 36028
2007-04-14 23:06:09 +00:00
Chris Lattner 2805bce656 Fix mmx paddq, add support for the 'y' register class, though it isn't tested.
llvm-svn: 35940
2007-04-12 04:14:49 +00:00
Chris Lattner a5fcd24746 Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
llvm-svn: 35926
2007-04-11 22:29:46 +00:00
Chris Lattner a6aa0319f1 done
llvm-svn: 35884
2007-04-11 05:34:00 +00:00
Bill Wendling f099841573 Add support for our first SSSE3 instruction "pmulhrsw".
llvm-svn: 35869
2007-04-10 22:10:25 +00:00
Chris Lattner d4a9b92a13 new micro optzn
llvm-svn: 35867
2007-04-10 21:14:01 +00:00
Chris Lattner 808ac93f68 remove some dead hooks
llvm-svn: 35845
2007-04-09 23:31:19 +00:00
Chris Lattner 39f65335d5 remove some dead target hooks, subsumed by isLegalAddressingMode
llvm-svn: 35840
2007-04-09 22:27:04 +00:00
Chris Lattner 7451e4d6a1 move a bunch of register constraints from being handled by
getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

llvm-svn: 35804
2007-04-09 05:49:22 +00:00
Chris Lattner 2b6b4eb471 implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values
used with x constraints.

llvm-svn: 35803
2007-04-09 05:31:48 +00:00
Chris Lattner 590ed5e5b7 implement CodeGen/X86/inline-asm-x-scalar.ll
llvm-svn: 35799
2007-04-09 05:11:28 +00:00
Bill Wendling ac5b650a54 Adding more MMX instructions.
llvm-svn: 35638
2007-04-03 23:48:32 +00:00
Chris Lattner f79fb5cad0 make a new missing features section
llvm-svn: 35637
2007-04-03 23:41:34 +00:00
Bill Wendling 2640b4a4ab Updated
llvm-svn: 35634
2007-04-03 23:37:20 +00:00
Bill Wendling 652c7b2d73 Changed to new MMX_ recipes.
llvm-svn: 35617
2007-04-03 06:18:31 +00:00
Bill Wendling e7b2a864f2 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them.
llvm-svn: 35616
2007-04-03 06:00:37 +00:00
Chris Lattner 59a6fa7af6 fix breakage from last night, simplify code.
llvm-svn: 35560
2007-04-01 20:49:36 +00:00
Anton Korobeynikov a8cc1ebae1 Consistency with native compilers
llvm-svn: 35532
2007-03-31 13:11:52 +00:00
Bill Wendling b72fcddd23 Fix comment.
llvm-svn: 35531
2007-03-31 09:36:12 +00:00
Bill Wendling afddb2c6f8 Match GCC's MMX calling convention.
llvm-svn: 35523
2007-03-31 01:03:53 +00:00
Chris Lattner 1eb94d973a implement the new addressing mode description hook.
llvm-svn: 35521
2007-03-30 23:15:24 +00:00
Bill Wendling 2fbcbc16b4 Add MMX calling conventions.
llvm-svn: 35489
2007-03-30 00:35:22 +00:00
Bill Wendling 4ad38abd40 Made this into a bug report: PR1286
llvm-svn: 35439
2007-03-28 19:07:34 +00:00
Anton Korobeynikov 0ad22563b8 Oops :)
llvm-svn: 35438
2007-03-28 18:38:33 +00:00
Anton Korobeynikov 7522c9d8e1 Don't allow MatchAddress recurse too much. This trims exponential
behaviour in some cases.

llvm-svn: 35437
2007-03-28 18:36:33 +00:00
Chris Lattner 2ba38c8711 add a note
llvm-svn: 35435
2007-03-28 18:17:19 +00:00
Chris Lattner bcd38852f2 Compile CodeGen/X86/lea-3.ll:test2 to:
_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret

llvm-svn: 35434
2007-03-28 18:12:31 +00:00
Chris Lattner a6527d6a61 Dan pointed out that this is done, remove it!
llvm-svn: 35430
2007-03-28 17:26:52 +00:00
Bill Wendling 2338e21b2b Remove cruft I put in there...
llvm-svn: 35394
2007-03-28 01:02:54 +00:00
Chris Lattner c56e4920d2 Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".

llvm-svn: 35393
2007-03-28 00:58:40 +00:00
Bill Wendling ad2db4a4cf Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic.
llvm-svn: 35392
2007-03-28 00:57:11 +00:00
Bill Wendling 999c77f89c Add the "unpack low packed data" instructions. This should be the last of
the MMX instructions that are needed...

llvm-svn: 35389
2007-03-27 21:20:36 +00:00
Bill Wendling 6dff51ae65 Fix so that pandn is emitted instead of an xor/and combo. Add integer
comparison operators.

llvm-svn: 35385
2007-03-27 20:22:40 +00:00
Bill Wendling 158f6092a2 Promote to v1i64 type...
llvm-svn: 35353
2007-03-26 08:03:33 +00:00
Bill Wendling 48a24419bf Updated.
llvm-svn: 35352
2007-03-26 07:55:58 +00:00
Bill Wendling 98d2104c6f Add support for the v1i64 type. This makes better code for this:
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

llvm-svn: 35351
2007-03-26 07:53:08 +00:00
Chris Lattner d685514e2e switch TargetLowering::getConstraintType to take the entire constraint,
not just the first letter.  No functionality change.

llvm-svn: 35322
2007-03-25 02:14:49 +00:00
Chris Lattner 927f30da08 Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.
llvm-svn: 35320
2007-03-25 02:01:03 +00:00
Chris Lattner 03a643aa69 enforce the proper range for the i386 N constraint.
llvm-svn: 35319
2007-03-25 01:57:35 +00:00
Chris Lattner c8ddca703d Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
llvm-svn: 35318
2007-03-25 01:44:57 +00:00
Anton Korobeynikov 8aae2d7e1c Autodetect MMX & SSE stuff for AMD processors
llvm-svn: 35292
2007-03-23 23:46:48 +00:00
Bill Wendling 871c77cda1 PR1260:
Add final support to get the QT example to compile.

llvm-svn: 35290
2007-03-23 22:35:46 +00:00
Bill Wendling 7c17fbc5b7 We generate a shufflevector instruction, so we don't need the builtin
intrinsic.

llvm-svn: 35269
2007-03-22 20:29:26 +00:00
Bill Wendling d551a18783 Support added for shifts and unpacking MMX instructions.
llvm-svn: 35266
2007-03-22 18:42:45 +00:00