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263 Commits

Author SHA1 Message Date
Krzysztof Parzyszek e260332838 [Hexagon] Remove C6 and C7 as separate registers 
These are M0 and M1. Removing duplicated registers reduces the number
of explicit register aliasing.

llvm-svn: 302306
 2017-05-05 22:12:12 +00:00
Krzysztof Parzyszek 2af5037d34 [Hexagon] Use automatically-generated scheduling information for HVX 
Patch by Jyotsna Verma.

llvm-svn: 302073
 2017-05-03 20:10:36 +00:00
Krzysztof Parzyszek 57a8bb4343 [Hexagon] Change iconst to emit 27bit relocation 
Patch by Colin LeMahieu.

llvm-svn: 301956
 2017-05-02 18:19:11 +00:00
Krzysztof Parzyszek a750383d0f [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCREL 
Patch by Sid Manning.

llvm-svn: 301955
 2017-05-02 18:15:33 +00:00
Krzysztof Parzyszek 32e20b80c6 [Hexagon] Formatting changes, NFC 
llvm-svn: 301953
 2017-05-02 18:09:07 +00:00
Krzysztof Parzyszek 188ab98f67 [Hexagon] Remove unused validSubtarget TSFlags 
Patch by Colin LeMahieu.

llvm-svn: 301952
 2017-05-02 18:05:36 +00:00
Krzysztof Parzyszek b0af1ef741 [Hexagon] Make sure duplexed dealloc_returns are checked for double jumps 
Patch by Colin LeMahieu.

llvm-svn: 301951
 2017-05-02 18:03:08 +00:00
Krzysztof Parzyszek 49f7e0a98b [Hexagon] Move checking AXOK to checker 
Patch by Colin LeMahieu.

llvm-svn: 301949
 2017-05-02 18:00:37 +00:00
Krzysztof Parzyszek 57f5046b4a [Hexagon] Remove unneeded code from HexagonShuffler 
Patch by Colin LeMahieu.

llvm-svn: 301947
 2017-05-02 17:58:52 +00:00
Krzysztof Parzyszek c15f8d2a08 [Hexagon] Extract function that checks endloops with other branches 
Change location number to point to conflicting branch instruction.

Patch by Colin LeMahieu.

llvm-svn: 301946
 2017-05-02 17:56:11 +00:00
Krzysztof Parzyszek 1cc6bfbc83 [Hexagon] Add new packet iterator which will iterate through duplexes 
Patch by Colin LeMahieu.

llvm-svn: 301945
 2017-05-02 17:53:51 +00:00
Krzysztof Parzyszek 107f82d128 [Hexagon] Check for .cur def without use without using a map data structure 
Patch by Colin LeMahieu.

llvm-svn: 301943
 2017-05-02 17:51:14 +00:00
Krzysztof Parzyszek 4a1c3f0aaa [Hexagon] Replace CVI_VM_CUR_LD type with CVI_VM_LD 
A .cur instruction can be identified by checking isCVINew() && mayLoad().

Patch by Colin LeMahieu.

llvm-svn: 301829
 2017-05-01 20:16:35 +00:00
Krzysztof Parzyszek 55db483a46 [Hexagon] Improving error reporting for writing to read only registers 
Patch by Colin LeMahieu.

llvm-svn: 301828
 2017-05-01 20:10:41 +00:00
Krzysztof Parzyszek e96d27a997 [Hexagon] Give better error messages for solo instruction errors 
Patch by Colin LeMahieu.

llvm-svn: 301827
 2017-05-01 20:06:01 +00:00
Krzysztof Parzyszek e12d1e70cb [Hexagon] Improve shuffle error reporting 
Patch by Colin LeMahieu.

llvm-svn: 301823
 2017-05-01 19:41:43 +00:00
Andrew V. Tischenko 75745d0c3e This patch closes PR#32216: Better testing of schedule model instruction latencies/throughputs. 
The details are here: https://reviews.llvm.org/D30941

llvm-svn: 300311
 2017-04-14 07:44:23 +00:00
Krzysztof Parzyszek 058abf1a4a [Hexagon] Change the vector scaling for vector offsets 
Keep full offset value on MI-level instructions, but have it scaled down
in the MC-level instructions.

llvm-svn: 299664
 2017-04-06 17:28:21 +00:00
Alex Bradbury 866113c2ea Add MCContext argument to MCAsmBackend::applyFixup for error reporting 
A number of backends (AArch64, MIPS, ARM) have been using
MCContext::reportError to report issues such as out-of-range fixup values in
their TgtAsmBackend. This is great, but because MCContext couldn't easily be
threaded through to the adjustFixupValue helper function from its usual
callsite (applyFixup), these backends ended up adding an MCContext* argument
and adding another call to applyFixup to processFixupValue. Adding an
MCContext parameter to applyFixup makes this unnecessary, and even better -
applyFixup can take a reference to MCContext rather than a potentially null
pointer.

Differential Revision: https://reviews.llvm.org/D30264

llvm-svn: 299529
 2017-04-05 10:16:14 +00:00
Krzysztof Parzyszek d04c9b999c [Hexagon] Remove unused variables 
Found by PVS-Studio. Fixes llvm.org/PR31676.

llvm-svn: 299262
 2017-03-31 21:03:59 +00:00
Colin LeMahieu ddebad956e [Hexagon] Updating inline saturate lanes for v62 version. 
llvm-svn: 297920
 2017-03-16 00:35:28 +00:00
Krzysztof Parzyszek 7a0981aa38 [Hexagon] Add -mhvx option to the Hexagon backend 
llvm-svn: 297393
 2017-03-09 17:05:11 +00:00
Simon Pilgrim ee6ef4d6dd Fix 'variable set but not used' warning when assertions are disabled. 
llvm-svn: 295585
 2017-02-19 00:03:46 +00:00
Benjamin Kramer efcf06f5f2 Move symbols from the global namespace into (anonymous) namespaces. NFC. 
llvm-svn: 294837
 2017-02-11 11:06:55 +00:00
Krzysztof Parzyszek f9015e62fd [Hexagon] Introduce Hexagon V62 
llvm-svn: 294805
 2017-02-10 23:46:45 +00:00
Krzysztof Parzyszek a72fad980c [Hexagon] Replace instruction definitions with auto-generated ones 
llvm-svn: 294753
 2017-02-10 15:33:13 +00:00
Krzysztof Parzyszek 5ea971ced5 [Hexagon] Update instruction types 
Remove TypeXTYPE, TypeALU32, TypeSYSTEM, TypeJR, and instead use their
architecture counterparts.

Patch by Colin LeMahieu.

llvm-svn: 294321
 2017-02-07 17:47:37 +00:00
Krzysztof Parzyszek 0605f3fddd [Hexagon] Address ASAN and UBSAN failures after r294226 
Reinstate r294256 with a fix.

llvm-svn: 294269
 2017-02-07 02:31:53 +00:00
Krzysztof Parzyszek becf0a362a Revert "[Hexagon] Address ASAN and UBSAN failures after r294226" 
This reverts commit r294256. It seems to be causing more problems instead
of solving them.

llvm-svn: 294259
 2017-02-06 23:30:17 +00:00
Krzysztof Parzyszek 35a7838954 [Hexagon] Address ASAN and UBSAN failures after r294226 
llvm-svn: 294256
 2017-02-06 23:11:32 +00:00
Krzysztof Parzyszek 8cdfe8ecf3 [Hexagon] Update MCTargetDesc 
Changes include:
- Updates to the instruction descriptor flags.
- Improvements to the packet shuffler and checker.
- Updates to the handling of certain relocations.
- Better handling of duplex instructions.

llvm-svn: 294226
 2017-02-06 19:35:46 +00:00
Krzysztof Parzyszek d0d42f0ec8 [Hexagon] Adding opExtentBits and opExtentAlign to GPrel instructions 
Patch by Colin LeMahieu.

llvm-svn: 293933
 2017-02-02 20:35:12 +00:00
Krzysztof Parzyszek e17b0bfb24 [Hexagon] Fix relocation kind for extended predicated calls 
Patch by Sid Manning.

llvm-svn: 293931
 2017-02-02 20:21:56 +00:00
Krzysztof Parzyszek 357b048666 [Hexagon] Remove A4_ext_* pseudo instructions 
Patch by Colin LeMahieu.

llvm-svn: 293929
 2017-02-02 19:58:22 +00:00
Krzysztof Parzyszek bc4dc9b4b9 [Hexagon] Emitting individual instructions without copying them 
Patch by Colin LeMahieu.

llvm-svn: 293899
 2017-02-02 15:32:26 +00:00
Krzysztof Parzyszek f65b8f14f4 [Hexagon] Rename TypeCOMPOUND to TypeCJ 
llvm-svn: 293894
 2017-02-02 15:03:30 +00:00
Eugene Zelenko b2ca1b3f37 [Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 
llvm-svn: 290925
 2017-01-04 02:02:05 +00:00
Eugene Zelenko 401f381533 [Hexagon] Other attempt to fix build with enabled asserts broken in 290024 (NFC). 
llvm-svn: 290028
 2016-12-17 01:29:35 +00:00
Eugene Zelenko 5015689b32 [Hexagon] Fix build with enabled asserts broken in 290024 (NFC). 
llvm-svn: 290027
 2016-12-17 01:17:18 +00:00
Eugene Zelenko 58655bbc60 [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 
llvm-svn: 290024
 2016-12-17 01:09:05 +00:00
Colin LeMahieu 8170754919 [Hexagon] Changing from literal numeric value to argument since #-1 will not parse when '-' is converted to a token. 
llvm-svn: 288634
 2016-12-05 04:29:00 +00:00
Daniel Sanders 72db2a390a Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86. 
Summary:
* ARM is omitted from this patch because this check appears to expose bugs in this target.
* Mips is omitted from this patch because this check either detects bugs or deliberate
  emission of instructions that don't satisfy their predicates. One deliberate
  use is the SYNC instruction where the version with an operand is correctly
  defined as requiring MIPS32 while the version without an operand is defined
  as an alias of 'SYNC 0' and requires MIPS2.
* X86 is omitted from this patch because it doesn't use the tablegen-erated
  MCCodeEmitter infrastructure.

Patches for ARM and Mips will follow.

Depends on D25617

Reviewers: tstellarAMD, jmolloy

Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits

Differential Revision: https://reviews.llvm.org/D25618

llvm-svn: 287439
 2016-11-19 13:05:44 +00:00
Simon Pilgrim 6ba672e542 Fix spelling mistakes in Hexagon target comments. NFC. 
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287248
 2016-11-17 19:21:20 +00:00
Chandler Carruth 30e0029904 Delete a dead store found by PVS-Studio. 
Quite sad we still aren't really using aggressive dead code warnings
from Clang that we could potentially use to catch this and so many other
things.

llvm-svn: 285936
 2016-11-03 17:01:38 +00:00
Mehdi Amini f42454b94b Move the global variables representing each Target behind accessor function 
This avoids "static initialization order fiasco"

Differential Revision: https://reviews.llvm.org/D25412

llvm-svn: 283702
 2016-10-09 23:00:34 +00:00
Colin LeMahieu c69f7ff6c0 [Hexagon] Adding change of flow max 1 (cofMax1) TS flag for marking this restriction rather than implying it from TypeJR. 
llvm-svn: 283665
 2016-10-08 17:18:51 +00:00
Colin LeMahieu 9694825d32 [Hexagon][NFC] Using documented instruction type name V4LDST instead of MEMOP. 
llvm-svn: 283582
 2016-10-07 19:11:28 +00:00
Colin LeMahieu 8ed1aee9dd [Hexagon] NFC Removing 'V4_' prefix from duplex instruction names. 
llvm-svn: 283514
 2016-10-07 00:15:07 +00:00
Mehdi Amini 36d33fc109 Use StringRef instead of raw pointers in MCAsmInfo/MCInstrInfo APIs (NFC) 
llvm-svn: 283018
 2016-10-01 06:46:33 +00:00
Krzysztof Parzyszek 0b8672269c [Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC 
llvm-svn: 279255
 2016-08-19 15:17:19 +00:00