Commit Graph

378818 Commits

Author SHA1 Message Date
Wouter van Oortmerssen 0d9b17d0ef [WebAssembly] fixed wasm64 data segment init exp not 64-bit
As defined in the spec:
https://github.com/WebAssembly/memory64/blob/master/proposals/memory64/Overview.md

Differential Revision: https://reviews.llvm.org/D95651
2021-02-01 11:32:50 -08:00
Michael Holman 8bfef78722 [ConstantHoisting] Fix bug where constant materialization could insert into EH pad
If the incoming block to a phi node is an EH pad, then we will
materialize into an EH pad, which is not supposed to happen. To fix
this, I added a check to see if incoming block of a phi node is an EH
pad before using it as the insertion point.

Differential Revision: https://reviews.llvm.org/D95019
2021-02-01 11:23:56 -08:00
Mark de Wever 35a57f39b5 [libc++][format] Add basic_format_parse_context.
Implements parts of:
- P0645 Text Formatting

Depends on D92214

Reviewed By: ldionne, curdeius, #libc

Differential Revision: https://reviews.llvm.org/D93166
2021-02-01 20:19:20 +01:00
Michael Jones c73c23f2a9 [libc][NFC] Add a death test API adaptation macro
Fuchsia's zxtest has a slightly different death test definition, and
this macro makes our death test API work on Fuchsia.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D95648
2021-02-01 19:19:04 +00:00
David Green 5b2626ea87 [ARM] Flatten identity shuffles through vqdmulh nodes
Given a shuffle(vqdmulh(shuffle, shuffle), we can flatter the shuffles
out if they become an identity mask. This can come up during lane
interleaving, when we do that better.

Differential Revision: https://reviews.llvm.org/D94034
2021-02-01 19:14:20 +00:00
Arthur Eubanks 7739f9ff97 [NewPM][Unswitch] Add option to disable -O3 non-trivial unswitching
Some benchmarks regress with non-trivial unswitching, so add an option
to opt-out of performing non-trivial unswitching while investigating.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D95796
2021-02-01 11:11:59 -08:00
Craig Topper c691fe14da [X86] Accept 64-bit GPRs for vextractps when using a register that requires EVEX.
This is consistent with the VEX version. It also fixes a sorting
issue in the matching table that caused the EVEX version to be
prioritized over VEX in intel syntax.

Fixes issue [2] from PR48991.
2021-02-01 11:01:32 -08:00
Haowei Wu 771b359654 [elfabi] Fix tests which failed on different timezones
This patch fixes elfabi tests on machines using a GMT+X timezone
settings.

Differential Revision: https://reviews.llvm.org/D95641
2021-02-01 10:58:55 -08:00
Melanie Blower 08d46d5059 [clang][PATCH] Fix bug 48848 assertion related to recoverFromMSUnqualifiedLookup
Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D95482
2021-02-01 10:56:47 -08:00
Sanjay Patel 0ce2920f17 [InstCombine] try to narrow min/max intrinsics with constant operand
The constant trunc/ext may not be the optimal pre-condition,
but I think that handles the common cases.

Example of Alive2 proof:
https://alive2.llvm.org/ce/z/sREeLC

This is another step towards canonicalizing to the intrinsics.
Narrowing was identified as source of potential regression for
abs(), so we need to handle this for min/max - see:
https://llvm.org/PR48816

If this is not enough, we could process intrinsics in
the trunc-driven matching in canEvaluateTruncated().
2021-02-01 13:44:13 -05:00
Sanjay Patel d23b68a879 [InstCombine] add tests for min/max with extend and constant operand; NFC 2021-02-01 13:44:13 -05:00
Michael Jones cb2e2d5068 [libc] Small adjustments to fenv tests
Some libcs define non-standard FE_* macros and include them in
FE_ALL_EXCEPT. This change adjusts the fenv tests so that the
non-standard FE_* macros do not interfere when compiled with
fenv.h from another libc.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D95650
2021-02-01 18:40:32 +00:00
Mircea Trofin c4d6f2707a [NFC] Disallow unused prefixes under clang/test/Driver
Differential Revision: https://reviews.llvm.org/D95660
2021-02-01 10:34:38 -08:00
Valentin Clement 3f46c209f1 [flang][directive] Enforce basic semantic check for all clauses
This patch is a follow up to D94821 to ensure the correct behavior of the
general directive structure checker.
This patch add the generation of the Enter function declaration for clauses in
the TableGen backend.
This helps to ensure each clauses declared in the TableGen file has at least
a basic check.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D95108
2021-02-01 13:33:30 -05:00
Simon Pilgrim e9514429a0 [X86][AVX] Add 'OK' tests cases for PR48877 2021-02-01 18:17:41 +00:00
Simon Pilgrim e640b209b2 [X86][SSE] LowerScalarImmediateShift - use APInt::getLowBitsSet for vXi8 ISD::SRL mask generation. NFCI.
Match what we do for ISD::SHL
2021-02-01 18:17:40 +00:00
Shilei Tian f0129cc35e [OpenMP] Disable tests if FileCheck is not available in in-tree building
FileCheck is required for OpenMP tests. The current detection can fail
if building OpenMP in-tree when user sets `LLVM_INSTALL_TOOLCHAIN_ONLY=ON`. As a
result, CMake will raise an error and the compilation will be broken. This patch
fixed the issue. When `FileCheck` is not a target, tests will just be skipped.

Reviewed By: jdoerfert, JonChesterfield

Differential Revision: https://reviews.llvm.org/D95689
2021-02-01 13:14:55 -05:00
Mark de Wever 3ffc53ba16 [libc++] Implements concept default_initializable.
Implements:
- LWG3149 DefaultConstructible should require default initialization

Implements parts of:
 - P0898R3 Standard Library Concepts
 - P1754 Rename concepts to standard_case for C++20, while we still can

Depends on D91986

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D93461
2021-02-01 19:13:24 +01:00
Jessica Paquette cf2be5e3bb [AArch64][GlobalISel] Emit G_ASSERT_ZEXT in assignValueToReg
When we have a zeroext parameter, emit G_ASSERT_ZEXT.

Add a check that we actually emit it.

This is a 0.1% code size win on CTMark/7zip and CTMark/consumer-typeset at -Os.

Differential Revision: https://reviews.llvm.org/D95567
2021-02-01 10:01:52 -08:00
Teresa Johnson 7f2e0879b5 [LTO] Move part of gold devirt test to v1.16 directory
Part of the gold test added in 1487747e99
relies on more recent fixes to gold that fix the plugin behavior with
--export-dynamic-symbol and --dynamic-list. Extract those parts of the
new test into a v1.16 test.
2021-02-01 09:53:11 -08:00
Craig Topper 72b31ad4b8 [RISCV] Add scalable vector support for floating point FMA instructions
A follow up patch will add support for commuting operands or
changing opcode to vfmacc and friends.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D95662
2021-02-01 09:52:43 -08:00
Craig Topper 6a3ab66625 [RISCV] Update comment text from D95774. NFC 2021-02-01 09:52:43 -08:00
Jessica Paquette 4809663334 [GlobalISel] Make sure G_ASSERT_ZEXT's src ends up with the same rc as dst
When replacing the dst reg with the src reg, we need to make sure that we
propagate the dst reg's register class through to the src.

Otherwise, we aren't meeting the requirements for G_ASSERT_ZEXT, and so the
verifier will fail.

Differential Revision: https://reviews.llvm.org/D95708
2021-02-01 09:46:35 -08:00
Craig Topper 1097ee61bf [RISCV] Optimize (srl (and X, 0xffff), C) -> (srli (slli X, 16), 16 + C).
Rather than materializing the 0xffff immediate for the AND, use
a shift left to remove the upper bits and then shift in zeros
from the right.

This pattern occurs when type legalizing an i16 right shift.

I've implemented this with custom selection code for a number of
reasons. I've limited this to the AND having a single use. We need
to compensate for SimplifyDemandedBits altering the AND mask. I'm
using *W opcodes on RV64. We may want to generlize this in the
future. For all these reason it seemed easiest to do it this way.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D95774
2021-02-01 09:37:55 -08:00
Florian Hahn ce190e4144
[ConstraintElimination] Negate IR condition directly.
Instead of using ConstraintSystem::negate when adding new constraints,
flip the condition in IR.

The main advantage is that EQ predicates can be represented by 2
constraints, which makes negating based on the constraint tricky. The IR
condition can easily negated.
2021-02-01 17:21:40 +00:00
peter klausler f0ffc690d5 [flang] Fix parsing of WRITE(I+J) with more accurate look-ahead
The parsing of I/O units uses look-ahead to discriminate between
keywords, variables and expressions as part of distinguishing internal
from external I/O.  The look-ahead was inaccurate for variables that
appear as the initial parts of expressions.

Differential Revision: https://reviews.llvm.org/D95743
2021-02-01 09:07:40 -08:00
Austin Kerbow e068e236c3 [AMDGPU] Fix release build after 0397dca0. 2021-02-01 08:55:14 -08:00
Austin Kerbow 0397dca021 [AMDGPU] Fix crash with sgpr spills to vgpr disabled
This would assert with amdgpu-spill-sgpr-to-vgpr disabled when trying to
spill the FP.

Fixes: SWDEV-262704

Reviewed By: RamNalamothu

Differential Revision: https://reviews.llvm.org/D95768
2021-02-01 08:35:25 -08:00
Erik Pilkington 5f3c4923e4 [compiler-rt] Fix AArch64 out-of-line atomics visibility on mach-o
This fixes an apparent oversight in D91156, where the symbol was defined
without the leading underscore, then the visibility was later declared with it.
rdar://73364185

Differential revision: https://reviews.llvm.org/D95639
2021-02-01 11:29:20 -05:00
Sam McCall 1eb7fd089e [clangd] Remove some obsolete options that are now always on
- always collect main-file refs when indexing
 - always build preambles asynchronously
 - always use dex for fast preamble index

Retire associated flags

Differential Revision: https://reviews.llvm.org/D95571
2021-02-01 17:24:03 +01:00
Joseph Huber fda4853998 [OpenMP] Fix seg fault in libomptarget when using Info with multiple threads
Summary:
One option for the LIBOMPTARGET_INFO environment variable is to print the current status of the device's data mappings. These are a shared resource among threads so this needs to be protected when using multiple streams.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95786
2021-02-01 11:21:57 -05:00
Sam McCall 8712df7a62 [clangd] references: decls of overrides of x are refs to x, not decls
This requires a second index query for refs to overrides, as the refs
call doesn't tell you which ref points at which symbol.

Differential Revision: https://reviews.llvm.org/D95451
2021-02-01 17:19:19 +01:00
Simon Pilgrim 657e769688 Revert rGce587529ad8b5 - "[APFloat] multiplySignificand - pass IEEEFloat as const reference. NFCI."
Breaks on some buildbots
2021-02-01 16:15:23 +00:00
Sander de Smalen bf294953e7 NFC: Migrate SimplifyCFG to work on InstructionCost
This patch migrates cost values and arithmetic to work on InstructionCost.
When the interfaces to TargetTransformInfo are changed, any InstructionCost
state will propagate naturally.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D95351
2021-02-01 16:14:05 +00:00
Sander de Smalen 880b64aa22 [SimplifyCFG] NFC: Rename static methods to clang-tidy standards.
This patch is a precursor to D95351, which changes the signature
of these methods.
2021-02-01 16:14:05 +00:00
David Green 5805521207 [ARM] Simplify VMOVRRD from extracts of buildvectors
Under the softfp calling convention, we are often left with
VMOVRRD(extract(bitcast(build_vector(a, b, c, d)))) for the return value
of the function. These can be simplified to a,b or c,d directly,
depending on the value of the extract.

Big endian is a little different because the bitcast switches the lanes
around, meaning we end up with b,a or d,c.

Differential Revision: https://reviews.llvm.org/D94989
2021-02-01 16:09:25 +00:00
Sam McCall ff4832dbff [clangd] Respect ReferencesParams.context.includeDeclarations
Unfortunately this treats overrides declarations as declarations, not as
references. I don't plan to land this until I have a fix for that issue.

Differential Revision: https://reviews.llvm.org/D95450
2021-02-01 17:07:02 +01:00
J-Y You 267b573b55 [TableGen] Fix anonymous record self-reference in foreach and multiclass
If we instantiate self-referenced anonymous records in foreach and
multiclass, the NAME value will point to incorrect record. It's because
anonymous name is resolved too early.

This patch adds AnonymousNameInit to represent an anonymous record name.
When instantiating an anonymous record, it will update the referred name.

Differential Revision: https://reviews.llvm.org/D95309
2021-02-01 10:59:07 -05:00
Simon Pilgrim ce587529ad [APFloat] multiplySignificand - pass IEEEFloat as const reference. NFCI.
Avoids unnecessary IEEEFloat copies.
2021-02-01 15:41:50 +00:00
Ruslan Arutyunyan c448ea948c [libc++] Fix for the Bug 41784
Add deleted volatile copy-assignment operator in the most derived atomic
to fix the Bug 41784. The root cause: there is an `operator=(T) volatile`
that has better match than the deleted copy-assignment operator of the base
class when `this` is `volatile`. The compiler sees that right operand of
the assignment operator can be converted to `T` and chooses that path
without taking into account the deleted copy-assignment operator of the
base class.

The current behavior on libstdc++ is different from what we have in libc++.
On the same test compilation fails with libstdc++. Proof: https://godbolt.org/z/nebPYd
(everything is the same except the -stdlib option).

I choose the way with explicit definition of copy-assignment for atomic
in the most derived class. But probably we can fix that by moving
`operator=(T)` overloads to the base class from both specializations.
At first glance, it shouldn't break anything.

Differential Revision: https://reviews.llvm.org/D90968
2021-02-01 10:14:22 -05:00
Haojian Wu 78c22fbce9 [clangd] Don't rely on builtin headers for document-link.test.
This test seems to be failing at HEAD.

Reviewed By: kadircet, sammccall

Differential Revision: https://reviews.llvm.org/D95670
2021-02-01 15:36:34 +01:00
LLVM GN Syncbot 313a36130f [gn build] Port b63cd4db91 2021-02-01 14:24:45 +00:00
Sam McCall b63cd4db91 [clangd] Rename: merge index/AST refs path-insensitively where needed
If you have c:\foo open, and C:\foo indexed (case difference) then these
need to be considered the same file. Otherwise we emit edits to both,
and editors do... something that isn't pretty.

Maybe more centralized normalization is called for, but it's not trivial
to do this while also being case-preserving. see
https://github.com/clangd/clangd/issues/108

Fixes https://github.com/clangd/clangd/issues/665

Differential Revision: https://reviews.llvm.org/D95759
2021-02-01 15:15:21 +01:00
Kerry McLaughlin 9b4fcfaa9e [SVE][CodeGen] Remove performMaskedGatherScatterCombine
The AArch64 DAG combine added by D90945 & D91433 extends the index
of a scalable masked gather or scatter to i32 if necessary.

This patch removes the combine and instead adds shouldExtendGSIndex, which
is used by visitMaskedGather/Scatter in SelectionDAGBuilder to query whether
the index should be extended before calling getMaskedGather/Scatter.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D94525
2021-02-01 14:10:00 +00:00
Florian Hahn f1e8136115
[SCEV] Bail out if URem operand cannot be zero-extended.
In some cases, LHS is larger than the target expression type. Bail out
in that case for now, to avoid crashing
2021-02-01 13:50:54 +00:00
Jeroen Dobbelaere 2556b413a7 Revert "[Verifier] enable llvm.experimental.noalias.scope.decl dominance check."
the 'clang-with-lto-ubuntu' buildbot triggers the assertion.

This reverts commit b43c395e60.
2021-02-01 14:38:33 +01:00
Florian Hahn 972212d29c
[ConstraintElimination] Add tests for signed predicates.
Add test coverage for conditions with signed predicates.
2021-02-01 13:23:05 +00:00
Med Ismail Bennani ee562e2315 [lldb/test] Skip `SBTarget::IsLoaded` test on windows (NFC)
This patch skips the test for the SBTarget::IsLoaded method on windows
since the logic is different.

Differential Revision: https://reviews.llvm.org/D95686

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2021-02-01 14:09:50 +01:00
Tim Northover c2b322fc19 GlobalISel: check type size before getZExtValue()ing it.
Otherwise getZExtValue() asserts.
2021-02-01 12:43:33 +00:00
Cullen Rhodes 8cda227432 [LV] Fix crash when computing max VF too early
D90687 introduced a crash:

  llvm::LoopVectorizationCostModel::computeMaxVF(llvm::ElementCount, unsigned int):
    Assertion `WideningDecisions.empty() && Uniforms.empty() && Scalars.empty() &&
    "No decisions should have been taken at this point"' failed.

when compiling the following C code:

  typedef struct {
  char a;
  } b;

  b *c;
  int d, e;

  int f() {
    int g = 0;
    for (; d; d++) {
      e = 0;
      for (; e < c[d].a; e++)
        g++;
    }
    return g;
  }

with:

  clang -Os -target hexagon -mhvx -fvectorize -mv67 testcase.c -S -o -

This occurred since prior to D90687 computeFeasibleMaxVF would only be
called in computeMaxVF when a scalar epilogue was allowed, but now it's
always called. This causes the assert above since computeFeasibleMaxVF
collects all viable VFs larger than the default MaxVF, and for each VF
calculates the register usage which results in analysis being done the
assert above guards against. This can occur in computeFeasibleMaxVF if
TTI.shouldMaximizeVectorBandwidth and this target hook is implemented in
the hexagon backend to always return true.

Reported by @iajbar.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D94869
2021-02-01 12:14:59 +00:00