Chris Lattner
0cd9960fe7
factor a bunch of code out of LowerCCCCallTo into a new LowerCallResult
...
function. This function now uses GetRetValueLocs to determine *where*
the result values are located and concerns itself with *how* to pull the
values out.
llvm-svn: 34586
2007-02-25 08:59:22 +00:00
Chris Lattner
3c76309a5b
move some code around, pass in calling conv, even though it is unused
...
llvm-svn: 34585
2007-02-25 08:29:00 +00:00
Chris Lattner
dfda38f7dc
simplify result value lowering by splitting the selection of *where* to return
...
registers out from the logic of *how* to return them.
This changes X86-64 to mark EAX live out when returning a 32-bit value,
where before it marked RAX liveout.
llvm-svn: 34582
2007-02-25 08:15:11 +00:00
Chris Lattner
d6b853ad1b
make void-return not a special case
...
llvm-svn: 34579
2007-02-25 07:18:38 +00:00
Chris Lattner
35a08551a5
eliminate a bunch more temporary vectors from X86 lowering.
...
llvm-svn: 34578
2007-02-25 07:10:00 +00:00
Chris Lattner
e56fef9b51
eliminate temporary vectors created during X86 lowering.
...
llvm-svn: 34577
2007-02-25 06:40:16 +00:00
Chris Lattner
84141d4e99
remove std::vector's in RET lowering.
...
llvm-svn: 34576
2007-02-25 06:21:57 +00:00
Jim Laskey
e0008e23cf
Simplify lowering and selection of exception ops.
...
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
Jim Laskey
3796abea0f
Support to provide exception and selector registers.
...
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
Evan Cheng
84a041eb98
ELF / PIC requires GOT be in the EBX register during calls via PLT GOT pointer.
...
Add implicit uses of EBX to calls to ensure liveintervalanalysis does not treat
the GOT in EBX move as dead upon definition.
This should fix PR1207.
llvm-svn: 34470
2007-02-21 21:18:14 +00:00
Anton Korobeynikov
1b4e6015b4
Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
...
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144
llvm-svn: 33752
2007-02-01 08:39:52 +00:00
Nate Begeman
eda5997cc8
Finish off bug 680, allowing targets to custom lower frame and return
...
address nodes.
llvm-svn: 33636
2007-01-29 22:58:52 +00:00
Nick Lewycky
0c49722b36
Fix compile error "jump to case label crosses initialization".
...
What compiler are people using that accepts this code?
llvm-svn: 33603
2007-01-28 15:39:16 +00:00
Anton Korobeynikov
037c867b54
Propagate changes from my local tree. This patch includes:
...
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
llvm-svn: 33597
2007-01-28 13:31:35 +00:00
Jim Laskey
f9e5445ed4
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Evan Cheng
1281dc32ef
Linux GOT indirect reference is only necessary in PIC mode.
...
llvm-svn: 33441
2007-01-22 21:34:25 +00:00
Anton Korobeynikov
a0554d90e8
* PIC codegen for X86/Linux has been implemented
...
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)
llvm-svn: 33136
2007-01-12 19:20:47 +00:00
Evan Cheng
82241c86e9
- FCOPYSIGN custom lowering bug. Clear the sign bit of operand 0 first before
...
or'ing in the sign bit of operand 1.
- Tweaking: rather than left shift the sign bit, fp_extend operand 1 first
before taking its sign bit if its type is smaller than that of operand 0.
llvm-svn: 32932
2007-01-05 21:37:56 +00:00
Evan Cheng
8c7094a770
Typo
...
llvm-svn: 32902
2007-01-05 08:32:24 +00:00
Evan Cheng
4363e884c0
With SSE2, expand FCOPYSIGN to a series of SSE bitwise operations.
...
llvm-svn: 32900
2007-01-05 07:55:56 +00:00
Reid Spencer
e87b5e9825
Fix a comment that referred to the now defunct ubyte type.
...
llvm-svn: 32840
2007-01-03 17:24:59 +00:00
Anton Korobeynikov
4efbbc963f
Really big cleanup.
...
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin
llvm-svn: 32833
2007-01-03 11:43:14 +00:00
Reid Spencer
e63b6518fa
For PR950:
...
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
type of an function parameter was used to determine whether it should
be sign extended or zero extended before the call. This information is
now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
the parameter attribute information. Although it would have been
convenient to pass in the FunctionType itself, there isn't always one
present in the caller. Consequently, a signedness indication for the
result type and for each parameter was provided for in the interface
to this method. All implementations were changed to make the adjustment
necessary.
llvm-svn: 32788
2006-12-31 05:55:36 +00:00
Anton Korobeynikov
430e68a1b9
Refactored JIT codegen for mingw32. Now we're using standart relocation
...
type for distinguish JIT & non-JIT instead of "dirty" hacks :)
llvm-svn: 32745
2006-12-22 22:29:05 +00:00
Evan Cheng
735fcf74d8
f64 <-> i64 bit_convert using movq in 64-bit mode.
...
llvm-svn: 32587
2006-12-14 21:55:39 +00:00
Anton Korobeynikov
3b7c257cae
Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
...
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.
llvm-svn: 32415
2006-12-10 23:12:42 +00:00
Chris Lattner
c20b7e878a
If we have ScalarSSE, we can select bitconvert into single instructions.
...
This compiles bitcast.ll:test3/test4 into:
_test3:
movd %xmm0, %eax
ret
_test4:
movd %edi, %xmm0
ret
llvm-svn: 32230
2006-12-05 18:45:06 +00:00
Chris Lattner
55c17f9177
Fix PR1033 and CodeGen/X86/bitcast.ll, by expanding bitcast to a load/store pair.
...
This could be better, readme entry pending.
llvm-svn: 32228
2006-12-05 18:22:22 +00:00
Chris Lattner
a16201c672
Fix typo noticed by Lauro Ramos Venancio, thanks!
...
llvm-svn: 32223
2006-12-05 17:29:40 +00:00
Evan Cheng
62cdc3f011
- Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit
...
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.
llvm-svn: 32215
2006-12-05 04:01:03 +00:00
Chris Lattner
d139ddd2e6
Add support for 64-bit 'r' constraint. Patch by by Rafael ~Avila de EspÃndol!
...
This fixes PR1029 and Regression/CodeGen/X86/x86-64-asm.ll
llvm-svn: 32206
2006-12-04 22:38:21 +00:00
Evan Cheng
ae1cd75af7
- Use a different wrapper node for RIP-relative GV, etc.
...
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.
llvm-svn: 32046
2006-11-30 21:55:46 +00:00
Evan Cheng
7a9238c84d
In PIC mode, GV not requiring an extra load can be used as address immediate.
...
llvm-svn: 32028
2006-11-29 23:48:14 +00:00
Evan Cheng
0b1692216d
Fix for PR1018 - Better support for X86-64 Linux in small code model.
...
llvm-svn: 32026
2006-11-29 23:19:46 +00:00
Evan Cheng
28a9e9b230
Custom lower READCYCLECOUNTER for x86-64.
...
llvm-svn: 32017
2006-11-29 08:28:13 +00:00
Evan Cheng
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Anton Korobeynikov
5b96cdebb0
Refactored *GVRequiresExtraLoad() to Subtarget method.
...
llvm-svn: 31887
2006-11-21 00:01:06 +00:00
Anton Korobeynikov
37d080b11d
We should perform extra load for dllimported calls
...
llvm-svn: 31874
2006-11-20 10:46:14 +00:00
Evan Cheng
dbd3d294e6
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Evan Cheng
db04c958a5
Add implicit use / def operands to created MI's.
...
llvm-svn: 31676
2006-11-11 10:21:44 +00:00
Evan Cheng
49683ba236
Don't dag combine floating point select to max and min intrinsics. Those
...
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.
This fixes PR996.
llvm-svn: 31645
2006-11-10 21:43:37 +00:00
Anton Korobeynikov
b9c91c265c
Fixing PR990: http://llvm.org/PR990 .
...
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).
llvm-svn: 31613
2006-11-10 00:48:11 +00:00
Evan Cheng
922e191116
Fixed a bug which causes x86 be to incorrectly match
...
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.
Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>
llvm-svn: 31519
2006-11-07 22:14:24 +00:00
Reid Spencer
de46e48420
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
llvm-svn: 31380
2006-11-02 20:25:50 +00:00
Chris Lattner
44daa50bed
allow the address of a global to be used with the "i" constraint when in
...
-static mode. This implements PR882.
llvm-svn: 31326
2006-10-31 20:13:11 +00:00
Chris Lattner
f6a6966cd2
handle "st" as "st(0)"
...
llvm-svn: 31320
2006-10-31 19:42:44 +00:00
Anton Korobeynikov
aa4c0f9374
1. Clean up code due to changes in SwitchTo*Section(2)
...
2. Added partial debug support for mingw\cygwin targets (the same as
Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
for storing debug info by default, thus many (runtime) libraries has
this information included. These formats shouldn't be mixed in one binary
('stabs' & 'DWARF'), otherwise binutils tools will be confused.
llvm-svn: 31311
2006-10-31 08:31:24 +00:00
Reid Spencer
b51b5c0b1f
Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4
...
generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.
llvm-svn: 31299
2006-10-30 22:32:30 +00:00
Evan Cheng
0d41d19427
All targets expand BR_JT for now.
...
llvm-svn: 31294
2006-10-30 08:02:39 +00:00
Evan Cheng
e056dd5928
Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value.
...
llvm-svn: 31228
2006-10-27 21:08:32 +00:00
Evan Cheng
bf3df77758
Fix for PR968: expand vector sdiv, udiv, srem, urem.
...
llvm-svn: 31220
2006-10-27 18:49:08 +00:00
Evan Cheng
c415c5be49
During vector shuffle lowering, we sometimes commute a vector shuffle to try
...
to match MOVL (movss, movsd, etc.). Don't forget to commute it back and try
unpck* and shufp* if that doesn't pan out.
llvm-svn: 31186
2006-10-25 21:49:50 +00:00
Evan Cheng
798b306311
Remove -disable-x86-shuffle-opti
...
llvm-svn: 31183
2006-10-25 20:48:19 +00:00
Chris Lattner
c0fb567e23
Implement branch analysis/xform hooks required by the branch folding pass.
...
llvm-svn: 31065
2006-10-20 17:42:20 +00:00
Evan Cheng
949bcc94ea
Avoid getting into an infinite loop when -disable-x86-shuffle-opti is specified.
...
llvm-svn: 30974
2006-10-16 06:36:00 +00:00
Evan Cheng
ab51cf2e78
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
...
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Evan Cheng
694810c227
Some X86ISD::CMP were created with wrong ValueType's.
...
llvm-svn: 30913
2006-10-12 19:12:56 +00:00
Evan Cheng
e646abb7b6
Don't convert to MOVLP if using shufps etc. may allow load folding.
...
llvm-svn: 30847
2006-10-09 21:39:25 +00:00
Evan Cheng
e71fe34d75
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
...
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
Evan Cheng
df9ac47e5e
Make use of getStore().
...
llvm-svn: 30759
2006-10-05 23:01:46 +00:00
Chris Lattner
f2ef243580
Lower some min/max idioms to minss/maxss when unsafe fp math is enabled.
...
llvm-svn: 30748
2006-10-05 04:11:26 +00:00
Evan Cheng
8c5766ef3f
Added option -disable-x86-shuffle-opti to disable X86 specific vector shuffle optimizations.
...
llvm-svn: 30723
2006-10-04 18:33:38 +00:00
Chris Lattner
9259b1efb6
Pattern match min/max nodes when we have sse. This implements
...
CodeGen/X86/scalar_sse_minmax.ll
llvm-svn: 30719
2006-10-04 06:57:07 +00:00
Evan Cheng
5d9fd977d3
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
...
extra operand to LOADX to specify the exact value extension type.
llvm-svn: 30714
2006-10-04 00:56:09 +00:00
Chris Lattner
f598d73142
Fix PR933 and CodeGen/X86/2006-10-02-BoolRetCrash.ll
...
llvm-svn: 30703
2006-10-03 17:18:42 +00:00
Chris Lattner
fc36039f86
silence warnings in release build
...
llvm-svn: 30631
2006-09-27 18:29:38 +00:00
Chris Lattner
104aa5dbc1
Various random and minor code cleanups.
...
llvm-svn: 30608
2006-09-26 03:57:53 +00:00
Nick Lewycky
c68bbef874
Fix compile error.
...
llvm-svn: 30553
2006-09-21 02:08:31 +00:00
Anton Korobeynikov
3c5b3df6a0
Adding codegeneration for StdCall & FastCall calling conventions
...
llvm-svn: 30549
2006-09-20 22:03:51 +00:00
Anton Korobeynikov
6f7072c66a
Added some eye-candy for Subtarget type checking
...
Added X86 StdCall & FastCall calling conventions. Codegen will follow.
llvm-svn: 30446
2006-09-17 20:25:45 +00:00
Anton Korobeynikov
0ab01ff6e2
Small fixes for supporting dll* linkage types
...
llvm-svn: 30441
2006-09-17 13:06:18 +00:00
Anton Korobeynikov
d61d39ec53
Adding dllimport, dllexport and external weak linkage types.
...
DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.
llvm-svn: 30374
2006-09-14 18:23:27 +00:00
Chris Lattner
971e33930d
Turn X < 0 -> TEST X,X js
...
llvm-svn: 30294
2006-09-13 17:04:54 +00:00
Chris Lattner
0c9ae46c5f
The sense of this branch was inverted :(
...
llvm-svn: 30293
2006-09-13 16:56:12 +00:00
Chris Lattner
7a627676be
Compile X > -1 -> text X,X; js dest
...
This implements CodeGen/X86/jump_sign.ll.
llvm-svn: 30283
2006-09-13 03:22:10 +00:00
Evan Cheng
9a083a4121
Reflects MachineConstantPoolEntry changes.
...
llvm-svn: 30279
2006-09-12 21:04:05 +00:00
Evan Cheng
4259a0f654
X86ISD::CMP now produces a chain as well as a flag. Make that the chain
...
operand of a conditional branch to allow load folding into CMP / TEST
instructions.
llvm-svn: 30241
2006-09-11 02:19:56 +00:00
Evan Cheng
11b0a5dbd4
Committing X86-64 support.
...
llvm-svn: 30177
2006-09-08 06:48:29 +00:00
Evan Cheng
89c5d04b9b
- Identify a vector_shuffle that can be turned into an undef, e.g.
...
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
optimal code by failing to identify MOVL (move to lowest element of a
vector).
llvm-svn: 30171
2006-09-08 01:50:06 +00:00
Chris Lattner
dc4ff5311f
Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns
...
using test, which provides nice simplifications like:
- movl %edi, %ecx
- andl $2, %ecx
- cmpl $0, %ecx
+ testl $2, %edi
je LBB1_11 #cond_next90
There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.
llvm-svn: 30156
2006-09-07 20:33:45 +00:00
Chris Lattner
162f2d5d4c
Revert this patch, the front-end has been fixed to make it unneccesary.
...
llvm-svn: 29752
2006-08-17 18:43:24 +00:00
Chris Lattner
dfb3f0591d
'g' is handled by the front-end.
...
llvm-svn: 29751
2006-08-17 18:12:28 +00:00
Andrew Lenharth
4a063c5ffb
Fix handling of 'g'. Closes 883
...
llvm-svn: 29750
2006-08-17 17:50:12 +00:00
Andrew Lenharth
1c3210d08d
Add the 'c' constraint as needed by the linux kernel
...
llvm-svn: 29747
2006-08-17 16:07:50 +00:00
Andrew Lenharth
fc60fb974c
Add support for S and D constraints, as needed to compile the linux kernel.
...
llvm-svn: 29746
2006-08-17 15:35:43 +00:00
Chris Lattner
ed728e8dc9
Eliminate use of getNode that takes a vector.
...
llvm-svn: 29614
2006-08-11 17:38:39 +00:00
Evan Cheng
bd1c5a8fb8
Match tablegen changes.
...
llvm-svn: 29604
2006-08-11 09:08:15 +00:00
Evan Cheng
5c68bba085
Convert more calls of getNode() that takes a vector to pass in the start of an array.
...
llvm-svn: 29601
2006-08-11 07:35:45 +00:00
Chris Lattner
c24a1d3093
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
...
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
llvm-svn: 29566
2006-08-08 02:23:42 +00:00
Chris Lattner
524129dd64
Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll.
...
The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.
llvm-svn: 29420
2006-07-31 23:26:50 +00:00
Chris Lattner
9e56e5c003
Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
...
llvm-svn: 29307
2006-07-26 21:12:04 +00:00
Evan Cheng
74065bedf2
This opt is now handled in DAG combine.
...
llvm-svn: 29243
2006-07-21 08:26:46 +00:00
Evan Cheng
4cf0238720
A splat of a vector constant of all zero or all one is the vector constant.
...
llvm-svn: 29234
2006-07-20 23:09:47 +00:00
Chris Lattner
c8db10725b
Add information preventing several register class constraints from working.
...
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
llvm-svn: 29118
2006-07-12 16:59:49 +00:00
Chris Lattner
298ef37e02
Implement the inline asm 'A' constraint. This implements PR825 and
...
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
llvm-svn: 29101
2006-07-11 02:54:03 +00:00
Evan Cheng
79cf9a5342
Fixed stack objects do not specify alignments, but their offsets are known.
...
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.
llvm-svn: 29090
2006-07-10 21:37:44 +00:00
Chris Lattner
9aabc1e16f
Mark internal function static
...
llvm-svn: 29085
2006-07-10 19:53:12 +00:00
Evan Cheng
5987cfb7b1
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
...
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
llvm-svn: 29042
2006-07-07 08:33:52 +00:00
Evan Cheng
0261242aa6
Reorg. No functionality change.
...
llvm-svn: 28999
2006-07-05 22:17:51 +00:00
Evan Cheng
38c5aee959
Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary.
...
llvm-svn: 28910
2006-06-24 08:36:10 +00:00
Evan Cheng
de7156f12c
Type of vector extract / insert index operand should be iPTR.
...
llvm-svn: 28796
2006-06-15 08:14:54 +00:00
Evan Cheng
ca25486603
Add argument registers to the end of call operand list (partial fix).
...
llvm-svn: 28783
2006-06-14 18:17:40 +00:00
Evan Cheng
0e14a56d35
Minor compilation speed improvement.
...
llvm-svn: 28736
2006-06-09 06:24:42 +00:00
Evan Cheng
dc614c193e
Added X86FunctionInfo subclass of MachineFunction to record whether the
...
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.
llvm-svn: 28703
2006-06-06 23:30:24 +00:00
Evan Cheng
2b2c1be49c
Typos
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llvm-svn: 28617
2006-06-01 05:53:27 +00:00
Evan Cheng
2489ccdd90
Remove a warning
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llvm-svn: 28607
2006-06-01 00:30:39 +00:00
Evan Cheng
550cb663e8
Remove dead code.
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llvm-svn: 28581
2006-05-31 00:50:42 +00:00
Evan Cheng
a3add0fea8
Change RET node to include signness information of the return values. i.e.
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RET chain, value1, sign1, value2, sign2, ...
llvm-svn: 28510
2006-05-26 23:10:12 +00:00
Evan Cheng
b92f418408
Vector argument must be passed in memory location aligned on 16-byte boundary.
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llvm-svn: 28505
2006-05-26 20:37:47 +00:00
Evan Cheng
bfb5ea6875
Mac OS X ABI document lied. The first four XMM registers are used to pass
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vector arguments, not three.
llvm-svn: 28504
2006-05-26 19:22:06 +00:00
Evan Cheng
a01e799927
Minor update to make the code more clear
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llvm-svn: 28499
2006-05-26 18:39:59 +00:00
Evan Cheng
cbfb3d07e0
Update more comments.
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llvm-svn: 28498
2006-05-26 18:37:16 +00:00
Evan Cheng
763f9b00f0
Fix some comments.
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llvm-svn: 28497
2006-05-26 18:25:43 +00:00
Evan Cheng
83dc51d7ff
No need to handle illegal types.
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llvm-svn: 28496
2006-05-26 18:22:49 +00:00
Evan Cheng
8aca43e8da
Consistency
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llvm-svn: 28488
2006-05-25 23:31:23 +00:00
Evan Cheng
0421aca87a
Some clean up.
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llvm-svn: 28483
2006-05-25 22:38:31 +00:00
Evan Cheng
29f805ec65
Remove some dead code.
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llvm-svn: 28481
2006-05-25 22:25:52 +00:00
Evan Cheng
5ee96893ae
Build breakage.
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llvm-svn: 28475
2006-05-25 18:56:34 +00:00
Evan Cheng
2a33094284
Switch X86 over to a call-selection model where the lowering code creates
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the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.
llvm-svn: 28463
2006-05-25 00:59:30 +00:00
Chris Lattner
a58f559848
Fix file header comment
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llvm-svn: 28441
2006-05-23 23:20:42 +00:00
Evan Cheng
7068a93cae
Better way to check for vararg.
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llvm-svn: 28440
2006-05-23 21:08:24 +00:00
Evan Cheng
17e734f0a6
Remove PreprocessCCCArguments and PreprocessFastCCArguments now that
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FORMAL_ARGUMENTS nodes include a token operand.
llvm-svn: 28439
2006-05-23 21:06:34 +00:00
Chris Lattner
8be5be817c
Implement an annoying part of the Darwin/X86 abi: the callee of a struct
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return argument pops the hidden struct pointer if present, not the caller.
For example, in this testcase:
struct X { int D, E, F, G; };
struct X bar() {
struct X a;
a.D = 0;
a.E = 1;
a.F = 2;
a.G = 3;
return a;
}
void foo(struct X *P) {
*P = bar();
}
We used to emit:
_foo:
subl $28, %esp
movl 32(%esp), %eax
movl %eax, (%esp)
call _bar
addl $28, %esp
ret
_bar:
movl 4(%esp), %eax
movl $0, (%eax)
movl $1, 4(%eax)
movl $2, 8(%eax)
movl $3, 12(%eax)
ret
This is correct on Linux/X86 but not Darwin/X86. With this patch, we now
emit:
_foo:
subl $28, %esp
movl 32(%esp), %eax
movl %eax, (%esp)
call _bar
*** addl $24, %esp
ret
_bar:
movl 4(%esp), %eax
movl $0, (%eax)
movl $1, 4(%eax)
movl $2, 8(%eax)
movl $3, 12(%eax)
*** ret $4
For the record, GCC emits (which is functionally equivalent to our new code):
_bar:
movl 4(%esp), %eax
movl $3, 12(%eax)
movl $2, 8(%eax)
movl $1, 4(%eax)
movl $0, (%eax)
ret $4
_foo:
pushl %esi
subl $40, %esp
movl 48(%esp), %esi
leal 16(%esp), %eax
movl %eax, (%esp)
call _bar
subl $4, %esp
movl 16(%esp), %eax
movl %eax, (%esi)
movl 20(%esp), %eax
movl %eax, 4(%esi)
movl 24(%esp), %eax
movl %eax, 8(%esi)
movl 28(%esp), %eax
movl %eax, 12(%esi)
addl $40, %esp
popl %esi
ret
This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729. The CBE still needs to
be updated.
llvm-svn: 28438
2006-05-23 18:50:38 +00:00
Chris Lattner
01dd6df5f3
CSRet allows varargs
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llvm-svn: 28409
2006-05-19 21:34:04 +00:00
Evan Cheng
8c6b234ce8
Should pass by reference.
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llvm-svn: 28357
2006-05-17 19:07:40 +00:00
Chris Lattner
c7df70db57
Implement the custom lowering hook right, returning values for all of the
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arguments at once.
llvm-svn: 28327
2006-05-16 17:14:26 +00:00
Chris Lattner
7b8b8bbbf9
Fix a bug I introduced yesterday, which broke functions with *no* arguments.
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llvm-svn: 28326
2006-05-16 17:08:35 +00:00
Evan Cheng
9fee442e63
X86 integer register classes naming changes. Make them consistent with FP, vector classes.
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llvm-svn: 28324
2006-05-16 07:21:53 +00:00
Chris Lattner
3d82699605
Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend,
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it doesn't currently use/maintain the chain properly. Also, make the
X86ISelLowering.cpp file 80-col clean.
llvm-svn: 28320
2006-05-16 06:45:34 +00:00
Chris Lattner
22f95b74ba
Dead variable
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llvm-svn: 28265
2006-05-12 21:12:22 +00:00
Chris Lattner
6d4a2dc4ad
Teach the X86 backend about non-i32 inline asm register classes.
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llvm-svn: 28139
2006-05-06 00:29:37 +00:00
Chris Lattner
44a73e9fa5
Teach the code generator to use cvtss2sd as extload f32 -> f64
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llvm-svn: 28131
2006-05-05 21:35:18 +00:00
Owen Anderson
20a631fde7
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
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This fixes PR 759.
llvm-svn: 28074
2006-05-03 01:29:57 +00:00
Evan Cheng
88decded82
Initial caller side support (for CCC only, not FastCC) of 128-bit vector
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passing by value.
llvm-svn: 28015
2006-04-28 21:29:37 +00:00
Evan Cheng
3cd4362ade
Implement four-wide shuffle with 2 shufps if no more than two elements come
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from each vector. e.g.
shuffle(G1, G2, 7, 1, 5, 2)
==>
movaps _G2, %xmm0
shufps $151, _G1, %xmm0
shufps $216, %xmm0, %xmm0
llvm-svn: 28011
2006-04-28 07:03:38 +00:00
Evan Cheng
d43c5c6046
TargetLowering::LowerArguments should return a VBIT_CONVERT of
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FORMAL_ARGUMENTS SDOperand in the return result vector.
llvm-svn: 28009
2006-04-28 05:25:15 +00:00
Evan Cheng
f4f3f0d25f
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
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for now.
Patch contributed by Alexander Friedman.
llvm-svn: 27994
2006-04-27 08:40:39 +00:00
Evan Cheng
89001ad729
Support for passing 128-bit vector arguments via XMM registers.
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llvm-svn: 27992
2006-04-27 08:31:10 +00:00
Evan Cheng
a0374e1bed
Oops
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llvm-svn: 27989
2006-04-27 05:44:50 +00:00
Evan Cheng
24eb3f4765
Bug fix: not updating NumIntRegs.
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llvm-svn: 27988
2006-04-27 05:35:28 +00:00
Evan Cheng
48940d16b2
- Clean up formal argument lowering code. Prepare for vector pass by value work.
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- Fixed vararg support.
llvm-svn: 27985
2006-04-27 01:32:22 +00:00
Evan Cheng
1c39903297
Fix fastcc failures.
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llvm-svn: 27980
2006-04-26 18:21:31 +00:00
Evan Cheng
e0bcfbe811
Switching over FORMAL_ARGUMENTS mechanism to lower call arguments.
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llvm-svn: 27975
2006-04-26 01:20:17 +00:00
Evan Cheng
a9467aab0a
Separate LowerOperation() into multiple functions, one per opcode.
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llvm-svn: 27972
2006-04-25 20:13:52 +00:00
Evan Cheng
5c2bfb069e
Special case handling two wide build_vector(0, x).
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llvm-svn: 27961
2006-04-24 22:58:52 +00:00
Evan Cheng
b0461080e4
A little bit more build_vector enhancement for v8i16 cases.
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llvm-svn: 27959
2006-04-24 18:01:45 +00:00
Evan Cheng
b4f31dd1a8
MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2
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llvm-svn: 27953
2006-04-23 06:35:19 +00:00
Nate Begeman
4ca2ea5b43
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
llvm-svn: 27947
2006-04-22 18:53:45 +00:00
Evan Cheng
e728efdfce
Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef.
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llvm-svn: 27946
2006-04-22 08:34:05 +00:00
Evan Cheng
16ef94f4e8
Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector.
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llvm-svn: 27945
2006-04-22 06:21:46 +00:00