5218176bc6
Fix typo in run line.
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llvm-svn: 86984
2009-11-12 12:35:27 +00:00
5d85a46f76
RegScavenger::enterBasicBlock should always reset register state.
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llvm-svn: 86972
2009-11-12 07:49:10 +00:00
85a9f430e9
- Teach LSR to avoid changing cmp iv stride if it will create an immediate that
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cannot be folded into target cmp instruction.
- Avoid a phase ordering issue where early cmp optimization would prevent the
later count-to-zero optimization.
- Add missing checks which could cause LSR to reuse stride that does not have
users.
- Fix a bug in count-to-zero optimization code which failed to find the pre-inc
iv's phi node.
- Remove, tighten, loosen some incorrect checks disable valid transformations.
- Quite a bit of code clean up.
llvm-svn: 86969
2009-11-12 07:35:05 +00:00
64b5d0f468
Add support for tail duplication to BranchFolding, and extend
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tail merging support to handle more cases.
- Recognize several cases where tail merging is beneficial even when
the tail size is smaller than the generic threshold.
- Make use of MachineInstrDesc::isBarrier to help detect
non-fallthrough blocks.
- Check for and avoid disrupting fall-through edges in more cases.
llvm-svn: 86871
2009-11-11 19:48:59 +00:00
47e3bcf180
Update test
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llvm-svn: 86614
2009-11-09 22:59:01 +00:00
d7cf55cd0e
Use Unified Assembly Syntax for the ARM backend.
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llvm-svn: 86494
2009-11-09 00:11:35 +00:00
a8e8a7c976
Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
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llvm-svn: 86330
2009-11-07 04:04:34 +00:00
7ff831962a
- Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
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except it doesn't care if the definitions' virtual registers differ. This is
used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
Since pc relative constantpool entries are always different, this requires it
it check if the values can actually the same.
llvm-svn: 86328
2009-11-07 03:52:02 +00:00
207b246650
- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
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load of a GV from constantpool and then add pc. It allows the code sequence to
be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
to this pass. This is done before post regalloc scheduling to allow the
scheduler to proper schedule these instructions. It also allow them to be
if-converted and shrunk by later passes.
llvm-svn: 86304
2009-11-06 23:52:48 +00:00
db42ca663b
Fix a broken test.
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llvm-svn: 86298
2009-11-06 23:06:42 +00:00
8f4e3d99c9
Fix test.
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llvm-svn: 85986
2009-11-04 00:42:33 +00:00
8d681f0471
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
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llvm-svn: 85871
2009-11-03 05:52:54 +00:00
2c2dc9f64f
Temporary xfail until PR5367 will be resolved
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llvm-svn: 85848
2009-11-03 00:37:36 +00:00
1708b06c0e
Unbreak ARMBaseRegisterInfo::copyRegToReg.
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llvm-svn: 85787
2009-11-02 04:44:55 +00:00
43219997b6
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively.
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llvm-svn: 85743
2009-11-01 21:12:51 +00:00
50bc004b67
Fix tests.
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llvm-svn: 85723
2009-11-01 18:13:29 +00:00
6f29ad9170
Use cbz and cbnz instructions.
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llvm-svn: 85698
2009-10-31 23:46:45 +00:00
5cba8de2c8
vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using
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them for scalar floating point operations for now.
llvm-svn: 85697
2009-10-31 22:57:36 +00:00
403202aef1
Consolidate test files
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llvm-svn: 85696
2009-10-31 22:20:56 +00:00
c79fb530d4
Change to use FileCheck
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llvm-svn: 85695
2009-10-31 22:16:14 +00:00
69f364babc
Make tests more explicit about which instructions are expected.
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llvm-svn: 85694
2009-10-31 22:14:17 +00:00
259c37cc55
Grammar tweak to comments
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llvm-svn: 85693
2009-10-31 22:12:44 +00:00
2c3e618a06
Update test to be more explicit about what instruction sequences are expected for each operation.
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llvm-svn: 85691
2009-10-31 22:10:38 +00:00
6ef6fe1c31
Force triple; darwin's ASM syntax differs from linux's.
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llvm-svn: 85676
2009-10-31 19:54:06 +00:00
7e06083a3a
Add missing colons for FileCheck.
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llvm-svn: 85674
2009-10-31 19:22:24 +00:00
cdbb70c065
It's safe to remat t2LDRpci; Add PseudoSourceValue to load / store's to enable more machine licm. More changes coming.
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llvm-svn: 85643
2009-10-31 03:39:36 +00:00
3d43b38f0f
Fix Thumb2 failures by converting them to FileCheck.
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llvm-svn: 85210
2009-10-27 06:31:02 +00:00
69140ec4fa
Add a couple of ARM cross-rc coalescing tests.
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llvm-svn: 85051
2009-10-25 08:01:41 +00:00
b9f3520660
Update tests.
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llvm-svn: 85050
2009-10-25 07:53:48 +00:00
a93ca3c637
Improve handling of immediates by splitting 32-bit immediates into two 16-bit
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immediate operands when they will fit into the using instruction.
llvm-svn: 84778
2009-10-21 20:44:34 +00:00
786b15fe12
Match more patterns to movt.
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llvm-svn: 84751
2009-10-21 08:15:52 +00:00
682a2d154a
Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail.
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llvm-svn: 84727
2009-10-21 01:44:44 +00:00
baf6dd26ea
Checkpoint more aggressive anti-dependency breaking for post-ra scheduler.
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llvm-svn: 84658
2009-10-20 19:54:44 +00:00
3f23601b00
Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng.
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llvm-svn: 84212
2009-10-15 22:25:32 +00:00
4ad726b4be
Fix tests.
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llvm-svn: 83241
2009-10-02 06:53:57 +00:00
1cc6dd97da
Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.
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llvm-svn: 83218
2009-10-01 22:19:57 +00:00
3ea1ba7739
Forgot this test earlier.
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llvm-svn: 83143
2009-09-30 08:41:27 +00:00
83e0d481ae
Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo
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instruction. This makes it re-materializable.
Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.
llvm-svn: 82982
2009-09-28 09:14:39 +00:00
a6b9cab822
Enable pre-regalloc load / store multiple pass for Thumb2.
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llvm-svn: 82893
2009-09-27 09:46:04 +00:00
ccde96e96b
"Update" tests for -disable-if-conversion removal. I think branch.ll should just
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be removed, but I XFAIL'd it for now.
llvm-svn: 82847
2009-09-26 05:29:36 +00:00
a080159a7c
Convert more tests to avoid llvm-as.
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llvm-svn: 81545
2009-09-11 18:36:27 +00:00
cf61d68eaf
Cast MO.getImm() to unsigned before comparing with an unsigned limit.
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llvm-svn: 81318
2009-09-09 06:05:16 +00:00
c8054d90fb
Eliminate more uses of llvm-as and llvm-dis.
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llvm-svn: 81293
2009-09-09 00:09:15 +00:00
f87421f088
update various tests for signedness changes in .s file.
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llvm-svn: 81289
2009-09-08 23:51:06 +00:00
9ef94277f1
adjust for signedness change. I'd appreciate it if an ARM flavored person
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could look at this: the top undefined bits of an immediate shouldn't affect
isel (cmp vs cmp.w)
llvm-svn: 81288
2009-09-08 23:44:53 +00:00
6837964819
merge thumb2-bic2.ll into thumb2-bic.ll and update for signedness changes.
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llvm-svn: 81285
2009-09-08 23:41:06 +00:00
3d2fce01aa
Run branch folding if if-converter make some transformations.
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llvm-svn: 80994
2009-09-04 07:47:40 +00:00
4f835f1d7d
Remove .n suffix for some 16-bit opcodes now that Darwin assembler is fixed.
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llvm-svn: 80615
2009-08-31 20:14:07 +00:00
43b9ca6f42
Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer.
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llvm-svn: 80404
2009-08-28 23:18:09 +00:00
7a37b1a2ca
Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which cannot fold any immediate offset.
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llvm-svn: 80191
2009-08-27 01:23:50 +00:00
Benjamin Kramer